From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 908C6A0548; Fri, 10 Sep 2021 04:37:56 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 6BAF3406B4; Fri, 10 Sep 2021 04:37:56 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mails.dpdk.org (Postfix) with ESMTP id 2CCFB406B4 for ; Fri, 10 Sep 2021 04:37:54 +0200 (CEST) X-IronPort-AV: E=McAfee;i="6200,9189,10102"; a="208080642" X-IronPort-AV: E=Sophos;i="5.85,282,1624345200"; d="scan'208";a="208080642" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Sep 2021 19:37:53 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.85,282,1624345200"; d="scan'208";a="540096517" Received: from npg-dpdk-virtio-xiachenbo-nw.sh.intel.com ([10.67.119.53]) by FMSMGA003.fm.intel.com with ESMTP; 09 Sep 2021 19:37:52 -0700 From: Chenbo Xia To: dev@dpdk.org Cc: Ray Kinsella Date: Fri, 10 Sep 2021 10:23:55 +0800 Message-Id: <20210910022402.26620-2-chenbo.xia@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210910022402.26620-1-chenbo.xia@intel.com> References: <20210910022402.26620-1-chenbo.xia@intel.com> Subject: [dpdk-dev] [PATCH 1/8] bus/pci: add new memory resource access APIs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Some applications wants to access PCI memory resource. Currently applications use struct rte_pci_device to access it. Since the structure will be made internal later, this patch adds two APIs for memory resource access. Signed-off-by: Chenbo Xia --- doc/guides/rel_notes/release_21_11.rst | 5 ++ drivers/bus/pci/pci_common.c | 78 ++++++++++++++++++++++++++ drivers/bus/pci/rte_bus_pci.h | 36 ++++++++++++ drivers/bus/pci/version.map | 4 ++ 4 files changed, 123 insertions(+) diff --git a/doc/guides/rel_notes/release_21_11.rst b/doc/guides/rel_notes/release_21_11.rst index 675b573834..1c9abb74ec 100644 --- a/doc/guides/rel_notes/release_21_11.rst +++ b/doc/guides/rel_notes/release_21_11.rst @@ -62,6 +62,11 @@ New Features * Added bus-level parsing of the devargs syntax. * Kept compatibility with the legacy syntax as parsing fallback. +* **Added new memory resource read/write APIs in PCI bus.** + + Added new memory resource read/write APIs ``rte_pci_mem_rd32`` and + ``rte_pci_mem_wr32`` for applications to read/write PCI memory + resource. Removed Items ------------- diff --git a/drivers/bus/pci/pci_common.c b/drivers/bus/pci/pci_common.c index 3406e03b29..944288b132 100644 --- a/drivers/bus/pci/pci_common.c +++ b/drivers/bus/pci/pci_common.c @@ -25,6 +25,7 @@ #include #include #include +#include #include "private.h" @@ -777,6 +778,83 @@ rte_pci_set_bus_master(struct rte_pci_device *dev, bool enable) return 0; } +static void * +get_pci_mem_addr(const char *name, uint16_t idx, uint64_t offset) +{ + struct rte_pci_device *dev = NULL; + struct rte_pci_addr addr = {0}; + struct rte_mem_resource *res = NULL; + bool found = false; + + if (rte_pci_addr_parse(name, &addr)) { + RTE_LOG(ERR, EAL, "Wrong name format of PCI device (%s)", name); + return NULL; + } + + FOREACH_DEVICE_ON_PCIBUS(dev) { + if (rte_pci_addr_cmp(&dev->addr, &addr)) { + continue; + } else { + found = true; + break; + } + } + + if (!found) { + RTE_LOG(ERR, EAL, "Can not find the device (%s)", name); + return NULL; + } + + res = &dev->mem_resource[idx]; + if (idx >= PCI_MAX_RESOURCE || res->len == 0 || res->addr == NULL) { + RTE_LOG(ERR, EAL, "Invalid index of a mapped memory resourse"); + return NULL; + } + + if (offset >= res->len || offset + 4 > res->len) { + RTE_LOG(ERR, EAL, "Invalid offset of a memory resourse"); + return NULL; + } + + return (void *)((char *)res->addr + offset); +} + +int +rte_pci_mem_rd32(const char *name, uint16_t idx, uint32_t *data, uint64_t offset) +{ + void *reg_addr = NULL; + + if (data == NULL) { + RTE_LOG(ERR, EAL, "NULL data buffer for PCI memory access"); + return -EINVAL; + } + + reg_addr = get_pci_mem_addr(name, idx, offset); + if (reg_addr == NULL) + return -EINVAL; + + *data = rte_read32(reg_addr); + return 0; +} + +int +rte_pci_mem_wr32(const char *name, uint16_t idx, const uint32_t *data, uint64_t offset) +{ + void *reg_addr = NULL; + + if (data == NULL) { + RTE_LOG(ERR, EAL, "NULL data buffer for PCI memory access"); + return -EINVAL; + } + + reg_addr = get_pci_mem_addr(name, idx, offset); + if (reg_addr == NULL) + return -EINVAL; + + rte_write32(*data, reg_addr); + return 0; +} + struct rte_pci_bus rte_pci_bus = { .bus = { .scan = rte_pci_scan, diff --git a/drivers/bus/pci/rte_bus_pci.h b/drivers/bus/pci/rte_bus_pci.h index 583470e831..21d9dd4289 100644 --- a/drivers/bus/pci/rte_bus_pci.h +++ b/drivers/bus/pci/rte_bus_pci.h @@ -392,6 +392,42 @@ void rte_pci_ioport_read(struct rte_pci_ioport *p, void rte_pci_ioport_write(struct rte_pci_ioport *p, const void *data, size_t len, off_t offset); +/** + * Read 4 bytes from PCI memory resource. + * + * @param name + * PCI device name (e.g., 0000:18:00.0). + * @param idx + * Memory resource index. + * @param data + * Data buffer where the bytes should be read into. + * @param offset + * The offset into the PCI memory resource. + * @return + * 0 on success, negative value on error. + */ +__rte_experimental +int +rte_pci_mem_rd32(const char *name, uint16_t idx, uint32_t *data, uint64_t offset); + +/** + * Write 4 bytes to PCI memory resource. + * + * @param name + * PCI device name (e.g., 0000:18:00.0). + * @param idx + * Memory resource index. + * @param data + * Buffer of data that should be written to PCI memory. + * @param offset + * The offset into the PCI memory resource. + * @return + * 0 on success, negative value on error. + */ +__rte_experimental +int +rte_pci_mem_wr32(const char *name, uint16_t idx, const uint32_t *data, uint64_t offset); + #ifdef __cplusplus } #endif diff --git a/drivers/bus/pci/version.map b/drivers/bus/pci/version.map index aa56439c2b..01ec836559 100644 --- a/drivers/bus/pci/version.map +++ b/drivers/bus/pci/version.map @@ -24,4 +24,8 @@ EXPERIMENTAL { # added in 21.08 rte_pci_set_bus_master; + + # added in 21.11 + rte_pci_mem_rd32; + rte_pci_mem_wr32; }; -- 2.17.1