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monjalon.net; dkim=none (message not signed) header.d=none;monjalon.net; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by BN8NAM11FT061.mail.protection.outlook.com (10.13.177.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4500.14 via Frontend Transport; Mon, 13 Sep 2021 14:03:57 +0000 Received: from DRHQMAIL107.nvidia.com (10.27.9.16) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 13 Sep 2021 14:02:51 +0000 Received: from nvidia.com (172.20.187.6) by DRHQMAIL107.nvidia.com (10.27.9.16) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 13 Sep 2021 14:02:49 +0000 From: Tal Shnaiderman To: CC: , , , , , Date: Mon, 13 Sep 2021 17:02:24 +0300 Message-ID: <20210913140224.18788-1-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [172.20.187.6] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To DRHQMAIL107.nvidia.com (10.27.9.16) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 18e44a68-39d9-4eab-3d67-08d976bf5432 X-MS-TrafficTypeDiagnostic: BYAPR12MB4727: X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:5797; 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CAT:NONE; SFS:(4636009)(39860400002)(376002)(346002)(396003)(136003)(46966006)(36840700001)(55016002)(316002)(8676002)(356005)(4326008)(70206006)(336012)(36860700001)(26005)(16526019)(6916009)(36756003)(86362001)(6286002)(70586007)(6666004)(5660300002)(54906003)(478600001)(82310400003)(47076005)(1076003)(8936002)(2906002)(426003)(186003)(7696005)(2616005)(82740400003)(7636003)(36906005)(83380400001); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Sep 2021 14:03:57.1306 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 18e44a68-39d9-4eab-3d67-08d976bf5432 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT061.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR12MB4727 Subject: [dpdk-dev] [PATCH] crypto/mlx5: fix crypto QP indexing X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The crypto QP consumer (ci) and producer (pi) indexes are increased with each successful enqueue/dequeue operations. However the QP pi index is calculated with a wraparound the number of elements while the QP ci does not. This is causing incorrect engine calculation for encqueued WQ values (wq->pi - wq->ci) and eventually the device stops accepting new enqueue operations. Fixed by removing the wraparound on QP pi and using a temp calculation where wraparound values are needed. Fixes: 8e196c08ab53 ("crypto/mlx5: support enqueue/dequeue operations") Cc: stable@dpdk.org Signed-off-by: Tal Shnaiderman Acked-by: Matan Azrad --- drivers/crypto/mlx5/mlx5_crypto.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/crypto/mlx5/mlx5_crypto.c b/drivers/crypto/mlx5/mlx5_crypto.c index b3d5200ca3..eeec554e6e 100644 --- a/drivers/crypto/mlx5/mlx5_crypto.c +++ b/drivers/crypto/mlx5/mlx5_crypto.c @@ -494,6 +494,7 @@ mlx5_crypto_enqueue_burst(void *queue_pair, struct rte_crypto_op **ops, struct rte_crypto_op *op; uint16_t mask = qp->entries_n - 1; uint16_t remain = qp->entries_n - (qp->pi - qp->ci); + uint32_t idx; if (remain < nb_ops) nb_ops = remain; @@ -502,8 +503,9 @@ mlx5_crypto_enqueue_burst(void *queue_pair, struct rte_crypto_op **ops, if (unlikely(remain == 0)) return 0; do { + idx = qp->pi & mask; op = *ops++; - umr = RTE_PTR_ADD(qp->umem_buf, priv->wqe_set_size * qp->pi); + umr = RTE_PTR_ADD(qp->umem_buf, priv->wqe_set_size * idx); if (unlikely(mlx5_crypto_wqe_set(priv, qp, op, umr) == 0)) { qp->stats.enqueue_err_count++; if (remain != nb_ops) { @@ -512,8 +514,8 @@ mlx5_crypto_enqueue_burst(void *queue_pair, struct rte_crypto_op **ops, } return 0; } - qp->ops[qp->pi] = op; - qp->pi = (qp->pi + 1) & mask; + qp->ops[idx] = op; + qp->pi++; } while (--remain); qp->stats.enqueued_count += nb_ops; rte_io_wmb(); -- 2.16.1.windows.4