From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 33467A0C43; Wed, 15 Sep 2021 08:11:24 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E9A924003F; Wed, 15 Sep 2021 08:11:23 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 7B5F84003C for ; Wed, 15 Sep 2021 08:11:22 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 18EIsXIQ015712; Tue, 14 Sep 2021 23:11:21 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=p2EPTeBsOeFhRWy7hOSP6V5eF4Rec4g4Ctly0Z8k1+E=; b=U10dmNpuacd+O11bw8mMMIzqUn2GCrHS7QrHgRb6Jqmkp4sRFcfmt8/Xr5pg612Btqwj 1AR7ThL50kyeQ5zIv49DEklMa6gGickBZa70dqA/cS+UghfYSyA+QG2jNCx8MXS2J6nQ EekrmvLHwVl6/6t/O3i9VpTCexW2cD1QH0ANlZ24mi/xerapoOOW65czPWv4oxy8hl7g XUgV+4C0RBLIE6oyfosHQEFJ7TbE6p8EwzfD7muq5dA1YhLO19SlDnBQMDj1GdksZSWO np96L7OCzO3BO/5LC2IyA8kM2VWRPQJTf2JMbxzPLP/Zf41hUicEihZSOCWkY27GaUku IQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com with ESMTP id 3b31e81wmv-3 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Tue, 14 Sep 2021 23:11:21 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Tue, 14 Sep 2021 23:11:19 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Tue, 14 Sep 2021 23:11:19 -0700 Received: from vvelumuri_asim.marvell.com (unknown [10.29.53.48]) by maili.marvell.com (Postfix) with ESMTP id E1DDA3F7061; Tue, 14 Sep 2021 23:11:16 -0700 (PDT) From: Vidya Sagar Velumuri To: , , , , , , , , CC: Date: Wed, 15 Sep 2021 06:11:01 +0000 Message-ID: <20210915061103.28375-1-vvelumuri@marvell.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: Vye4hKk6-KvAHvpBRtEFKcTmM4_pYJG2 X-Proofpoint-ORIG-GUID: Vye4hKk6-KvAHvpBRtEFKcTmM4_pYJG2 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475 definitions=2021-09-15_01,2021-09-14_01,2020-04-07_01 Subject: [dpdk-dev] [PATCH v1 1/3] common/cnxk: set key length setting for PDCP algos X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Set proper bits in the context based on key length for PDCP Signed-off-by: Vidya Sagar Velumuri diff --git a/drivers/common/cnxk/roc_se.c b/drivers/common/cnxk/roc_se.c index 03fbc5f2f7..4edbc8e547 100644 --- a/drivers/common/cnxk/roc_se.c +++ b/drivers/common/cnxk/roc_se.c @@ -160,6 +160,13 @@ cpt_pdcp_mac_len_set(struct roc_se_zuc_snow3g_ctx *zs_ctx, uint16_t mac_len) { roc_se_pdcp_mac_len_type mac_type = 0; + if (roc_model_is_cn9k()) { + if (mac_len != 4) { + plt_err("Only mac len 4 is supported on cn9k"); + return -ENOTSUP; + } + } + switch (mac_len) { case 4: mac_type = ROC_SE_PDCP_MAC_LEN_32_BIT; @@ -230,6 +237,9 @@ roc_se_auth_key_set(struct roc_se_ctx *se_ctx, roc_se_auth_type type, case ROC_SE_ZUC_EIA3: zs_ctx->zuc.otk_ctx.w0.s.alg_type = ROC_SE_PDCP_ALG_TYPE_ZUC; + ret = cpt_pdcp_key_type_set(zs_ctx, key_len); + if (ret) + return ret; ret = cpt_pdcp_mac_len_set(zs_ctx, mac_len); if (ret) return ret; -- 2.31.1