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oktetlabs.ru; dkim=none (message not signed) header.d=none;oktetlabs.ru; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.35 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.35; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.35) by BN8NAM11FT050.mail.protection.outlook.com (10.13.177.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4523.14 via Frontend Transport; Wed, 15 Sep 2021 10:12:22 +0000 Received: from DRHQMAIL107.nvidia.com (10.27.9.16) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Wed, 15 Sep 2021 10:12:21 +0000 Received: from nvidia.com (172.20.187.5) by DRHQMAIL107.nvidia.com (10.27.9.16) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Wed, 15 Sep 2021 10:12:19 +0000 From: Xueming Li To: CC: , Andrew Rybchenko , Maxime Coquelin , Chenbo Xia Date: Wed, 15 Sep 2021 18:12:04 +0800 Message-ID: <20210915101204.81754-1-xuemingl@nvidia.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210823063906.1382544-1-xuemingl@nvidia.com> References: <20210823063906.1382544-1-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL101.nvidia.com (172.20.187.10) To DRHQMAIL107.nvidia.com (10.27.9.16) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 48459630-1a29-4879-a8ec-08d978314eea X-MS-TrafficTypeDiagnostic: BY5PR12MB4273: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:3044; 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CAT:NONE; SFS:(4636009)(136003)(39860400002)(376002)(396003)(346002)(36840700001)(46966006)(36860700001)(356005)(70586007)(70206006)(2906002)(6666004)(83380400001)(8936002)(7696005)(82310400003)(2616005)(26005)(8676002)(426003)(336012)(16526019)(36906005)(186003)(36756003)(7636003)(82740400003)(54906003)(316002)(55016002)(47076005)(1076003)(86362001)(5660300002)(478600001)(6286002)(6916009)(4326008); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Sep 2021 10:12:22.0658 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 48459630-1a29-4879-a8ec-08d978314eea X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.35]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT050.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4273 Subject: [dpdk-dev] [PATCH v2] net/virtio: wait device ready during reset X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" According to virtio spec, the device MUST reset when 0 is written to device_status, and present 0 in device_status once reset is done. This patch waits status value to be 0 during reset operation, if timeout in 3 seconds, log and continue. Signed-off-by: Xueming Li Cc: Andrew Rybchenko --- drivers/net/virtio/virtio.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/net/virtio/virtio.c b/drivers/net/virtio/virtio.c index 7e1e77797f..d9e642f412 100644 --- a/drivers/net/virtio/virtio.c +++ b/drivers/net/virtio/virtio.c @@ -3,7 +3,10 @@ * Copyright(c) 2020 Red Hat, Inc. */ +#include + #include "virtio.h" +#include "virtio_logs.h" uint64_t virtio_negotiate_features(struct virtio_hw *hw, uint64_t host_features) @@ -38,9 +41,17 @@ virtio_write_dev_config(struct virtio_hw *hw, size_t offset, void virtio_reset(struct virtio_hw *hw) { + uint32_t retry = 0; + VIRTIO_OPS(hw)->set_status(hw, VIRTIO_CONFIG_STATUS_RESET); - /* flush status write */ - VIRTIO_OPS(hw)->get_status(hw); + /* Flush status write and wait device ready max 3 seconds. */ + while (VIRTIO_OPS(hw)->get_status(hw) != VIRTIO_CONFIG_STATUS_RESET) { + if (retry++ > 3000) { + PMD_INIT_LOG(WARNING, "port %u device reset timeout", hw->port_id); + break; + } + usleep(1000L); + } } void -- 2.33.0