* [dpdk-dev] [PATCH 00/20] ice/base: add parser module
@ 2021-09-17 11:02 Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 01/20] net/ice/base: add parser create and destroy skeleton Qi Zhang
` (19 more replies)
0 siblings, 20 replies; 21+ messages in thread
From: Qi Zhang @ 2021-09-17 11:02 UTC (permalink / raw)
To: qiming.yang; +Cc: junfeng.guo, dev, Qi Zhang
Add the parser module that can parse on a raw packet then figure
out the low-level metadata to program the hardware packet process
pipeline for flow offloading(Switch/FDIR/RSS). This is the pre-step
to enable a protocol-agnostic flow offloading solution for ice devices
that leverage Intel DDP technology.
Qi Zhang (20):
net/ice/base: add parser create and destroy skeleton
net/ice/base: init imem table for parser
net/ice/base: init metainit table for parser
net/ice/base: init parse graph cam table for parser
net/ice/base: init boost TCAM table for parser
net/ice/base: init ptype marker TCAM table for parser
net/ice/base: init marker group table for parser
net/ice/base: init protocol group table for parser
net/ice/base: init flag redirect table for parser
net/ice/base: init XLT key builder for parser
net/ice/base: add parser runtime skeleton
net/ice/base: add helper function for boost TCAM match
net/ice/base: add helper functions for parse graph key matching
net/ice/base: add helper function for ptype markers match
net/ice/base: add helper function to redirect flags
net/ice/base: add helper function to aggregate flags
net/ice/base: add parser execution main loop
net/ice/base: support double VLAN mode configure for parser
net/ice/base: add tunnel port support for parser
net/ice/base: add API for parser profile initialization
drivers/net/ice/base/ice_bst_tcam.c | 291 +++++++++
drivers/net/ice/base/ice_bst_tcam.h | 35 +
drivers/net/ice/base/ice_common.h | 1 +
drivers/net/ice/base/ice_flex_pipe.c | 4 +-
drivers/net/ice/base/ice_flex_pipe.h | 8 +
drivers/net/ice/base/ice_flex_type.h | 2 +
drivers/net/ice/base/ice_flg_rd.c | 76 +++
drivers/net/ice/base/ice_flg_rd.h | 17 +
drivers/net/ice/base/ice_imem.c | 244 +++++++
drivers/net/ice/base/ice_imem.h | 109 ++++
drivers/net/ice/base/ice_metainit.c | 143 ++++
drivers/net/ice/base/ice_metainit.h | 46 ++
drivers/net/ice/base/ice_mk_grp.c | 55 ++
drivers/net/ice/base/ice_mk_grp.h | 15 +
drivers/net/ice/base/ice_parser.c | 556 ++++++++++++++++
drivers/net/ice/base/ice_parser.h | 113 ++++
drivers/net/ice/base/ice_parser_rt.c | 867 +++++++++++++++++++++++++
drivers/net/ice/base/ice_parser_rt.h | 48 ++
drivers/net/ice/base/ice_parser_util.h | 36 +
drivers/net/ice/base/ice_pg_cam.c | 374 +++++++++++
drivers/net/ice/base/ice_pg_cam.h | 74 +++
drivers/net/ice/base/ice_proto_grp.c | 108 +++
drivers/net/ice/base/ice_proto_grp.h | 23 +
drivers/net/ice/base/ice_ptype_mk.c | 76 +++
drivers/net/ice/base/ice_ptype_mk.h | 21 +
drivers/net/ice/base/ice_tmatch.h | 44 ++
drivers/net/ice/base/ice_type.h | 1 +
drivers/net/ice/base/ice_xlt_kb.c | 216 ++++++
drivers/net/ice/base/ice_xlt_kb.h | 34 +
drivers/net/ice/base/meson.build | 11 +
30 files changed, 3646 insertions(+), 2 deletions(-)
create mode 100644 drivers/net/ice/base/ice_bst_tcam.c
create mode 100644 drivers/net/ice/base/ice_bst_tcam.h
create mode 100644 drivers/net/ice/base/ice_flg_rd.c
create mode 100644 drivers/net/ice/base/ice_flg_rd.h
create mode 100644 drivers/net/ice/base/ice_imem.c
create mode 100644 drivers/net/ice/base/ice_imem.h
create mode 100644 drivers/net/ice/base/ice_metainit.c
create mode 100644 drivers/net/ice/base/ice_metainit.h
create mode 100644 drivers/net/ice/base/ice_mk_grp.c
create mode 100644 drivers/net/ice/base/ice_mk_grp.h
create mode 100644 drivers/net/ice/base/ice_parser.c
create mode 100644 drivers/net/ice/base/ice_parser.h
create mode 100644 drivers/net/ice/base/ice_parser_rt.c
create mode 100644 drivers/net/ice/base/ice_parser_rt.h
create mode 100644 drivers/net/ice/base/ice_parser_util.h
create mode 100644 drivers/net/ice/base/ice_pg_cam.c
create mode 100644 drivers/net/ice/base/ice_pg_cam.h
create mode 100644 drivers/net/ice/base/ice_proto_grp.c
create mode 100644 drivers/net/ice/base/ice_proto_grp.h
create mode 100644 drivers/net/ice/base/ice_ptype_mk.c
create mode 100644 drivers/net/ice/base/ice_ptype_mk.h
create mode 100644 drivers/net/ice/base/ice_tmatch.h
create mode 100644 drivers/net/ice/base/ice_xlt_kb.c
create mode 100644 drivers/net/ice/base/ice_xlt_kb.h
--
2.26.2
^ permalink raw reply [flat|nested] 21+ messages in thread
* [dpdk-dev] [PATCH 01/20] net/ice/base: add parser create and destroy skeleton
2021-09-17 11:02 [dpdk-dev] [PATCH 00/20] ice/base: add parser module Qi Zhang
@ 2021-09-17 11:02 ` Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 02/20] net/ice/base: init imem table for parser Qi Zhang
` (18 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Qi Zhang @ 2021-09-17 11:02 UTC (permalink / raw)
To: qiming.yang; +Cc: junfeng.guo, dev, Qi Zhang
Add new parser module which can parse a packet in binary
and generate information like ptype, protocol/offset pairs
and flags which can be used to feed the FXP profile creation
directly.
The patch added skeleton of the parser instance create and
destroy APIs:
ice_parser_create
ice_parser_destroy
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.h | 1 +
drivers/net/ice/base/ice_flex_pipe.c | 2 +-
drivers/net/ice/base/ice_flex_pipe.h | 5 ++++
drivers/net/ice/base/ice_parser.c | 34 ++++++++++++++++++++++++++++
drivers/net/ice/base/ice_parser.h | 14 ++++++++++++
drivers/net/ice/base/meson.build | 1 +
6 files changed, 56 insertions(+), 1 deletion(-)
create mode 100644 drivers/net/ice/base/ice_parser.c
create mode 100644 drivers/net/ice/base/ice_parser.h
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 1d8882c279..a3cbf4fb05 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -8,6 +8,7 @@
#include "ice_type.h"
#include "ice_nvm.h"
#include "ice_flex_pipe.h"
+#include "ice_parser.h"
#include "ice_switch.h"
#include "ice_fdir.h"
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 3631ddba2c..703c3e0416 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -284,7 +284,7 @@ ice_pkg_enum_section(struct ice_seg *ice_seg, struct ice_pkg_enum *state,
* indicates a base offset of 10, and the index for the entry is 2, then
* section handler function should set the offset to 10 + 2 = 12.
*/
-static void *
+void *
ice_pkg_enum_entry(struct ice_seg *ice_seg, struct ice_pkg_enum *state,
u32 sect_type, u32 *offset,
void *(*handler)(u32 sect_type, void *section,
diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h
index b690be75fc..045a77c607 100644
--- a/drivers/net/ice/base/ice_flex_pipe.h
+++ b/drivers/net/ice/base/ice_flex_pipe.h
@@ -94,4 +94,9 @@ void ice_pkg_buf_free(struct ice_hw *hw, struct ice_buf_build *bld);
enum ice_status
ice_set_key(u8 *key, u16 size, u8 *val, u8 *upd, u8 *dc, u8 *nm, u16 off,
u16 len);
+void *
+ice_pkg_enum_entry(struct ice_seg *ice_seg, struct ice_pkg_enum *state,
+ u32 sect_type, u32 *offset,
+ void *(*handler)(u32 sect_type, void *section,
+ u32 index, u32 *offset));
#endif /* _ICE_FLEX_PIPE_H_ */
diff --git a/drivers/net/ice/base/ice_parser.c b/drivers/net/ice/base/ice_parser.c
new file mode 100644
index 0000000000..c08decaf0d
--- /dev/null
+++ b/drivers/net/ice/base/ice_parser.c
@@ -0,0 +1,34 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2021 Intel Corporation
+ */
+
+#include "ice_common.h"
+
+/**
+ * ice_parser_create - create a parser instance
+ * @hw: pointer to the hardware structure
+ * @psr: output parameter for a new parser instance be created
+ */
+enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr)
+{
+ struct ice_parser *p;
+
+ p = (struct ice_parser *)ice_malloc(hw, sizeof(struct ice_parser));
+
+ if (!p)
+ return ICE_ERR_NO_MEMORY;
+
+ p->hw = hw;
+
+ *psr = p;
+ return ICE_SUCCESS;
+}
+
+/**
+ * ice_parser_destroy - destroy a parser instance
+ * @psr: pointer to a parser instance
+ */
+void ice_parser_destroy(struct ice_parser *psr)
+{
+ ice_free(psr->hw, psr);
+}
diff --git a/drivers/net/ice/base/ice_parser.h b/drivers/net/ice/base/ice_parser.h
new file mode 100644
index 0000000000..a0e33bb867
--- /dev/null
+++ b/drivers/net/ice/base/ice_parser.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2021 Intel Corporation
+ */
+
+#ifndef _ICE_PARSER_H_
+#define _ICE_PARSRR_H_
+
+struct ice_parser {
+ struct ice_hw *hw; /* pointer to the hardware structure */
+};
+
+enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr);
+void ice_parser_destroy(struct ice_parser *psr);
+#endif /* _ICE_PARSER_H_ */
diff --git a/drivers/net/ice/base/meson.build b/drivers/net/ice/base/meson.build
index be9713dfa1..2b0af54a5c 100644
--- a/drivers/net/ice/base/meson.build
+++ b/drivers/net/ice/base/meson.build
@@ -15,6 +15,7 @@ sources = [
'ice_acl_ctrl.c',
'ice_vlan_mode.c',
'ice_ptp_hw.c',
+ 'ice_parser.c',
]
error_cflags = [
--
2.26.2
^ permalink raw reply [flat|nested] 21+ messages in thread
* [dpdk-dev] [PATCH 02/20] net/ice/base: init imem table for parser
2021-09-17 11:02 [dpdk-dev] [PATCH 00/20] ice/base: add parser module Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 01/20] net/ice/base: add parser create and destroy skeleton Qi Zhang
@ 2021-09-17 11:02 ` Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 03/20] net/ice/base: init metainit " Qi Zhang
` (17 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Qi Zhang @ 2021-09-17 11:02 UTC (permalink / raw)
To: qiming.yang; +Cc: junfeng.guo, dev, Qi Zhang
Parse DDP section ICE_SID_RXPARSER_IMEM into an arrary of
struct ice_imem_item.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_imem.c | 244 +++++++++++++++++++++++++
drivers/net/ice/base/ice_imem.h | 109 +++++++++++
drivers/net/ice/base/ice_parser.c | 100 ++++++++++
drivers/net/ice/base/ice_parser.h | 3 +
drivers/net/ice/base/ice_parser_util.h | 25 +++
drivers/net/ice/base/ice_type.h | 1 +
drivers/net/ice/base/meson.build | 1 +
7 files changed, 483 insertions(+)
create mode 100644 drivers/net/ice/base/ice_imem.c
create mode 100644 drivers/net/ice/base/ice_imem.h
create mode 100644 drivers/net/ice/base/ice_parser_util.h
diff --git a/drivers/net/ice/base/ice_imem.c b/drivers/net/ice/base/ice_imem.c
new file mode 100644
index 0000000000..ea77581199
--- /dev/null
+++ b/drivers/net/ice/base/ice_imem.c
@@ -0,0 +1,244 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2021 Intel Corporation
+ */
+
+#include "ice_common.h"
+#include "ice_parser_util.h"
+
+#define ICE_IMEM_TABLE_SIZE 192
+
+static void _imem_bst_bm_dump(struct ice_hw *hw, struct ice_bst_master *bm)
+{
+ ice_info(hw, "boost master:\n");
+ ice_info(hw, "\tal0 = %d\n", bm->al0);
+ ice_info(hw, "\tal1 = %d\n", bm->al1);
+ ice_info(hw, "\tal2 = %d\n", bm->al2);
+ ice_info(hw, "\tpg = %d\n", bm->pg);
+}
+
+static void _imem_bst_kb_dump(struct ice_hw *hw, struct ice_bst_keybuilder *kb)
+{
+ ice_info(hw, "boost key builder:\n");
+ ice_info(hw, "\tpriority = %d\n", kb->priority);
+ ice_info(hw, "\ttsr_ctrl = %d\n", kb->tsr_ctrl);
+}
+
+static void _imem_np_kb_dump(struct ice_hw *hw, struct ice_np_keybuilder *kb)
+{
+ ice_info(hw, "next proto key builder:\n");
+ ice_info(hw, "\tops = %d\n", kb->ops);
+ ice_info(hw, "\tstart_or_reg0 = %d\n", kb->start_or_reg0);
+ ice_info(hw, "\tlen_or_reg1 = %d\n", kb->len_or_reg1);
+}
+
+static void _imem_pg_kb_dump(struct ice_hw *hw, struct ice_pg_keybuilder *kb)
+{
+ ice_info(hw, "parse graph key builder:\n");
+ ice_info(hw, "\tflag0_ena = %d\n", kb->flag0_ena);
+ ice_info(hw, "\tflag1_ena = %d\n", kb->flag1_ena);
+ ice_info(hw, "\tflag2_ena = %d\n", kb->flag2_ena);
+ ice_info(hw, "\tflag3_ena = %d\n", kb->flag3_ena);
+ ice_info(hw, "\tflag0_idx = %d\n", kb->flag0_idx);
+ ice_info(hw, "\tflag1_idx = %d\n", kb->flag1_idx);
+ ice_info(hw, "\tflag2_idx = %d\n", kb->flag2_idx);
+ ice_info(hw, "\tflag3_idx = %d\n", kb->flag3_idx);
+ ice_info(hw, "\talu_reg_idx = %d\n", kb->alu_reg_idx);
+}
+
+static void _imem_alu_dump(struct ice_hw *hw, struct ice_alu *alu, int index)
+{
+ ice_info(hw, "alu%d:\n", index);
+ ice_info(hw, "\topc = %d\n", alu->opc);
+ ice_info(hw, "\tsrc_start = %d\n", alu->src_start);
+ ice_info(hw, "\tsrc_len = %d\n", alu->src_len);
+ ice_info(hw, "\tshift_xlate_select = %d\n", alu->shift_xlate_select);
+ ice_info(hw, "\tshift_xlate_key = %d\n", alu->shift_xlate_key);
+ ice_info(hw, "\tsrc_reg_id = %d\n", alu->src_reg_id);
+ ice_info(hw, "\tdst_reg_id = %d\n", alu->dst_reg_id);
+ ice_info(hw, "\tinc0 = %d\n", alu->inc0);
+ ice_info(hw, "\tinc1 = %d\n", alu->inc1);
+ ice_info(hw, "\tproto_offset_opc = %d\n", alu->proto_offset_opc);
+ ice_info(hw, "\tproto_offset = %d\n", alu->proto_offset);
+ ice_info(hw, "\tbranch_addr = %d\n", alu->branch_addr);
+ ice_info(hw, "\timm = %d\n", alu->imm);
+ ice_info(hw, "\tdst_start = %d\n", alu->dst_start);
+ ice_info(hw, "\tdst_len = %d\n", alu->dst_len);
+ ice_info(hw, "\tflags_extr_imm = %d\n", alu->flags_extr_imm);
+ ice_info(hw, "\tflags_start_imm= %d\n", alu->flags_start_imm);
+}
+
+/**
+ * ice_imem_dump - dump an imem item info
+ * @ice_hw: pointer to the hardware structure
+ * @item: imem item to dump
+ */
+void ice_imem_dump(struct ice_hw *hw, struct ice_imem_item *item)
+{
+ ice_info(hw, "index = %d\n", item->idx);
+ _imem_bst_bm_dump(hw, &item->b_m);
+ _imem_bst_kb_dump(hw, &item->b_kb);
+ ice_info(hw, "pg priority = %d\n", item->pg);
+ _imem_np_kb_dump(hw, &item->np_kb);
+ _imem_pg_kb_dump(hw, &item->pg_kb);
+ _imem_alu_dump(hw, &item->alu0, 0);
+ _imem_alu_dump(hw, &item->alu1, 1);
+ _imem_alu_dump(hw, &item->alu2, 2);
+}
+
+/** The function parses a 4 bits Boost Master with below format:
+ * BIT 0: ALU 0 (bm->alu0)
+ * BIT 1: ALU 1 (bm->alu1)
+ * BIT 2: ALU 2 (bm->alu2)
+ * BIT 3: Parge Graph (bm->pg)
+ */
+static void _imem_bm_init(struct ice_bst_master *bm, u8 data)
+{
+ bm->al0 = (data & 0x1) != 0;
+ bm->al1 = (data & 0x2) != 0;
+ bm->al2 = (data & 0x4) != 0;
+ bm->pg = (data & 0x8) != 0;
+}
+
+/** The function parses a 10 bits Boost Master Build with below format:
+ * BIT 0-7: Priority (bkb->priority)
+ * BIT 8: TSR Control (bkb->tsr_ctrl)
+ * BIT 9: Reserved
+ */
+static void _imem_bkb_init(struct ice_bst_keybuilder *bkb, u16 data)
+{
+ bkb->priority = (u8)(data & 0xff);
+ bkb->tsr_ctrl = (data & 0x100) != 0;
+}
+
+/** The function parses a 18 bits Next Protocol Key Build with below format:
+ * BIT 0-1: Opcode kb->ops
+ * BIT 2-9: Start / Reg 0 (kb->start_or_reg0)
+ * BIT 10-17: Length / Reg 1 (kb->len_or_reg1)
+ */
+static void _imem_npkb_init(struct ice_np_keybuilder *kb, u32 data)
+{
+ kb->ops = (u8)(data & 0x3);
+ kb->start_or_reg0 = (u8)((data >> 2) & 0xff);
+ kb->len_or_reg1 = (u8)((data >> 10) & 0xff);
+}
+
+/** The function parses a 35 bits Parse Graph Key Build with below format:
+ * BIT 0: Flag 0 Enable (kb->flag0_ena)
+ * BIT 1-6: Flag 0 Index (kb->flag0_idx)
+ * BIT 7: Flag 1 Enable (kb->flag1_ena)
+ * BIT 8-13: Flag 1 Index (kb->flag1_idx)
+ * BIT 14: Flag 2 Enable (kb->flag2_ena)
+ * BIT 15-20: Flag 2 Index (kb->flag2_idx)
+ * BIT 21: Flag 3 Enable (kb->flag3_ena)
+ * BIT 22-27: Flag 3 Index (kb->flag3_idx)
+ * BIT 28-34: ALU Register Index (kb->alu_reg_idx)
+ */
+static void _imem_pgkb_init(struct ice_pg_keybuilder *kb, u64 data)
+{
+ kb->flag0_ena = (data & 0x1) != 0;
+ kb->flag0_idx = (u8)((data >> 1) & 0x3f);
+ kb->flag1_ena = ((data >> 7) & 0x1) != 0;
+ kb->flag1_idx = (u8)((data >> 8) & 0x3f);
+ kb->flag2_ena = ((data >> 14) & 0x1) != 0;
+ kb->flag2_idx = (u8)((data >> 15) & 0x3f);
+ kb->flag3_ena = ((data >> 21) & 0x1) != 0;
+ kb->flag3_idx = (u8)((data >> 22) & 0x3f);
+ kb->alu_reg_idx = (u8)((data >> 28) & 0x7f);
+}
+
+/** The function parses a 96 bits ALU entry with below format:
+ * BIT 0-5: Opcode (alu->opc)
+ * BIT 6-13: Source Start (alu->src_start)
+ * BIT 14-18: Source Length (alu->src_len)
+ * BIT 19: Shift/Xlate Select (alu->shift_xlate_select)
+ * BIT 20-23: Shift/Xlate Key (alu->shift_xlate_key)
+ * BIT 24-30: Source Register ID (alu->src_reg_id)
+ * BIT 31-37: Dest. Register ID (alu->dst_reg_id)
+ * BIT 38: Inc0 (alu->inc0)
+ * BIT 39: Inc1:(alu->inc1)
+ * BIT 40:41 Protocol Offset Opcode (alu->proto_offset_opc)
+ * BIT 42:49 Protocol Offset (alu->proto_offset)
+ * BIT 50:57 Branch Address (alu->branch_addr)
+ * BIT 58:73 Immediate (alu->imm)
+ * BIT 74 Dedicated Flags Enable (alu->dedicate_flags_ena)
+ * BIT 75:80 Dest. Start (alu->dst_start)
+ * BIT 81:86 Dest. Length (alu->dst_len)
+ * BIT 87 Flags Extract Imm. (alu->flags_extr_imm)
+ * BIT 88:95 Flags Start/Immediate (alu->flags_start_imm)
+ *
+ * NOTE: the first 5 bits are skipped as the start bit is not
+ * byte aligned.
+ */
+static void _imem_alu_init(struct ice_alu *alu, u8 *data)
+{
+ u64 d64 = *(u64 *)data >> 5;
+
+ alu->opc = (enum ice_alu_opcode)(d64 & 0x3f);
+ alu->src_start = (u8)((d64 >> 6) & 0xff);
+ alu->src_len = (u8)((d64 >> 14) & 0x1f);
+ alu->shift_xlate_select = ((d64 >> 19) & 0x1) != 0;
+ alu->shift_xlate_key = (u8)((d64 >> 20) & 0xf);
+ alu->src_reg_id = (u8)((d64 >> 24) & 0x7f);
+ alu->dst_reg_id = (u8)((d64 >> 31) & 0x7f);
+ alu->inc0 = ((d64 >> 38) & 0x1) != 0;
+ alu->inc1 = ((d64 >> 39) & 0x1) != 0;
+ alu->proto_offset_opc = (u8)((d64 >> 40) & 0x3);
+ alu->proto_offset = (u8)((d64 >> 42) & 0xff);
+ alu->branch_addr = (u8)((d64 >> 50) & 0xff);
+
+ d64 = *(u64 *)(&data[7]) >> 7;
+
+ alu->imm = (u16)(d64 & 0xffff);
+ alu->dedicate_flags_ena = ((d64 >> 16) & 0x1) != 0;
+ alu->dst_start = (u8)((d64 >> 17) & 0x3f);
+ alu->dst_len = (u8)((d64 >> 23) & 0x3f);
+ alu->flags_extr_imm = ((d64 >> 29) & 0x1) != 0;
+ alu->flags_start_imm = (u8)((d64 >> 30) & 0xff);
+}
+
+/** The function parses a 384 bits IMEM entry with below format:
+ * BIT 0-3: Boost Master (ii->b_m)
+ * BIT 4-13: Boost Key Build (ii->b_kb)
+ * BIT 14-15: PG Priority (ii->pg)
+ * BIT 16-33: Next Proto Key Build (ii->np_kb)
+ * BIT 34-68: PG Key Build (ii->pg_kb)
+ * BIT 69-164: ALU0 (ii->alu0)
+ * BIT 165-260:ALU1 (ii->alu1)
+ * BIT 261-356:ALU2 (ii->alu2)
+ * BIT 357-383:Reserved
+ */
+static void _imem_parse_item(struct ice_hw *hw, u16 idx, void *item,
+ void *data, int size)
+{
+ struct ice_imem_item *ii = (struct ice_imem_item *)item;
+ u8 *buf = (u8 *)data;
+
+ ii->idx = idx;
+
+ _imem_bm_init(&ii->b_m, buf[0]);
+ _imem_bkb_init(&ii->b_kb, *((u16 *)(&buf[0])) >> 4);
+
+ ii->pg = (u8)((buf[1] & 0xc0) >> 6);
+ _imem_npkb_init(&ii->np_kb, *((u32 *)(&buf[2])));
+ _imem_pgkb_init(&ii->pg_kb, *((u64 *)(&buf[2])) >> 18);
+ _imem_alu_init(&ii->alu0, &buf[8]);
+ _imem_alu_init(&ii->alu1, &buf[20]);
+ _imem_alu_init(&ii->alu2, &buf[32]);
+
+ if (hw->debug_mask & ICE_DBG_PARSER)
+ ice_imem_dump(hw, ii);
+}
+
+/**
+ * ice_imem_table_get - create an imem table
+ * @ice_hw: pointer to the hardware structure
+ */
+struct ice_imem_item *ice_imem_table_get(struct ice_hw *hw)
+{
+ return (struct ice_imem_item *)
+ ice_parser_create_table(hw, ICE_SID_RXPARSER_IMEM,
+ sizeof(struct ice_imem_item),
+ ICE_IMEM_TABLE_SIZE,
+ ice_parser_sect_item_get,
+ _imem_parse_item);
+}
diff --git a/drivers/net/ice/base/ice_imem.h b/drivers/net/ice/base/ice_imem.h
new file mode 100644
index 0000000000..dc4220e77f
--- /dev/null
+++ b/drivers/net/ice/base/ice_imem.h
@@ -0,0 +1,109 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2021 Intel Corporation
+ */
+
+#ifndef _ICE_IMEM_H_
+#define _ICE_IMEM_H_
+
+struct ice_bst_master {
+ bool al0;
+ bool al1;
+ bool al2;
+ bool pg;
+};
+
+struct ice_bst_keybuilder {
+ u8 priority;
+ bool tsr_ctrl;
+};
+
+struct ice_np_keybuilder {
+ u8 ops;
+ u8 start_or_reg0;
+ u8 len_or_reg1;
+};
+
+struct ice_pg_keybuilder {
+ bool flag0_ena;
+ bool flag1_ena;
+ bool flag2_ena;
+ bool flag3_ena;
+ u8 flag0_idx;
+ u8 flag1_idx;
+ u8 flag2_idx;
+ u8 flag3_idx;
+ u8 alu_reg_idx;
+};
+
+enum ice_alu_opcode {
+ ICE_ALU_PARK = 0,
+ ICE_ALU_MOV_ADD = 1,
+ ICE_ALU_ADD = 2,
+ ICE_ALU_MOV_AND = 4,
+ ICE_ALU_AND = 5,
+ ICE_ALU_AND_IMM = 6,
+ ICE_ALU_MOV_OR = 7,
+ ICE_ALU_OR = 8,
+ ICE_ALU_MOV_XOR = 9,
+ ICE_ALU_XOR = 10,
+ ICE_ALU_NOP = 11,
+ ICE_ALU_BR = 12,
+ ICE_ALU_BREQ = 13,
+ ICE_ALU_BRNEQ = 14,
+ ICE_ALU_BRGT = 15,
+ ICE_ALU_BRLT = 16,
+ ICE_ALU_BRGEQ = 17,
+ ICE_ALU_BRLEG = 18,
+ ICE_ALU_SETEQ = 19,
+ ICE_ALU_ANDEQ = 20,
+ ICE_ALU_OREQ = 21,
+ ICE_ALU_SETNEQ = 22,
+ ICE_ALU_ANDNEQ = 23,
+ ICE_ALU_ORNEQ = 24,
+ ICE_ALU_SETGT = 25,
+ ICE_ALU_ANDGT = 26,
+ ICE_ALU_ORGT = 27,
+ ICE_ALU_SETLT = 28,
+ ICE_ALU_ANDLT = 29,
+ ICE_ALU_ORLT = 30,
+ ICE_ALU_MOV_SUB = 31,
+ ICE_ALU_SUB = 32,
+ ICE_ALU_INVALID = 64,
+};
+
+struct ice_alu {
+ enum ice_alu_opcode opc;
+ u8 src_start;
+ u8 src_len;
+ bool shift_xlate_select;
+ u8 shift_xlate_key;
+ u8 src_reg_id;
+ u8 dst_reg_id;
+ bool inc0;
+ bool inc1;
+ u8 proto_offset_opc;
+ u8 proto_offset;
+ u8 branch_addr;
+ u16 imm;
+ bool dedicate_flags_ena;
+ u8 dst_start;
+ u8 dst_len;
+ bool flags_extr_imm;
+ u8 flags_start_imm;
+};
+
+struct ice_imem_item {
+ u16 idx;
+ struct ice_bst_master b_m;
+ struct ice_bst_keybuilder b_kb;
+ u8 pg;
+ struct ice_np_keybuilder np_kb;
+ struct ice_pg_keybuilder pg_kb;
+ struct ice_alu alu0;
+ struct ice_alu alu1;
+ struct ice_alu alu2;
+};
+
+void ice_imem_dump(struct ice_hw *hw, struct ice_imem_item *item);
+struct ice_imem_item *ice_imem_table_get(struct ice_hw *hw);
+#endif /* _ICE_IMEM_H_ */
diff --git a/drivers/net/ice/base/ice_parser.c b/drivers/net/ice/base/ice_parser.c
index c08decaf0d..6d9aaec911 100644
--- a/drivers/net/ice/base/ice_parser.c
+++ b/drivers/net/ice/base/ice_parser.c
@@ -3,6 +3,94 @@
*/
#include "ice_common.h"
+#include "ice_parser_util.h"
+
+#define ICE_SEC_DATA_OFFSET 4
+#define ICE_SID_RXPARSER_IMEM_ENTRY_SIZE 48
+
+/**
+ * ice_parser_sect_item_get - parse a item from a section
+ * @sect_type: section type
+ * @section: section object
+ * @index: index of the item to get
+ * @offset: dummy as prototype of ice_pkg_enum_entry's last parameter
+ */
+void *ice_parser_sect_item_get(u32 sect_type, void *section,
+ u32 index, u32 *offset)
+{
+ struct ice_pkg_sect_hdr *hdr;
+ int data_off = ICE_SEC_DATA_OFFSET;
+ int size;
+
+ if (!section)
+ return NULL;
+
+ switch (sect_type) {
+ case ICE_SID_RXPARSER_IMEM:
+ size = ICE_SID_RXPARSER_IMEM_ENTRY_SIZE;
+ break;
+ default:
+ return NULL;
+ }
+
+ hdr = (struct ice_pkg_sect_hdr *)section;
+ if (index >= LE16_TO_CPU(hdr->count))
+ return NULL;
+
+ return (void *)((u64)section + data_off + index * size);
+}
+
+/**
+ * ice_parser_create_table - create a item table from a section
+ * @hw: pointer to the hardware structure
+ * @sect_type: section type
+ * @item_size: item size in byte
+ * @length: number of items in the table to create
+ * @item_get: the function will be parsed to ice_pkg_enum_entry
+ * @parser_item: the function to parse the item
+ */
+void *ice_parser_create_table(struct ice_hw *hw, u32 sect_type,
+ u32 item_size, u32 length,
+ void *(*item_get)(u32 sect_type, void *section,
+ u32 index, u32 *offset),
+ void (*parse_item)(struct ice_hw *hw, u16 idx,
+ void *item, void *data,
+ int size))
+{
+ struct ice_seg *seg = hw->seg;
+ struct ice_pkg_enum state;
+ u16 idx = 0;
+ void *table;
+ void *data;
+
+ if (!seg)
+ return NULL;
+
+ table = ice_malloc(hw, item_size * length);
+ if (!table) {
+ ice_debug(hw, ICE_DBG_PARSER, "failed to allocate memory for table type %d.\n",
+ sect_type);
+ return NULL;
+ }
+
+ ice_memset(&state, 0, sizeof(state), ICE_NONDMA_MEM);
+ do {
+ data = ice_pkg_enum_entry(seg, &state, sect_type, NULL,
+ item_get);
+ seg = NULL;
+ if (data) {
+ struct ice_pkg_sect_hdr *hdr =
+ (struct ice_pkg_sect_hdr *)state.sect;
+
+ idx = hdr->offset + state.entry_idx;
+ parse_item(hw, idx,
+ (void *)((u64)table + idx * item_size),
+ data, item_size);
+ }
+ } while (data);
+
+ return table;
+}
/**
* ice_parser_create - create a parser instance
@@ -11,6 +99,7 @@
*/
enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr)
{
+ enum ice_status status;
struct ice_parser *p;
p = (struct ice_parser *)ice_malloc(hw, sizeof(struct ice_parser));
@@ -20,8 +109,17 @@ enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr)
p->hw = hw;
+ p->imem_table = ice_imem_table_get(hw);
+ if (!p->imem_table) {
+ status = ICE_ERR_PARAM;
+ goto err;
+ }
+
*psr = p;
return ICE_SUCCESS;
+err:
+ ice_parser_destroy(p);
+ return status;
}
/**
@@ -30,5 +128,7 @@ enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr)
*/
void ice_parser_destroy(struct ice_parser *psr)
{
+ ice_free(psr->hw, psr->imem_table);
+
ice_free(psr->hw, psr);
}
diff --git a/drivers/net/ice/base/ice_parser.h b/drivers/net/ice/base/ice_parser.h
index a0e33bb867..205a1345d4 100644
--- a/drivers/net/ice/base/ice_parser.h
+++ b/drivers/net/ice/base/ice_parser.h
@@ -7,6 +7,9 @@
struct ice_parser {
struct ice_hw *hw; /* pointer to the hardware structure */
+
+ /* load data from section ICE_SID_RX_PARSER_IMEM */
+ struct ice_imem_item *imem_table;
};
enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr);
diff --git a/drivers/net/ice/base/ice_parser_util.h b/drivers/net/ice/base/ice_parser_util.h
new file mode 100644
index 0000000000..5941a293e0
--- /dev/null
+++ b/drivers/net/ice/base/ice_parser_util.h
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2021 Intel Corporation
+ */
+
+#ifndef _ICE_PARSER_UTIL_H_
+#define _ICE_PARSER_UTIL_H_
+
+#include "ice_imem.h"
+
+struct ice_pkg_sect_hdr {
+ __le16 count;
+ __le16 offset;
+};
+
+void *ice_parser_sect_item_get(u32 sect_type, void *section,
+ u32 index, u32 *offset);
+
+void *ice_parser_create_table(struct ice_hw *hw, u32 sect_type,
+ u32 item_size, u32 length,
+ void *(*handler)(u32 sect_type, void *section,
+ u32 index, u32 *offset),
+ void (*parse_item)(struct ice_hw *hw, u16 idx,
+ void *item, void *data,
+ int size));
+#endif /* _ICE_PARSER_UTIL_H_ */
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 72cda11a4f..d81984633a 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -141,6 +141,7 @@ static inline u32 ice_round_to_num(u32 N, u32 R)
ICE_DBG_AQ_DESC | \
ICE_DBG_AQ_DESC_BUF | \
ICE_DBG_AQ_CMD)
+#define ICE_DBG_PARSER BIT_ULL(28)
#define ICE_DBG_USER BIT_ULL(31)
#define ICE_DBG_ALL 0xFFFFFFFFFFFFFFFFULL
diff --git a/drivers/net/ice/base/meson.build b/drivers/net/ice/base/meson.build
index 2b0af54a5c..d5170d972d 100644
--- a/drivers/net/ice/base/meson.build
+++ b/drivers/net/ice/base/meson.build
@@ -16,6 +16,7 @@ sources = [
'ice_vlan_mode.c',
'ice_ptp_hw.c',
'ice_parser.c',
+ 'ice_imem.c',
]
error_cflags = [
--
2.26.2
^ permalink raw reply [flat|nested] 21+ messages in thread
* [dpdk-dev] [PATCH 03/20] net/ice/base: init metainit table for parser
2021-09-17 11:02 [dpdk-dev] [PATCH 00/20] ice/base: add parser module Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 01/20] net/ice/base: add parser create and destroy skeleton Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 02/20] net/ice/base: init imem table for parser Qi Zhang
@ 2021-09-17 11:02 ` Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 04/20] net/ice/base: init parse graph cam " Qi Zhang
` (16 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Qi Zhang @ 2021-09-17 11:02 UTC (permalink / raw)
To: qiming.yang; +Cc: junfeng.guo, dev, Qi Zhang
Parse DDP section ICE_SID_RXPARSER_METADATA_INIT into an array of
struct ice_metainit_item.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_metainit.c | 143 +++++++++++++++++++++++++
drivers/net/ice/base/ice_metainit.h | 46 ++++++++
drivers/net/ice/base/ice_parser.c | 15 ++-
drivers/net/ice/base/ice_parser.h | 2 +
drivers/net/ice/base/ice_parser_util.h | 1 +
drivers/net/ice/base/meson.build | 1 +
6 files changed, 206 insertions(+), 2 deletions(-)
create mode 100644 drivers/net/ice/base/ice_metainit.c
create mode 100644 drivers/net/ice/base/ice_metainit.h
diff --git a/drivers/net/ice/base/ice_metainit.c b/drivers/net/ice/base/ice_metainit.c
new file mode 100644
index 0000000000..5d49c6861d
--- /dev/null
+++ b/drivers/net/ice/base/ice_metainit.c
@@ -0,0 +1,143 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2021 Intel Corporation
+ */
+
+#include "ice_common.h"
+#include "ice_parser_util.h"
+
+#define ICE_METAINIT_TABLE_SIZE 16
+
+/**
+ * ice_metainit_dump - dump an metainit item info
+ * @ice_hw: pointer to the hardware structure
+ * @item: metainit item to dump
+ */
+void ice_metainit_dump(struct ice_hw *hw, struct ice_metainit_item *item)
+{
+ ice_info(hw, "index = %d\n", item->idx);
+ ice_info(hw, "tsr = %d\n", item->tsr);
+ ice_info(hw, "ho = %d\n", item->ho);
+ ice_info(hw, "pc = %d\n", item->pc);
+ ice_info(hw, "pg_rn = %d\n", item->pg_rn);
+ ice_info(hw, "cd = %d\n", item->cd);
+ ice_info(hw, "gpr_a_ctrl = %d\n", item->gpr_a_ctrl);
+ ice_info(hw, "gpr_a_data_mdid = %d\n", item->gpr_a_data_mdid);
+ ice_info(hw, "gpr_a_data_start = %d\n", item->gpr_a_data_start);
+ ice_info(hw, "gpr_a_data_len = %d\n", item->gpr_a_data_len);
+ ice_info(hw, "gpr_a_id = %d\n", item->gpr_a_id);
+ ice_info(hw, "gpr_b_ctrl = %d\n", item->gpr_b_ctrl);
+ ice_info(hw, "gpr_b_data_mdid = %d\n", item->gpr_b_data_mdid);
+ ice_info(hw, "gpr_b_data_start = %d\n", item->gpr_b_data_start);
+ ice_info(hw, "gpr_b_data_len = %d\n", item->gpr_b_data_len);
+ ice_info(hw, "gpr_b_id = %d\n", item->gpr_b_id);
+ ice_info(hw, "gpr_c_ctrl = %d\n", item->gpr_c_ctrl);
+ ice_info(hw, "gpr_c_data_mdid = %d\n", item->gpr_c_data_mdid);
+ ice_info(hw, "gpr_c_data_start = %d\n", item->gpr_c_data_start);
+ ice_info(hw, "gpr_c_data_len = %d\n", item->gpr_c_data_len);
+ ice_info(hw, "gpr_c_id = %d\n", item->gpr_c_id);
+ ice_info(hw, "gpr_d_ctrl = %d\n", item->gpr_d_ctrl);
+ ice_info(hw, "gpr_d_data_mdid = %d\n", item->gpr_d_data_mdid);
+ ice_info(hw, "gpr_d_data_start = %d\n", item->gpr_d_data_start);
+ ice_info(hw, "gpr_d_data_len = %d\n", item->gpr_d_data_len);
+ ice_info(hw, "gpr_d_id = %d\n", item->gpr_d_id);
+ ice_info(hw, "flags = 0x%016" PRIx64 "\n", item->flags);
+}
+
+/** The function parses a 192 bits Metadata Init entry with below format:
+ * BIT 0-7: TCAM Search Key Register (mi->tsr)
+ * BIT 8-16: Header Offset (mi->ho)
+ * BIT 17-24: Program Counter (mi->pc)
+ * BIT 25-35: Parse Graph Root Node (mi->pg_rn)
+ * BIT 36-38: Control Domain (mi->cd)
+ * BIT 39: GPR_A Data Control (mi->gpr_a_ctrl)
+ * BIT 40-44: GPR_A MDID.ID (mi->gpr_a_data_mdid)
+ * BIT 45-48: GPR_A MDID.START (mi->gpr_a_data_start)
+ * BIT 49-53: GPR_A MDID.LEN (mi->gpr_a_data_len)
+ * BIT 54-55: reserved
+ * BIT 56-59: GPR_A ID (mi->gpr_a_id)
+ * BIT 60: GPR_B Data Control (mi->gpr_b_ctrl)
+ * BIT 61-65: GPR_B MDID.ID (mi->gpr_b_data_mdid)
+ * BIT 66-69: GPR_B MDID.START (mi->gpr_b_data_start)
+ * BIT 70-74: GPR_B MDID.LEN (mi->gpr_b_data_len)
+ * BIT 75-76: reserved
+ * BIT 77-80: GPR_B ID (mi->gpr_a_id)
+ * BIT 81: GPR_C Data Control (mi->gpr_c_ctrl)
+ * BIT 82-86: GPR_C MDID.ID (mi->gpr_c_data_mdid)
+ * BIT 87-90: GPR_C MDID.START (mi->gpr_c_data_start)
+ * BIT 91-95: GPR_C MDID.LEN (mi->gpr_c_data_len)
+ * BIT 96-97: reserved
+ * BIT 98-101: GPR_C ID (mi->gpr_c_id)
+ * BIT 102: GPR_D Data Control (mi->gpr_d_ctrl)
+ * BIT 103-107:GPR_D MDID.ID (mi->gpr_d_data_mdid)
+ * BIT 108-111:GPR_D MDID.START (mi->gpr_d_data_start)
+ * BIT 112-116:GPR_D MDID.LEN (mi->gpr_d_data_len)
+ * BIT 117-118:reserved
+ * BIT 119-122:GPR_D ID (mi->gpr_d_id)
+ * BIT 123-186:Flags (mi->flags)
+ * BIT 187-191:rserved
+ */
+static void _metainit_parse_item(struct ice_hw *hw, u16 idx, void *item,
+ void *data, int size)
+{
+ struct ice_metainit_item *mi = (struct ice_metainit_item *)item;
+ u8 *buf = (u8 *)data;
+ u64 d64;
+
+ mi->idx = idx;
+ d64 = *(u64 *)buf;
+
+ mi->tsr = (u8)(d64 & 0xff);
+ mi->ho = (u16)((d64 >> 8) & 0x1ff);
+ mi->pc = (u16)((d64 >> 17) & 0xff);
+ mi->pg_rn = (u16)((d64 >> 25) & 0x3ff);
+ mi->cd = (u16)((d64 >> 36) & 0x7);
+ mi->gpr_a_ctrl = ((d64 >> 39) & 0x1) != 0;
+ mi->gpr_a_data_mdid = (u8)((d64 >> 40) & 0x1f);
+ mi->gpr_a_data_start = (u8)((d64 >> 45) & 0xf);
+ mi->gpr_a_data_len = (u8)((d64 >> 49) & 0x1f);
+ mi->gpr_a_id = (u8)((d64 >> 56) & 0xf);
+
+ d64 = *(u64 *)&buf[7] >> 4;
+ mi->gpr_b_ctrl = (d64 & 0x1) != 0;
+ mi->gpr_b_data_mdid = (u8)((d64 >> 1) & 0x1f);
+ mi->gpr_b_data_start = (u8)((d64 >> 6) & 0xf);
+ mi->gpr_b_data_len = (u8)((d64 >> 10) & 0x1f);
+ mi->gpr_b_id = (u8)((d64 >> 17) & 0xf);
+
+ mi->gpr_c_ctrl = ((d64 >> 21) & 0x1) != 0;
+ mi->gpr_c_data_mdid = (u8)((d64 >> 22) & 0x1f);
+ mi->gpr_c_data_start = (u8)((d64 >> 27) & 0xf);
+ mi->gpr_c_data_len = (u8)((d64 >> 31) & 0x1f);
+ mi->gpr_c_id = (u8)((d64 >> 38) & 0xf);
+
+ mi->gpr_d_ctrl = ((d64 >> 42) & 0x1) != 0;
+ mi->gpr_d_data_mdid = (u8)((d64 >> 43) & 0x1f);
+ mi->gpr_d_data_start = (u8)((d64 >> 48) & 0xf);
+ mi->gpr_d_data_len = (u8)((d64 >> 52) & 0x1f);
+
+ d64 = *(u64 *)&buf[14] >> 7;
+ mi->gpr_d_id = (u8)(d64 & 0xf);
+
+ d64 = *(u64 *)&buf[15] >> 3;
+ mi->flags = d64;
+
+ d64 = ((*(u64 *)&buf[16] >> 56) & 0x7);
+ mi->flags |= (d64 << 61);
+
+ if (hw->debug_mask & ICE_DBG_PARSER)
+ ice_metainit_dump(hw, mi);
+}
+
+/**
+ * ice_metainit_table_get - create a metainit table
+ * @ice_hw: pointer to the hardware structure
+ */
+struct ice_metainit_item *ice_metainit_table_get(struct ice_hw *hw)
+{
+ return (struct ice_metainit_item *)
+ ice_parser_create_table(hw, ICE_SID_RXPARSER_METADATA_INIT,
+ sizeof(struct ice_metainit_item),
+ ICE_METAINIT_TABLE_SIZE,
+ ice_parser_sect_item_get,
+ _metainit_parse_item);
+}
diff --git a/drivers/net/ice/base/ice_metainit.h b/drivers/net/ice/base/ice_metainit.h
new file mode 100644
index 0000000000..d46f1d7b47
--- /dev/null
+++ b/drivers/net/ice/base/ice_metainit.h
@@ -0,0 +1,46 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2021 Intel Corporation
+ */
+
+#ifndef _ICE_METAINIT_H_
+#define _ICE_METAINIT_H_
+
+struct ice_metainit_item {
+ u16 idx;
+
+ u8 tsr;
+ u16 ho;
+ u16 pc;
+ u16 pg_rn;
+ u8 cd;
+
+ bool gpr_a_ctrl;
+ u8 gpr_a_data_mdid;
+ u8 gpr_a_data_start;
+ u8 gpr_a_data_len;
+ u8 gpr_a_id;
+
+ bool gpr_b_ctrl;
+ u8 gpr_b_data_mdid;
+ u8 gpr_b_data_start;
+ u8 gpr_b_data_len;
+ u8 gpr_b_id;
+
+ bool gpr_c_ctrl;
+ u8 gpr_c_data_mdid;
+ u8 gpr_c_data_start;
+ u8 gpr_c_data_len;
+ u8 gpr_c_id;
+
+ bool gpr_d_ctrl;
+ u8 gpr_d_data_mdid;
+ u8 gpr_d_data_start;
+ u8 gpr_d_data_len;
+ u8 gpr_d_id;
+
+ u64 flags;
+};
+
+void ice_metainit_dump(struct ice_hw *hw, struct ice_metainit_item *item);
+struct ice_metainit_item *ice_metainit_table_get(struct ice_hw *hw);
+#endif /*_ICE_METAINIT_H_ */
diff --git a/drivers/net/ice/base/ice_parser.c b/drivers/net/ice/base/ice_parser.c
index 6d9aaec911..c12301727d 100644
--- a/drivers/net/ice/base/ice_parser.c
+++ b/drivers/net/ice/base/ice_parser.c
@@ -5,8 +5,9 @@
#include "ice_common.h"
#include "ice_parser_util.h"
-#define ICE_SEC_DATA_OFFSET 4
-#define ICE_SID_RXPARSER_IMEM_ENTRY_SIZE 48
+#define ICE_SEC_DATA_OFFSET 4
+#define ICE_SID_RXPARSER_IMEM_ENTRY_SIZE 48
+#define ICE_SID_RXPARSER_METADATA_INIT_ENTRY_SIZE 24
/**
* ice_parser_sect_item_get - parse a item from a section
@@ -29,6 +30,9 @@ void *ice_parser_sect_item_get(u32 sect_type, void *section,
case ICE_SID_RXPARSER_IMEM:
size = ICE_SID_RXPARSER_IMEM_ENTRY_SIZE;
break;
+ case ICE_SID_RXPARSER_METADATA_INIT:
+ size = ICE_SID_RXPARSER_METADATA_INIT_ENTRY_SIZE;
+ break;
default:
return NULL;
}
@@ -115,6 +119,12 @@ enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr)
goto err;
}
+ p->mi_table = ice_metainit_table_get(hw);
+ if (!p->mi_table) {
+ status = ICE_ERR_PARAM;
+ goto err;
+ }
+
*psr = p;
return ICE_SUCCESS;
err:
@@ -129,6 +139,7 @@ enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr)
void ice_parser_destroy(struct ice_parser *psr)
{
ice_free(psr->hw, psr->imem_table);
+ ice_free(psr->hw, psr->mi_table);
ice_free(psr->hw, psr);
}
diff --git a/drivers/net/ice/base/ice_parser.h b/drivers/net/ice/base/ice_parser.h
index 205a1345d4..c06f19daa1 100644
--- a/drivers/net/ice/base/ice_parser.h
+++ b/drivers/net/ice/base/ice_parser.h
@@ -10,6 +10,8 @@ struct ice_parser {
/* load data from section ICE_SID_RX_PARSER_IMEM */
struct ice_imem_item *imem_table;
+ /* load data from section ICE_SID_RXPARSER_METADATA_INIT */
+ struct ice_metainit_item *mi_table;
};
enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr);
diff --git a/drivers/net/ice/base/ice_parser_util.h b/drivers/net/ice/base/ice_parser_util.h
index 5941a293e0..e2054cb7d4 100644
--- a/drivers/net/ice/base/ice_parser_util.h
+++ b/drivers/net/ice/base/ice_parser_util.h
@@ -6,6 +6,7 @@
#define _ICE_PARSER_UTIL_H_
#include "ice_imem.h"
+#include "ice_metainit.h"
struct ice_pkg_sect_hdr {
__le16 count;
diff --git a/drivers/net/ice/base/meson.build b/drivers/net/ice/base/meson.build
index d5170d972d..8b8efd815f 100644
--- a/drivers/net/ice/base/meson.build
+++ b/drivers/net/ice/base/meson.build
@@ -17,6 +17,7 @@ sources = [
'ice_ptp_hw.c',
'ice_parser.c',
'ice_imem.c',
+ 'ice_metainit.c',
]
error_cflags = [
--
2.26.2
^ permalink raw reply [flat|nested] 21+ messages in thread
* [dpdk-dev] [PATCH 04/20] net/ice/base: init parse graph cam table for parser
2021-09-17 11:02 [dpdk-dev] [PATCH 00/20] ice/base: add parser module Qi Zhang
` (2 preceding siblings ...)
2021-09-17 11:02 ` [dpdk-dev] [PATCH 03/20] net/ice/base: init metainit " Qi Zhang
@ 2021-09-17 11:02 ` Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 05/20] net/ice/base: init boost TCAM " Qi Zhang
` (15 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Qi Zhang @ 2021-09-17 11:02 UTC (permalink / raw)
To: qiming.yang; +Cc: junfeng.guo, dev, Qi Zhang
Parse DDP section ICE_SID_RXPARSER_CAM or ICE_SID_RXPARSER_PG_SPILL
into an array of struct ice_pg_cam_item.
Parse DDP section ICE_SID_RXPARSER_NOMATCH_CAM or
ICE_SID_RXPARSER_NOMATCH_SPILL into an array of struct ice_pg_nm_cam_item.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_parser.c | 44 +++++
drivers/net/ice/base/ice_parser.h | 12 ++
drivers/net/ice/base/ice_pg_cam.c | 298 ++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_pg_cam.h | 68 +++++++
drivers/net/ice/base/meson.build | 1 +
5 files changed, 423 insertions(+)
create mode 100644 drivers/net/ice/base/ice_pg_cam.c
create mode 100644 drivers/net/ice/base/ice_pg_cam.h
diff --git a/drivers/net/ice/base/ice_parser.c b/drivers/net/ice/base/ice_parser.c
index c12301727d..4c72e32fae 100644
--- a/drivers/net/ice/base/ice_parser.c
+++ b/drivers/net/ice/base/ice_parser.c
@@ -8,6 +8,10 @@
#define ICE_SEC_DATA_OFFSET 4
#define ICE_SID_RXPARSER_IMEM_ENTRY_SIZE 48
#define ICE_SID_RXPARSER_METADATA_INIT_ENTRY_SIZE 24
+#define ICE_SID_RXPARSER_CAM_ENTRY_SIZE 16
+#define ICE_SID_RXPARSER_PG_SPILL_ENTRY_SIZE 17
+#define ICE_SID_RXPARSER_NOMATCH_CAM_ENTRY_SIZE 12
+#define ICE_SID_RXPARSER_NOMATCH_SPILL_ENTRY_SIZE 13
/**
* ice_parser_sect_item_get - parse a item from a section
@@ -33,6 +37,18 @@ void *ice_parser_sect_item_get(u32 sect_type, void *section,
case ICE_SID_RXPARSER_METADATA_INIT:
size = ICE_SID_RXPARSER_METADATA_INIT_ENTRY_SIZE;
break;
+ case ICE_SID_RXPARSER_CAM:
+ size = ICE_SID_RXPARSER_CAM_ENTRY_SIZE;
+ break;
+ case ICE_SID_RXPARSER_PG_SPILL:
+ size = ICE_SID_RXPARSER_PG_SPILL_ENTRY_SIZE;
+ break;
+ case ICE_SID_RXPARSER_NOMATCH_CAM:
+ size = ICE_SID_RXPARSER_NOMATCH_CAM_ENTRY_SIZE;
+ break;
+ case ICE_SID_RXPARSER_NOMATCH_SPILL:
+ size = ICE_SID_RXPARSER_NOMATCH_SPILL_ENTRY_SIZE;
+ break;
default:
return NULL;
}
@@ -125,6 +141,30 @@ enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr)
goto err;
}
+ p->pg_cam_table = ice_pg_cam_table_get(hw);
+ if (!p->pg_cam_table) {
+ status = ICE_ERR_PARAM;
+ goto err;
+ }
+
+ p->pg_sp_cam_table = ice_pg_sp_cam_table_get(hw);
+ if (!p->pg_sp_cam_table) {
+ status = ICE_ERR_PARAM;
+ goto err;
+ }
+
+ p->pg_nm_cam_table = ice_pg_nm_cam_table_get(hw);
+ if (!p->pg_nm_cam_table) {
+ status = ICE_ERR_PARAM;
+ goto err;
+ }
+
+ p->pg_nm_sp_cam_table = ice_pg_nm_sp_cam_table_get(hw);
+ if (!p->pg_nm_sp_cam_table) {
+ status = ICE_ERR_PARAM;
+ goto err;
+ }
+
*psr = p;
return ICE_SUCCESS;
err:
@@ -140,6 +180,10 @@ void ice_parser_destroy(struct ice_parser *psr)
{
ice_free(psr->hw, psr->imem_table);
ice_free(psr->hw, psr->mi_table);
+ ice_free(psr->hw, psr->pg_cam_table);
+ ice_free(psr->hw, psr->pg_sp_cam_table);
+ ice_free(psr->hw, psr->pg_nm_cam_table);
+ ice_free(psr->hw, psr->pg_nm_sp_cam_table);
ice_free(psr->hw, psr);
}
diff --git a/drivers/net/ice/base/ice_parser.h b/drivers/net/ice/base/ice_parser.h
index c06f19daa1..83246e49b3 100644
--- a/drivers/net/ice/base/ice_parser.h
+++ b/drivers/net/ice/base/ice_parser.h
@@ -5,6 +5,10 @@
#ifndef _ICE_PARSER_H_
#define _ICE_PARSRR_H_
+#include "ice_metainit.h"
+#include "ice_imem.h"
+#include "ice_pg_cam.h"
+
struct ice_parser {
struct ice_hw *hw; /* pointer to the hardware structure */
@@ -12,6 +16,14 @@ struct ice_parser {
struct ice_imem_item *imem_table;
/* load data from section ICE_SID_RXPARSER_METADATA_INIT */
struct ice_metainit_item *mi_table;
+ /* load data from section ICE_SID_RXPARSER_CAM */
+ struct ice_pg_cam_item *pg_cam_table;
+ /* load data from section ICE_SID_RXPARSER_PG_SPILL */
+ struct ice_pg_cam_item *pg_sp_cam_table;
+ /* load data from section ICE_SID_RXPARSER_NOMATCH_CAM */
+ struct ice_pg_nm_cam_item *pg_nm_cam_table;
+ /* load data from section ICE_SID_RXPARSER_NOMATCH_SPILL */
+ struct ice_pg_nm_cam_item *pg_nm_sp_cam_table;
};
enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr);
diff --git a/drivers/net/ice/base/ice_pg_cam.c b/drivers/net/ice/base/ice_pg_cam.c
new file mode 100644
index 0000000000..171986bf3d
--- /dev/null
+++ b/drivers/net/ice/base/ice_pg_cam.c
@@ -0,0 +1,298 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2021 Intel Corporation
+ */
+
+#include "ice_common.h"
+#include "ice_parser_util.h"
+
+static void _pg_cam_key_dump(struct ice_hw *hw, struct ice_pg_cam_key *key)
+{
+ ice_info(hw, "key:\n");
+ ice_info(hw, "\tvalid = %d\n", key->valid);
+ ice_info(hw, "\tnode_id = %d\n", key->node_id);
+ ice_info(hw, "\tflag0 = %d\n", key->flag0);
+ ice_info(hw, "\tflag1 = %d\n", key->flag1);
+ ice_info(hw, "\tflag2 = %d\n", key->flag2);
+ ice_info(hw, "\tflag3 = %d\n", key->flag3);
+ ice_info(hw, "\tboost_idx = %d\n", key->boost_idx);
+ ice_info(hw, "\talu_reg = 0x%04x\n", key->alu_reg);
+ ice_info(hw, "\tnext_proto = 0x%08x\n", key->next_proto);
+}
+
+static void _pg_nm_cam_key_dump(struct ice_hw *hw,
+ struct ice_pg_nm_cam_key *key)
+{
+ ice_info(hw, "key:\n");
+ ice_info(hw, "\tvalid = %d\n", key->valid);
+ ice_info(hw, "\tnode_id = %d\n", key->node_id);
+ ice_info(hw, "\tflag0 = %d\n", key->flag0);
+ ice_info(hw, "\tflag1 = %d\n", key->flag1);
+ ice_info(hw, "\tflag2 = %d\n", key->flag2);
+ ice_info(hw, "\tflag3 = %d\n", key->flag3);
+ ice_info(hw, "\tboost_idx = %d\n", key->boost_idx);
+ ice_info(hw, "\talu_reg = 0x%04x\n", key->alu_reg);
+}
+
+static void _pg_cam_action_dump(struct ice_hw *hw,
+ struct ice_pg_cam_action *action)
+{
+ ice_info(hw, "action:\n");
+ ice_info(hw, "\tnext_node = %d\n", action->next_node);
+ ice_info(hw, "\tnext_pc = %d\n", action->next_pc);
+ ice_info(hw, "\tis_pg = %d\n", action->is_pg);
+ ice_info(hw, "\tproto_id = %d\n", action->proto_id);
+ ice_info(hw, "\tis_mg = %d\n", action->is_mg);
+ ice_info(hw, "\tmarker_id = %d\n", action->marker_id);
+ ice_info(hw, "\tis_last_round = %d\n", action->is_last_round);
+ ice_info(hw, "\tho_polarity = %d\n", action->ho_polarity);
+ ice_info(hw, "\tho_inc = %d\n", action->ho_inc);
+}
+
+/**
+ * ice_pg_cam_dump - dump an parse graph cam info
+ * @ice_hw: pointer to the hardware structure
+ * @item: parse graph cam to dump
+ */
+void ice_pg_cam_dump(struct ice_hw *hw, struct ice_pg_cam_item *item)
+{
+ ice_info(hw, "index = %d\n", item->idx);
+ _pg_cam_key_dump(hw, &item->key);
+ _pg_cam_action_dump(hw, &item->action);
+}
+
+/**
+ * ice_pg_nm_cam_dump - dump an parse graph no match cam info
+ * @ice_hw: pointer to the hardware structure
+ * @item: parse graph no match cam to dump
+ */
+void ice_pg_nm_cam_dump(struct ice_hw *hw, struct ice_pg_nm_cam_item *item)
+{
+ ice_info(hw, "index = %d\n", item->idx);
+ _pg_nm_cam_key_dump(hw, &item->key);
+ _pg_cam_action_dump(hw, &item->action);
+}
+
+/** The function parses a 55 bits Parse Graph CAM Action with below format:
+ * BIT 0-11: Next Node ID (action->next_node)
+ * BIT 12-19: Next PC (action->next_pc)
+ * BIT 20: Is Protocol Group (action->is_pg)
+ * BIT 21-23: reserved
+ * BIT 24-31: Protocol ID (action->proto_id)
+ * BIT 32: Is Marker Group (action->is_mg)
+ * BIT 33-40: Marker ID (action->marker_id)
+ * BIT 41: Is Last Round (action->is_last_round)
+ * BIT 42: Header Offset Polarity (action->ho_poloarity)
+ * BIT 43-51: Header Offset Inc (action->ho_inc)
+ * BIT 52-54: reserved
+ */
+static void _pg_cam_action_init(struct ice_pg_cam_action *action, u64 data)
+{
+ action->next_node = (u16)(data & 0x7ff);
+ action->next_pc = (u8)((data >> 11) & 0xff);
+ action->is_pg = ((data >> 19) & 0x1) != 0;
+ action->proto_id = ((data >> 23) & 0xff);
+ action->is_mg = ((data >> 31) & 0x1) != 0;
+ action->marker_id = ((data >> 32) & 0xff);
+ action->is_last_round = ((data >> 40) & 0x1) != 0;
+ action->ho_polarity = ((data >> 41) & 0x1) != 0;
+ action->ho_inc = ((data >> 42) & 0x1ff);
+}
+
+/** The function parses a 41 bits Parse Graph NoMatch CAM Key with below format:
+ * BIT 0: Valid (key->valid)
+ * BIT 1-11: Node ID (key->node_id)
+ * BIT 12: Flag 0 (key->flag0)
+ * BIT 13: Flag 1 (key->flag1)
+ * BIT 14: Flag 2 (key->flag2)
+ * BIT 15: Flag 3 (key->flag3)
+ * BIT 16: Boost Hit (key->boost_idx to 0 if it is 0)
+ * BIT 17-24: Boost Index (key->boost_idx only if Boost Hit is not 0)
+ * BIT 25-40: ALU Reg (key->alu_reg)
+ */
+static void _pg_nm_cam_key_init(struct ice_pg_nm_cam_key *key, u64 data)
+{
+ key->valid = (data & 0x1) != 0;
+ key->node_id = (u16)((data >> 1) & 0x7ff);
+ key->flag0 = ((data >> 12) & 0x1) != 0;
+ key->flag1 = ((data >> 13) & 0x1) != 0;
+ key->flag2 = ((data >> 14) & 0x1) != 0;
+ key->flag3 = ((data >> 15) & 0x1) != 0;
+ if ((data >> 16) & 0x1)
+ key->boost_idx = (u8)((data >> 17) & 0xff);
+ else
+ key->boost_idx = 0;
+ key->alu_reg = (u16)((data >> 25) & 0xffff);
+}
+
+/** The function parses a 73 bits Parse Graph CAM Key with below format:
+ * BIT 0: Valid (key->valid)
+ * BIT 1-11: Node ID (key->node_id)
+ * BIT 12: Flag 0 (key->flag0)
+ * BIT 13: Flag 1 (key->flag1)
+ * BIT 14: Flag 2 (key->flag2)
+ * BIT 15: Flag 3 (key->flag3)
+ * BIT 16: Boost Hit (key->boost_idx to 0 if it is 0)
+ * BIT 17-24: Boost Index (key->boost_idx only if Boost Hit is not 0)
+ * BIT 25-40: ALU Reg (key->alu_reg)
+ * BIT 41-72: Next Proto Key (key->next_proto)
+ */
+static void _pg_cam_key_init(struct ice_pg_cam_key *key, u8 *data)
+{
+ u64 d64 = *(u64 *)data;
+
+ key->valid = (d64 & 0x1) != 0;
+ key->node_id = (u16)((d64 >> 1) & 0x7ff);
+ key->flag0 = ((d64 >> 12) & 0x1) != 0;
+ key->flag1 = ((d64 >> 13) & 0x1) != 0;
+ key->flag2 = ((d64 >> 14) & 0x1) != 0;
+ key->flag3 = ((d64 >> 15) & 0x1) != 0;
+ if ((d64 >> 16) & 0x1)
+ key->boost_idx = (u8)((d64 >> 17) & 0xff);
+ else
+ key->boost_idx = 0;
+ key->alu_reg = (u16)((d64 >> 25) & 0xffff);
+
+ key->next_proto = (*(u32 *)&data[5] >> 1);
+ key->next_proto |= ((u32)(data[9] & 0x1) << 31);
+}
+
+/** The function parses a 128 bits Parse Graph CAM Entry with below format:
+ * BIT 0-72: Key (ci->key)
+ * BIT 73-127: Action (ci->action)
+ */
+static void _pg_cam_parse_item(struct ice_hw *hw, u16 idx, void *item,
+ void *data, int size)
+{
+ struct ice_pg_cam_item *ci = (struct ice_pg_cam_item *)item;
+ u8 *buf = (u8 *)data;
+ u64 d64;
+
+ ci->idx = idx;
+ d64 = (*(u64 *)&buf[9] >> 1);
+ _pg_cam_key_init(&ci->key, buf);
+ _pg_cam_action_init(&ci->action, d64);
+
+ if (hw->debug_mask & ICE_DBG_PARSER)
+ ice_pg_cam_dump(hw, ci);
+}
+
+/** The function parses a 136 bits Parse Graph Spill CAM Entry with below
+ * format:
+ * BIT 0-55: Action (ci->key)
+ * BIT 56-135: Key (ci->action)
+ */
+static void _pg_sp_cam_parse_item(struct ice_hw *hw, u16 idx, void *item,
+ void *data, int size)
+{
+ struct ice_pg_cam_item *ci = (struct ice_pg_cam_item *)item;
+ u8 *buf = (u8 *)data;
+ u64 d64;
+
+ ci->idx = idx;
+ d64 = *(u64 *)buf;
+ _pg_cam_action_init(&ci->action, d64);
+ _pg_cam_key_init(&ci->key, &buf[7]);
+
+ if (hw->debug_mask & ICE_DBG_PARSER)
+ ice_pg_cam_dump(hw, ci);
+}
+
+/** The function parses a 96 bits Parse Graph NoMatch CAM Entry with below
+ * format:
+ * BIT 0-40: Key (ci->key)
+ * BIT 41-95: Action (ci->action)
+ */
+static void _pg_nm_cam_parse_item(struct ice_hw *hw, u16 idx, void *item,
+ void *data, int size)
+{
+ struct ice_pg_nm_cam_item *ci = (struct ice_pg_nm_cam_item *)item;
+ u8 *buf = (u8 *)data;
+ u64 d64;
+
+ ci->idx = idx;
+ d64 = *(u64 *)buf;
+ _pg_nm_cam_key_init(&ci->key, d64);
+ d64 = (*(u64 *)&buf[5] >> 1);
+ _pg_cam_action_init(&ci->action, d64);
+
+ if (hw->debug_mask & ICE_DBG_PARSER)
+ ice_pg_nm_cam_dump(hw, ci);
+}
+
+/** The function parses a 104 bits Parse Graph NoMatch Spill CAM Entry with
+ * below format:
+ * BIT 0-55: Key (ci->key)
+ * BIT 56-103: Action (ci->action)
+ */
+static void _pg_nm_sp_cam_parse_item(struct ice_hw *hw, u16 idx, void *item,
+ void *data, int size)
+{
+ struct ice_pg_nm_cam_item *ci = (struct ice_pg_nm_cam_item *)item;
+ u8 *buf = (u8 *)data;
+ u64 d64;
+
+ ci->idx = idx;
+ d64 = *(u64 *)buf;
+ _pg_cam_action_init(&ci->action, d64);
+ d64 = *(u64 *)&buf[7];
+ _pg_nm_cam_key_init(&ci->key, d64);
+
+ if (hw->debug_mask & ICE_DBG_PARSER)
+ ice_pg_nm_cam_dump(hw, ci);
+}
+
+/**
+ * ice_pg_cam_table_get - create a parse graph cam table
+ * @ice_hw: pointer to the hardware structure
+ */
+struct ice_pg_cam_item *ice_pg_cam_table_get(struct ice_hw *hw)
+{
+ return (struct ice_pg_cam_item *)
+ ice_parser_create_table(hw, ICE_SID_RXPARSER_CAM,
+ sizeof(struct ice_pg_cam_item),
+ ICE_PG_CAM_TABLE_SIZE,
+ ice_parser_sect_item_get,
+ _pg_cam_parse_item);
+}
+
+/**
+ * ice_pg_sp_cam_table_get - create a parse graph spill cam table
+ * @ice_hw: pointer to the hardware structure
+ */
+struct ice_pg_cam_item *ice_pg_sp_cam_table_get(struct ice_hw *hw)
+{
+ return (struct ice_pg_cam_item *)
+ ice_parser_create_table(hw, ICE_SID_RXPARSER_PG_SPILL,
+ sizeof(struct ice_pg_cam_item),
+ ICE_PG_SP_CAM_TABLE_SIZE,
+ ice_parser_sect_item_get,
+ _pg_sp_cam_parse_item);
+}
+
+/**
+ * ice_pg_nm_cam_table_get - create a parse graph no match cam table
+ * @ice_hw: pointer to the hardware structure
+ */
+struct ice_pg_nm_cam_item *ice_pg_nm_cam_table_get(struct ice_hw *hw)
+{
+ return (struct ice_pg_nm_cam_item *)
+ ice_parser_create_table(hw, ICE_SID_RXPARSER_NOMATCH_CAM,
+ sizeof(struct ice_pg_nm_cam_item),
+ ICE_PG_NM_CAM_TABLE_SIZE,
+ ice_parser_sect_item_get,
+ _pg_nm_cam_parse_item);
+}
+
+/**
+ * ice_pg_nm_sp_cam_table_get - create a parse graph no match spill cam table
+ * @ice_hw: pointer to the hardware structure
+ */
+struct ice_pg_nm_cam_item *ice_pg_nm_sp_cam_table_get(struct ice_hw *hw)
+{
+ return (struct ice_pg_nm_cam_item *)
+ ice_parser_create_table(hw, ICE_SID_RXPARSER_NOMATCH_SPILL,
+ sizeof(struct ice_pg_nm_cam_item),
+ ICE_PG_NM_SP_CAM_TABLE_SIZE,
+ ice_parser_sect_item_get,
+ _pg_nm_sp_cam_parse_item);
+}
diff --git a/drivers/net/ice/base/ice_pg_cam.h b/drivers/net/ice/base/ice_pg_cam.h
new file mode 100644
index 0000000000..fcb2e11e54
--- /dev/null
+++ b/drivers/net/ice/base/ice_pg_cam.h
@@ -0,0 +1,68 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2021 Intel Corporation
+ */
+
+#ifndef _ICE_PG_CAM_H_
+#define _ICE_PG_CAM_H_
+
+#define ICE_PG_CAM_TABLE_SIZE 2048
+#define ICE_PG_SP_CAM_TABLE_SIZE 128
+#define ICE_PG_NM_CAM_TABLE_SIZE 1024
+#define ICE_PG_NM_SP_CAM_TABLE_SIZE 64
+
+struct ice_pg_cam_key {
+ bool valid;
+ u16 node_id;
+ bool flag0;
+ bool flag1;
+ bool flag2;
+ bool flag3;
+ u8 boost_idx;
+ u16 alu_reg;
+ u32 next_proto;
+};
+
+struct ice_pg_nm_cam_key {
+ bool valid;
+ u16 node_id;
+ bool flag0;
+ bool flag1;
+ bool flag2;
+ bool flag3;
+ u8 boost_idx;
+ u16 alu_reg;
+};
+
+struct ice_pg_cam_action {
+ u16 next_node;
+ u8 next_pc;
+ bool is_pg;
+ u8 proto_id;
+ bool is_mg;
+ u8 marker_id;
+ bool is_last_round;
+ bool ho_polarity;
+ u16 ho_inc;
+};
+
+struct ice_pg_cam_item {
+ u16 idx;
+ struct ice_pg_cam_key key;
+ struct ice_pg_cam_action action;
+};
+
+struct ice_pg_nm_cam_item {
+ u16 idx;
+ struct ice_pg_nm_cam_key key;
+ struct ice_pg_cam_action action;
+};
+
+void ice_pg_cam_dump(struct ice_hw *hw, struct ice_pg_cam_item *item);
+void ice_pg_nm_cam_dump(struct ice_hw *hw, struct ice_pg_nm_cam_item *item);
+
+struct ice_pg_cam_item *ice_pg_cam_table_get(struct ice_hw *hw);
+struct ice_pg_cam_item *ice_pg_sp_cam_table_get(struct ice_hw *hw);
+
+struct ice_pg_nm_cam_item *ice_pg_nm_cam_table_get(struct ice_hw *hw);
+struct ice_pg_nm_cam_item *ice_pg_nm_sp_cam_table_get(struct ice_hw *hw);
+#endif /* _ICE_PG_CAM_H_ */
diff --git a/drivers/net/ice/base/meson.build b/drivers/net/ice/base/meson.build
index 8b8efd815f..56dfb390e8 100644
--- a/drivers/net/ice/base/meson.build
+++ b/drivers/net/ice/base/meson.build
@@ -18,6 +18,7 @@ sources = [
'ice_parser.c',
'ice_imem.c',
'ice_metainit.c',
+ 'ice_pg_cam.c',
]
error_cflags = [
--
2.26.2
^ permalink raw reply [flat|nested] 21+ messages in thread
* [dpdk-dev] [PATCH 05/20] net/ice/base: init boost TCAM table for parser
2021-09-17 11:02 [dpdk-dev] [PATCH 00/20] ice/base: add parser module Qi Zhang
` (3 preceding siblings ...)
2021-09-17 11:02 ` [dpdk-dev] [PATCH 04/20] net/ice/base: init parse graph cam " Qi Zhang
@ 2021-09-17 11:02 ` Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 06/20] net/ice/base: init ptype marker " Qi Zhang
` (14 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Qi Zhang @ 2021-09-17 11:02 UTC (permalink / raw)
To: qiming.yang; +Cc: junfeng.guo, dev, Qi Zhang
Parse DDP section ICE_SID_RXPARSER_CAM into an array of
ice_bst_tcam_item.
Parse DDP section ICE_SID_LBL_RXPARSER_TMEM into an array of
ice_lbl_item.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_bst_tcam.c | 241 +++++++++++++++++++++++++
drivers/net/ice/base/ice_bst_tcam.h | 28 +++
drivers/net/ice/base/ice_imem.c | 2 +-
drivers/net/ice/base/ice_metainit.c | 2 +-
drivers/net/ice/base/ice_parser.c | 48 ++++-
drivers/net/ice/base/ice_parser.h | 5 +
drivers/net/ice/base/ice_parser_util.h | 12 +-
drivers/net/ice/base/ice_pg_cam.c | 8 +-
drivers/net/ice/base/meson.build | 1 +
9 files changed, 337 insertions(+), 10 deletions(-)
create mode 100644 drivers/net/ice/base/ice_bst_tcam.c
create mode 100644 drivers/net/ice/base/ice_bst_tcam.h
diff --git a/drivers/net/ice/base/ice_bst_tcam.c b/drivers/net/ice/base/ice_bst_tcam.c
new file mode 100644
index 0000000000..1c82359681
--- /dev/null
+++ b/drivers/net/ice/base/ice_bst_tcam.c
@@ -0,0 +1,241 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2021 Intel Corporation
+ */
+
+#include "ice_common.h"
+#include "ice_parser_util.h"
+
+#define ICE_BST_TCAM_TABLE_SIZE 256
+
+static void _bst_np_kb_dump(struct ice_hw *hw, struct ice_np_keybuilder *kb)
+{
+ ice_info(hw, "next proto key builder:\n");
+ ice_info(hw, "\tops = %d\n", kb->ops);
+ ice_info(hw, "\tstart_or_reg0 = %d\n", kb->start_or_reg0);
+ ice_info(hw, "\tlen_or_reg1 = %d\n", kb->len_or_reg1);
+}
+
+static void _bst_pg_kb_dump(struct ice_hw *hw, struct ice_pg_keybuilder *kb)
+{
+ ice_info(hw, "parse graph key builder:\n");
+ ice_info(hw, "\tflag0_ena = %d\n", kb->flag0_ena);
+ ice_info(hw, "\tflag1_ena = %d\n", kb->flag1_ena);
+ ice_info(hw, "\tflag2_ena = %d\n", kb->flag2_ena);
+ ice_info(hw, "\tflag3_ena = %d\n", kb->flag3_ena);
+ ice_info(hw, "\tflag0_idx = %d\n", kb->flag0_idx);
+ ice_info(hw, "\tflag1_idx = %d\n", kb->flag1_idx);
+ ice_info(hw, "\tflag2_idx = %d\n", kb->flag2_idx);
+ ice_info(hw, "\tflag3_idx = %d\n", kb->flag3_idx);
+ ice_info(hw, "\talu_reg_idx = %d\n", kb->alu_reg_idx);
+}
+
+static void _bst_alu_dump(struct ice_hw *hw, struct ice_alu *alu, int index)
+{
+ ice_info(hw, "alu%d:\n", index);
+ ice_info(hw, "\topc = %d\n", alu->opc);
+ ice_info(hw, "\tsrc_start = %d\n", alu->src_start);
+ ice_info(hw, "\tsrc_len = %d\n", alu->src_len);
+ ice_info(hw, "\tshift_xlate_select = %d\n", alu->shift_xlate_select);
+ ice_info(hw, "\tshift_xlate_key = %d\n", alu->shift_xlate_key);
+ ice_info(hw, "\tsrc_reg_id = %d\n", alu->src_reg_id);
+ ice_info(hw, "\tdst_reg_id = %d\n", alu->dst_reg_id);
+ ice_info(hw, "\tinc0 = %d\n", alu->inc0);
+ ice_info(hw, "\tinc1 = %d\n", alu->inc1);
+ ice_info(hw, "\tproto_offset_opc = %d\n", alu->proto_offset_opc);
+ ice_info(hw, "\tproto_offset = %d\n", alu->proto_offset);
+ ice_info(hw, "\tbranch_addr = %d\n", alu->branch_addr);
+ ice_info(hw, "\timm = %d\n", alu->imm);
+ ice_info(hw, "\tdst_start = %d\n", alu->dst_start);
+ ice_info(hw, "\tdst_len = %d\n", alu->dst_len);
+ ice_info(hw, "\tflags_extr_imm = %d\n", alu->flags_extr_imm);
+ ice_info(hw, "\tflags_start_imm= %d\n", alu->flags_start_imm);
+}
+
+/**
+ * ice_bst_tcam_dump - dump a boost tcam info
+ * @ice_hw: pointer to the hardware structure
+ * @item: boost tcam to dump
+ */
+void ice_bst_tcam_dump(struct ice_hw *hw, struct ice_bst_tcam_item *item)
+{
+ int i;
+
+ ice_info(hw, "address = %d\n", item->address);
+ ice_info(hw, "key :");
+ for (i = 0; i < 20; i++)
+ ice_info(hw, "%02x ", item->key[i]);
+ ice_info(hw, "\n");
+ ice_info(hw, "key_inv:");
+ for (i = 0; i < 20; i++)
+ ice_info(hw, "%02x ", item->key_inv[i]);
+ ice_info(hw, "\n");
+ ice_info(hw, "hit_idx_grp = %d\n", item->hit_idx_grp);
+ ice_info(hw, "pg_pri = %d\n", item->pg_pri);
+ _bst_np_kb_dump(hw, &item->np_kb);
+ _bst_pg_kb_dump(hw, &item->pg_kb);
+ _bst_alu_dump(hw, &item->alu0, 0);
+ _bst_alu_dump(hw, &item->alu1, 1);
+ _bst_alu_dump(hw, &item->alu2, 2);
+}
+
+/** The function parses a 96 bits ALU entry with below format:
+ * BIT 0-5: Opcode (alu->opc)
+ * BIT 6-13: Source Start (alu->src_start)
+ * BIT 14-18: Source Length (alu->src_len)
+ * BIT 19: Shift/Xlate Select (alu->shift_xlate_select)
+ * BIT 20-23: Shift/Xlate Key (alu->shift_xlate_key)
+ * BIT 24-30: Source Register ID (alu->src_reg_id)
+ * BIT 31-37: Dest. Register ID (alu->dst_reg_id)
+ * BIT 38: Inc0 (alu->inc0)
+ * BIT 39: Inc1:(alu->inc1)
+ * BIT 40:41 Protocol Offset Opcode (alu->proto_offset_opc)
+ * BIT 42:49 Protocol Offset (alu->proto_offset)
+ * BIT 50:57 Branch Address (alu->branch_addr)
+ * BIT 58:73 Immediate (alu->imm)
+ * BIT 74 Dedicated Flags Enable (alu->dedicate_flags_ena)
+ * BIT 75:80 Dest. Start (alu->dst_start)
+ * BIT 81:86 Dest. Length (alu->dst_len)
+ * BIT 87 Flags Extract Imm. (alu->flags_extr_imm)
+ * BIT 88:95 Flags Start/Immediate (alu->flags_start_imm)
+ *
+ * NOTE: the first 7 bits are skipped as the start bit is not
+ * byte aligned.
+ */
+static void _bst_alu_init(struct ice_alu *alu, u8 *data)
+{
+ u64 d64 = *(u64 *)data >> 7;
+
+ alu->opc = (enum ice_alu_opcode)(d64 & 0x3f);
+ alu->src_start = (u8)((d64 >> 6) & 0xff);
+ alu->src_len = (u8)((d64 >> 14) & 0x1f);
+ alu->shift_xlate_select = ((d64 >> 19) & 0x1) != 0;
+ alu->shift_xlate_key = (u8)((d64 >> 20) & 0xf);
+ alu->src_reg_id = (u8)((d64 >> 24) & 0x7f);
+ alu->dst_reg_id = (u8)((d64 >> 31) & 0x7f);
+ alu->inc0 = ((d64 >> 38) & 0x1) != 0;
+ alu->inc1 = ((d64 >> 39) & 0x1) != 0;
+ alu->proto_offset_opc = (u8)((d64 >> 40) & 0x3);
+ alu->proto_offset = (u8)((d64 >> 42) & 0xff);
+
+ d64 = *(u64 *)(&data[6]) >> 9;
+
+ alu->branch_addr = (u8)(d64 & 0xff);
+ alu->imm = (u16)((d64 >> 8) & 0xffff);
+ alu->dedicate_flags_ena = ((d64 >> 24) & 0x1) != 0;
+ alu->dst_start = (u8)((d64 >> 25) & 0x3f);
+ alu->dst_len = (u8)((d64 >> 31) & 0x3f);
+ alu->flags_extr_imm = ((d64 >> 37) & 0x1) != 0;
+ alu->flags_start_imm = (u8)((d64 >> 38) & 0xff);
+}
+
+/** The function parses a 35 bits Parse Graph Key Build with below format:
+ * BIT 0: Flag 0 Enable (kb->flag0_ena)
+ * BIT 1-6: Flag 0 Index (kb->flag0_idx)
+ * BIT 7: Flag 1 Enable (kb->flag1_ena)
+ * BIT 8-13: Flag 1 Index (kb->flag1_idx)
+ * BIT 14: Flag 2 Enable (kb->flag2_ena)
+ * BIT 15-20: Flag 2 Index (kb->flag2_idx)
+ * BIT 21: Flag 3 Enable (kb->flag3_ena)
+ * BIT 22-27: Flag 3 Index (kb->flag3_idx)
+ * BIT 28-34: ALU Register Index (kb->alu_reg_idx)
+ */
+static void _bst_pgkb_init(struct ice_pg_keybuilder *kb, u64 data)
+{
+ kb->flag0_ena = (data & 0x1) != 0;
+ kb->flag0_idx = (u8)((data >> 1) & 0x3f);
+ kb->flag1_ena = ((data >> 7) & 0x1) != 0;
+ kb->flag1_idx = (u8)((data >> 8) & 0x3f);
+ kb->flag2_ena = ((data >> 14) & 0x1) != 0;
+ kb->flag2_idx = (u8)((data >> 15) & 0x3f);
+ kb->flag3_ena = ((data >> 21) & 0x1) != 0;
+ kb->flag3_idx = (u8)((data >> 22) & 0x3f);
+ kb->alu_reg_idx = (u8)((data >> 28) & 0x7f);
+}
+
+/** The function parses a 18 bits Next Protocol Key Build with below format:
+ * BIT 0-1: Opcode kb->ops
+ * BIT 2-9: Start / Reg 0 (kb->start_or_reg0)
+ * BIT 10-17: Length / Reg 1 (kb->len_or_reg1)
+ */
+static void _bst_npkb_init(struct ice_np_keybuilder *kb, u32 data)
+{
+ kb->ops = (u8)(data & 0x3);
+ kb->start_or_reg0 = (u8)((data >> 2) & 0xff);
+ kb->len_or_reg1 = (u8)((data >> 10) & 0xff);
+}
+
+/** The function parses a 704 bits Boost TCAM entry with below format:
+ * BIT 0-15: Address (ti->address)
+ * BIT 16-31: reserved
+ * BIT 32-191: Key (ti->key)
+ * BIT 192-351:Key Invert (ti->key_inv)
+ * BIT 352-359:Boost Hit Index Group (ti->hit_idx_grp)
+ * BIT 360-361:PG Priority (ti->pg_pri)
+ * BIT 362-379:Next Proto Key Build (ti->np_kb)
+ * BIT 380-414:PG Key Build (ti->pg_kb)
+ * BIT 415-510:ALU 0 (ti->alu0)
+ * BIT 511-606:ALU 1 (ti->alu1)
+ * BIT 607-702:ALU 2 (ti->alu2)
+ * BIT 703: reserved
+ */
+static void _bst_parse_item(struct ice_hw *hw, u16 idx, void *item,
+ void *data, int size)
+{
+ struct ice_bst_tcam_item *ti = (struct ice_bst_tcam_item *)item;
+ u8 *buf = (u8 *)data;
+ int i;
+
+ ti->address = *(u16 *)buf;
+
+ for (i = 0; i < 20; i++)
+ ti->key[i] = buf[4 + i];
+ for (i = 0; i < 20; i++)
+ ti->key_inv[i] = buf[24 + i];
+ ti->hit_idx_grp = buf[44];
+ ti->pg_pri = buf[45] & 0x3;
+ _bst_npkb_init(&ti->np_kb, *(u32 *)&buf[45] >> 2);
+ _bst_pgkb_init(&ti->pg_kb, *(u64 *)&buf[47] >> 4);
+ _bst_alu_init(&ti->alu0, &buf[51]);
+ _bst_alu_init(&ti->alu1, &buf[63]);
+ _bst_alu_init(&ti->alu2, &buf[75]);
+
+ if (hw->debug_mask & ICE_DBG_PARSER)
+ ice_bst_tcam_dump(hw, ti);
+}
+
+/**
+ * ice_bst_tcam_table_get - create a boost tcam table
+ * @ice_hw: pointer to the hardware structure
+ */
+struct ice_bst_tcam_item *ice_bst_tcam_table_get(struct ice_hw *hw)
+{
+ return (struct ice_bst_tcam_item *)
+ ice_parser_create_table(hw, ICE_SID_RXPARSER_BOOST_TCAM,
+ sizeof(struct ice_bst_tcam_item),
+ ICE_BST_TCAM_TABLE_SIZE,
+ ice_parser_sect_item_get,
+ _bst_parse_item, true);
+}
+
+static void _parse_lbl_item(struct ice_hw *hw, u16 idx, void *item,
+ void *data, int size)
+{
+ ice_parse_item_dflt(hw, idx, item, data, size);
+
+ if (hw->debug_mask & ICE_DBG_PARSER)
+ ice_lbl_dump(hw, (struct ice_lbl_item *)item);
+}
+
+/**
+ * ice_bst_lbl_table_get - create a boost label table
+ * @ice_hw: pointer to the hardware structure
+ */
+struct ice_lbl_item *ice_bst_lbl_table_get(struct ice_hw *hw)
+{
+ return (struct ice_lbl_item *)
+ ice_parser_create_table(hw, ICE_SID_LBL_RXPARSER_TMEM,
+ sizeof(struct ice_lbl_item),
+ ICE_BST_TCAM_TABLE_SIZE,
+ ice_parser_sect_item_get,
+ _parse_lbl_item, true);
+}
diff --git a/drivers/net/ice/base/ice_bst_tcam.h b/drivers/net/ice/base/ice_bst_tcam.h
new file mode 100644
index 0000000000..a4ab40721f
--- /dev/null
+++ b/drivers/net/ice/base/ice_bst_tcam.h
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2021 Intel Corporation
+ */
+
+#ifndef _ICE_BST_TCAM_H_
+#define _ICE_BST_TCAM_H_
+
+#include "ice_imem.h"
+
+struct ice_bst_tcam_item {
+ u16 address;
+ u8 key[20];
+ u8 key_inv[20];
+ u8 hit_idx_grp;
+ u8 pg_pri;
+ struct ice_np_keybuilder np_kb;
+ struct ice_pg_keybuilder pg_kb;
+ struct ice_alu alu0;
+ struct ice_alu alu1;
+ struct ice_alu alu2;
+};
+
+void ice_bst_tcam_dump(struct ice_hw *hw, struct ice_bst_tcam_item *item);
+
+struct ice_bst_tcam_item *ice_bst_tcam_table_get(struct ice_hw *hw);
+
+struct ice_lbl_item *ice_bst_lbl_table_get(struct ice_hw *hw);
+#endif /*_ICE_BST_TCAM_H_ */
diff --git a/drivers/net/ice/base/ice_imem.c b/drivers/net/ice/base/ice_imem.c
index ea77581199..ddd067c86f 100644
--- a/drivers/net/ice/base/ice_imem.c
+++ b/drivers/net/ice/base/ice_imem.c
@@ -240,5 +240,5 @@ struct ice_imem_item *ice_imem_table_get(struct ice_hw *hw)
sizeof(struct ice_imem_item),
ICE_IMEM_TABLE_SIZE,
ice_parser_sect_item_get,
- _imem_parse_item);
+ _imem_parse_item, false);
}
diff --git a/drivers/net/ice/base/ice_metainit.c b/drivers/net/ice/base/ice_metainit.c
index 5d49c6861d..3f9e5d6833 100644
--- a/drivers/net/ice/base/ice_metainit.c
+++ b/drivers/net/ice/base/ice_metainit.c
@@ -139,5 +139,5 @@ struct ice_metainit_item *ice_metainit_table_get(struct ice_hw *hw)
sizeof(struct ice_metainit_item),
ICE_METAINIT_TABLE_SIZE,
ice_parser_sect_item_get,
- _metainit_parse_item);
+ _metainit_parse_item, false);
}
diff --git a/drivers/net/ice/base/ice_parser.c b/drivers/net/ice/base/ice_parser.c
index 4c72e32fae..3b5c5b7e48 100644
--- a/drivers/net/ice/base/ice_parser.c
+++ b/drivers/net/ice/base/ice_parser.c
@@ -12,6 +12,22 @@
#define ICE_SID_RXPARSER_PG_SPILL_ENTRY_SIZE 17
#define ICE_SID_RXPARSER_NOMATCH_CAM_ENTRY_SIZE 12
#define ICE_SID_RXPARSER_NOMATCH_SPILL_ENTRY_SIZE 13
+#define ICE_SID_RXPARSER_BOOST_TCAM_ENTRY_SIZE 88
+
+#define ICE_SEC_LBL_DATA_OFFSET 2
+#define ICE_SID_LBL_ENTRY_SIZE 66
+
+void ice_lbl_dump(struct ice_hw *hw, struct ice_lbl_item *item)
+{
+ ice_info(hw, "index = %d\n", item->idx);
+ ice_info(hw, "label = %s\n", item->label);
+}
+
+void ice_parse_item_dflt(struct ice_hw *hw, u16 idx, void *item,
+ void *data, int size)
+{
+ ice_memcpy(item, data, size, ICE_DMA_TO_NONDMA);
+}
/**
* ice_parser_sect_item_get - parse a item from a section
@@ -49,6 +65,13 @@ void *ice_parser_sect_item_get(u32 sect_type, void *section,
case ICE_SID_RXPARSER_NOMATCH_SPILL:
size = ICE_SID_RXPARSER_NOMATCH_SPILL_ENTRY_SIZE;
break;
+ case ICE_SID_RXPARSER_BOOST_TCAM:
+ size = ICE_SID_RXPARSER_BOOST_TCAM_ENTRY_SIZE;
+ break;
+ case ICE_SID_LBL_RXPARSER_TMEM:
+ data_off = ICE_SEC_LBL_DATA_OFFSET;
+ size = ICE_SID_LBL_ENTRY_SIZE;
+ break;
default:
return NULL;
}
@@ -68,6 +91,7 @@ void *ice_parser_sect_item_get(u32 sect_type, void *section,
* @length: number of items in the table to create
* @item_get: the function will be parsed to ice_pkg_enum_entry
* @parser_item: the function to parse the item
+ * @no_offset: ignore header offset, calculate index from 0
*/
void *ice_parser_create_table(struct ice_hw *hw, u32 sect_type,
u32 item_size, u32 length,
@@ -75,11 +99,12 @@ void *ice_parser_create_table(struct ice_hw *hw, u32 sect_type,
u32 index, u32 *offset),
void (*parse_item)(struct ice_hw *hw, u16 idx,
void *item, void *data,
- int size))
+ int size),
+ bool no_offset)
{
struct ice_seg *seg = hw->seg;
struct ice_pkg_enum state;
- u16 idx = 0;
+ u16 idx = 0xffff;
void *table;
void *data;
@@ -102,7 +127,10 @@ void *ice_parser_create_table(struct ice_hw *hw, u32 sect_type,
struct ice_pkg_sect_hdr *hdr =
(struct ice_pkg_sect_hdr *)state.sect;
- idx = hdr->offset + state.entry_idx;
+ if (no_offset)
+ idx++;
+ else
+ idx = hdr->offset + state.entry_idx;
parse_item(hw, idx,
(void *)((u64)table + idx * item_size),
data, item_size);
@@ -165,6 +193,18 @@ enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr)
goto err;
}
+ p->bst_tcam_table = ice_bst_tcam_table_get(hw);
+ if (!p->bst_tcam_table) {
+ status = ICE_ERR_PARAM;
+ goto err;
+ }
+
+ p->bst_lbl_table = ice_bst_lbl_table_get(hw);
+ if (!p->bst_lbl_table) {
+ status = ICE_ERR_PARAM;
+ goto err;
+ }
+
*psr = p;
return ICE_SUCCESS;
err:
@@ -184,6 +224,8 @@ void ice_parser_destroy(struct ice_parser *psr)
ice_free(psr->hw, psr->pg_sp_cam_table);
ice_free(psr->hw, psr->pg_nm_cam_table);
ice_free(psr->hw, psr->pg_nm_sp_cam_table);
+ ice_free(psr->hw, psr->bst_tcam_table);
+ ice_free(psr->hw, psr->bst_lbl_table);
ice_free(psr->hw, psr);
}
diff --git a/drivers/net/ice/base/ice_parser.h b/drivers/net/ice/base/ice_parser.h
index 83246e49b3..a621d41ad0 100644
--- a/drivers/net/ice/base/ice_parser.h
+++ b/drivers/net/ice/base/ice_parser.h
@@ -8,6 +8,7 @@
#include "ice_metainit.h"
#include "ice_imem.h"
#include "ice_pg_cam.h"
+#include "ice_bst_tcam.h"
struct ice_parser {
struct ice_hw *hw; /* pointer to the hardware structure */
@@ -24,6 +25,10 @@ struct ice_parser {
struct ice_pg_nm_cam_item *pg_nm_cam_table;
/* load data from section ICE_SID_RXPARSER_NOMATCH_SPILL */
struct ice_pg_nm_cam_item *pg_nm_sp_cam_table;
+ /* load data from section ICE_SID_RXPARSER_BOOST_TCAM */
+ struct ice_bst_tcam_item *bst_tcam_table;
+ /* load data from section ICE_SID_LBL_RXPARSER_TMEM */
+ struct ice_lbl_item *bst_lbl_table;
};
enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr);
diff --git a/drivers/net/ice/base/ice_parser_util.h b/drivers/net/ice/base/ice_parser_util.h
index e2054cb7d4..cf0222bed8 100644
--- a/drivers/net/ice/base/ice_parser_util.h
+++ b/drivers/net/ice/base/ice_parser_util.h
@@ -8,11 +8,20 @@
#include "ice_imem.h"
#include "ice_metainit.h"
+struct ice_lbl_item {
+ u16 idx;
+ char label[64];
+};
+
struct ice_pkg_sect_hdr {
__le16 count;
__le16 offset;
};
+void ice_lbl_dump(struct ice_hw *hw, struct ice_lbl_item *item);
+void ice_parse_item_dflt(struct ice_hw *hw, u16 idx, void *item,
+ void *data, int size);
+
void *ice_parser_sect_item_get(u32 sect_type, void *section,
u32 index, u32 *offset);
@@ -22,5 +31,6 @@ void *ice_parser_create_table(struct ice_hw *hw, u32 sect_type,
u32 index, u32 *offset),
void (*parse_item)(struct ice_hw *hw, u16 idx,
void *item, void *data,
- int size));
+ int size),
+ bool no_offset);
#endif /* _ICE_PARSER_UTIL_H_ */
diff --git a/drivers/net/ice/base/ice_pg_cam.c b/drivers/net/ice/base/ice_pg_cam.c
index 171986bf3d..03484d6a91 100644
--- a/drivers/net/ice/base/ice_pg_cam.c
+++ b/drivers/net/ice/base/ice_pg_cam.c
@@ -252,7 +252,7 @@ struct ice_pg_cam_item *ice_pg_cam_table_get(struct ice_hw *hw)
sizeof(struct ice_pg_cam_item),
ICE_PG_CAM_TABLE_SIZE,
ice_parser_sect_item_get,
- _pg_cam_parse_item);
+ _pg_cam_parse_item, false);
}
/**
@@ -266,7 +266,7 @@ struct ice_pg_cam_item *ice_pg_sp_cam_table_get(struct ice_hw *hw)
sizeof(struct ice_pg_cam_item),
ICE_PG_SP_CAM_TABLE_SIZE,
ice_parser_sect_item_get,
- _pg_sp_cam_parse_item);
+ _pg_sp_cam_parse_item, false);
}
/**
@@ -280,7 +280,7 @@ struct ice_pg_nm_cam_item *ice_pg_nm_cam_table_get(struct ice_hw *hw)
sizeof(struct ice_pg_nm_cam_item),
ICE_PG_NM_CAM_TABLE_SIZE,
ice_parser_sect_item_get,
- _pg_nm_cam_parse_item);
+ _pg_nm_cam_parse_item, false);
}
/**
@@ -294,5 +294,5 @@ struct ice_pg_nm_cam_item *ice_pg_nm_sp_cam_table_get(struct ice_hw *hw)
sizeof(struct ice_pg_nm_cam_item),
ICE_PG_NM_SP_CAM_TABLE_SIZE,
ice_parser_sect_item_get,
- _pg_nm_sp_cam_parse_item);
+ _pg_nm_sp_cam_parse_item, false);
}
diff --git a/drivers/net/ice/base/meson.build b/drivers/net/ice/base/meson.build
index 56dfb390e8..105ae411d3 100644
--- a/drivers/net/ice/base/meson.build
+++ b/drivers/net/ice/base/meson.build
@@ -19,6 +19,7 @@ sources = [
'ice_imem.c',
'ice_metainit.c',
'ice_pg_cam.c',
+ 'ice_bst_tcam.c',
]
error_cflags = [
--
2.26.2
^ permalink raw reply [flat|nested] 21+ messages in thread
* [dpdk-dev] [PATCH 06/20] net/ice/base: init ptype marker TCAM table for parser
2021-09-17 11:02 [dpdk-dev] [PATCH 00/20] ice/base: add parser module Qi Zhang
` (4 preceding siblings ...)
2021-09-17 11:02 ` [dpdk-dev] [PATCH 05/20] net/ice/base: init boost TCAM " Qi Zhang
@ 2021-09-17 11:02 ` Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 07/20] net/ice/base: init marker group " Qi Zhang
` (13 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Qi Zhang @ 2021-09-17 11:02 UTC (permalink / raw)
To: qiming.yang; +Cc: junfeng.guo, dev, Qi Zhang
Parse DDP section ICE_SID_RXPARSER_MARKER_PTYPE into an array of
ice_ptype_mk_tcam_item.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_parser.c | 11 ++++++
drivers/net/ice/base/ice_parser.h | 3 ++
drivers/net/ice/base/ice_ptype_mk.c | 54 +++++++++++++++++++++++++++++
drivers/net/ice/base/ice_ptype_mk.h | 18 ++++++++++
drivers/net/ice/base/meson.build | 1 +
5 files changed, 87 insertions(+)
create mode 100644 drivers/net/ice/base/ice_ptype_mk.c
create mode 100644 drivers/net/ice/base/ice_ptype_mk.h
diff --git a/drivers/net/ice/base/ice_parser.c b/drivers/net/ice/base/ice_parser.c
index 3b5c5b7e48..7f6aa59c8f 100644
--- a/drivers/net/ice/base/ice_parser.c
+++ b/drivers/net/ice/base/ice_parser.c
@@ -13,6 +13,7 @@
#define ICE_SID_RXPARSER_NOMATCH_CAM_ENTRY_SIZE 12
#define ICE_SID_RXPARSER_NOMATCH_SPILL_ENTRY_SIZE 13
#define ICE_SID_RXPARSER_BOOST_TCAM_ENTRY_SIZE 88
+#define ICE_SID_RXPARSER_MARKER_TYPE_ENTRY_SIZE 24
#define ICE_SEC_LBL_DATA_OFFSET 2
#define ICE_SID_LBL_ENTRY_SIZE 66
@@ -72,6 +73,9 @@ void *ice_parser_sect_item_get(u32 sect_type, void *section,
data_off = ICE_SEC_LBL_DATA_OFFSET;
size = ICE_SID_LBL_ENTRY_SIZE;
break;
+ case ICE_SID_RXPARSER_MARKER_PTYPE:
+ size = ICE_SID_RXPARSER_MARKER_TYPE_ENTRY_SIZE;
+ break;
default:
return NULL;
}
@@ -205,6 +209,12 @@ enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr)
goto err;
}
+ p->ptype_mk_tcam_table = ice_ptype_mk_tcam_table_get(hw);
+ if (!p->ptype_mk_tcam_table) {
+ status = ICE_ERR_PARAM;
+ goto err;
+ }
+
*psr = p;
return ICE_SUCCESS;
err:
@@ -226,6 +236,7 @@ void ice_parser_destroy(struct ice_parser *psr)
ice_free(psr->hw, psr->pg_nm_sp_cam_table);
ice_free(psr->hw, psr->bst_tcam_table);
ice_free(psr->hw, psr->bst_lbl_table);
+ ice_free(psr->hw, psr->ptype_mk_tcam_table);
ice_free(psr->hw, psr);
}
diff --git a/drivers/net/ice/base/ice_parser.h b/drivers/net/ice/base/ice_parser.h
index a621d41ad0..eb9ea874ed 100644
--- a/drivers/net/ice/base/ice_parser.h
+++ b/drivers/net/ice/base/ice_parser.h
@@ -9,6 +9,7 @@
#include "ice_imem.h"
#include "ice_pg_cam.h"
#include "ice_bst_tcam.h"
+#include "ice_ptype_mk.h"
struct ice_parser {
struct ice_hw *hw; /* pointer to the hardware structure */
@@ -29,6 +30,8 @@ struct ice_parser {
struct ice_bst_tcam_item *bst_tcam_table;
/* load data from section ICE_SID_LBL_RXPARSER_TMEM */
struct ice_lbl_item *bst_lbl_table;
+ /* load data from section ICE_SID_RXPARSER_MARKER_PTYPE */
+ struct ice_ptype_mk_tcam_item *ptype_mk_tcam_table;
};
enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr);
diff --git a/drivers/net/ice/base/ice_ptype_mk.c b/drivers/net/ice/base/ice_ptype_mk.c
new file mode 100644
index 0000000000..33623dcfbc
--- /dev/null
+++ b/drivers/net/ice/base/ice_ptype_mk.c
@@ -0,0 +1,54 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2021 Intel Corporation
+ */
+
+#include "ice_common.h"
+#include "ice_parser_util.h"
+
+#define ICE_PTYPE_MK_TCAM_TABLE_SIZE 1024
+
+/**
+ * ice_ptype_mk_tcam_dump - dump an ptype marker tcam info_
+ * @ice_hw: pointer to the hardware structure
+ * @item: ptype marker tcam to dump
+ */
+void ice_ptype_mk_tcam_dump(struct ice_hw *hw,
+ struct ice_ptype_mk_tcam_item *item)
+{
+ int i;
+
+ ice_info(hw, "address = %d\n", item->address);
+ ice_info(hw, "ptype = %d\n", item->ptype);
+ ice_info(hw, "key :");
+ for (i = 0; i < 10; i++)
+ ice_info(hw, "%02x ", item->key[i]);
+ ice_info(hw, "\n");
+ ice_info(hw, "key_inv:");
+ for (i = 0; i < 10; i++)
+ ice_info(hw, "%02x ", item->key_inv[i]);
+ ice_info(hw, "\n");
+}
+
+static void _parse_ptype_mk_tcam_item(struct ice_hw *hw, u16 idx, void *item,
+ void *data, int size)
+{
+ ice_parse_item_dflt(hw, idx, item, data, size);
+
+ if (hw->debug_mask & ICE_DBG_PARSER)
+ ice_ptype_mk_tcam_dump(hw,
+ (struct ice_ptype_mk_tcam_item *)item);
+}
+
+/**
+ * ice_ptype_mk_tcam_table_get - create a ptype marker tcam table
+ * @ice_hw: pointer to the hardware structure
+ */
+struct ice_ptype_mk_tcam_item *ice_ptype_mk_tcam_table_get(struct ice_hw *hw)
+{
+ return (struct ice_ptype_mk_tcam_item *)
+ ice_parser_create_table(hw, ICE_SID_RXPARSER_MARKER_PTYPE,
+ sizeof(struct ice_ptype_mk_tcam_item),
+ ICE_PTYPE_MK_TCAM_TABLE_SIZE,
+ ice_parser_sect_item_get,
+ _parse_ptype_mk_tcam_item, true);
+}
diff --git a/drivers/net/ice/base/ice_ptype_mk.h b/drivers/net/ice/base/ice_ptype_mk.h
new file mode 100644
index 0000000000..c93cd8f0ad
--- /dev/null
+++ b/drivers/net/ice/base/ice_ptype_mk.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2021 Intel Corporation
+ */
+
+#ifndef _ICE_PTYPE_MK_H_
+#define _ICE_PTYPE_MK_H_
+
+struct ice_ptype_mk_tcam_item {
+ u16 address;
+ u16 ptype;
+ u8 key[10];
+ u8 key_inv[10];
+};
+
+void ice_ptype_mk_tcam_dump(struct ice_hw *hw,
+ struct ice_ptype_mk_tcam_item *item);
+struct ice_ptype_mk_tcam_item *ice_ptype_mk_tcam_table_get(struct ice_hw *hw);
+#endif /* _ICE_PTYPE_MK_H_ */
diff --git a/drivers/net/ice/base/meson.build b/drivers/net/ice/base/meson.build
index 105ae411d3..78e3aee4e5 100644
--- a/drivers/net/ice/base/meson.build
+++ b/drivers/net/ice/base/meson.build
@@ -20,6 +20,7 @@ sources = [
'ice_metainit.c',
'ice_pg_cam.c',
'ice_bst_tcam.c',
+ 'ice_ptype_mk.c',
]
error_cflags = [
--
2.26.2
^ permalink raw reply [flat|nested] 21+ messages in thread
* [dpdk-dev] [PATCH 07/20] net/ice/base: init marker group table for parser
2021-09-17 11:02 [dpdk-dev] [PATCH 00/20] ice/base: add parser module Qi Zhang
` (5 preceding siblings ...)
2021-09-17 11:02 ` [dpdk-dev] [PATCH 06/20] net/ice/base: init ptype marker " Qi Zhang
@ 2021-09-17 11:02 ` Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 08/20] net/ice/base: init protocol " Qi Zhang
` (12 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Qi Zhang @ 2021-09-17 11:02 UTC (permalink / raw)
To: qiming.yang; +Cc: junfeng.guo, dev, Qi Zhang
Parse DDP section ICE_SID_RXPARSER_MARKER_GRP into an array of
ice_mk_grp_item.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_mk_grp.c | 55 +++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_mk_grp.h | 15 +++++++++
drivers/net/ice/base/ice_parser.c | 11 +++++++
drivers/net/ice/base/ice_parser.h | 3 ++
drivers/net/ice/base/meson.build | 1 +
5 files changed, 85 insertions(+)
create mode 100644 drivers/net/ice/base/ice_mk_grp.c
create mode 100644 drivers/net/ice/base/ice_mk_grp.h
diff --git a/drivers/net/ice/base/ice_mk_grp.c b/drivers/net/ice/base/ice_mk_grp.c
new file mode 100644
index 0000000000..4e9ab5c13a
--- /dev/null
+++ b/drivers/net/ice/base/ice_mk_grp.c
@@ -0,0 +1,55 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2021 Intel Corporation
+ */
+
+#include "ice_common.h"
+#include "ice_parser_util.h"
+
+#define ICE_MK_GRP_TABLE_SIZE 128
+#define ICE_MK_COUNT_PER_GRP 8
+
+/**
+ * ice_mk_grp_dump - dump an marker group item info
+ * @ice_hw: pointer to the hardware structure
+ * @item: marker group item to dump
+ */
+void ice_mk_grp_dump(struct ice_hw *hw, struct ice_mk_grp_item *item)
+{
+ int i;
+
+ ice_info(hw, "index = %d\n", item->idx);
+ ice_info(hw, "markers: ");
+ for (i = 0; i < ICE_MK_COUNT_PER_GRP; i++)
+ ice_info(hw, "%d ", item->markers[i]);
+ ice_info(hw, "\n");
+}
+
+static void _mk_grp_parse_item(struct ice_hw *hw, u16 idx, void *item,
+ void *data, int size)
+{
+ struct ice_mk_grp_item *grp = (struct ice_mk_grp_item *)item;
+ u8 *buf = (u8 *)data;
+ int i;
+
+ grp->idx = idx;
+
+ for (i = 0; i < ICE_MK_COUNT_PER_GRP; i++)
+ grp->markers[i] = buf[i];
+
+ if (hw->debug_mask & ICE_DBG_PARSER)
+ ice_mk_grp_dump(hw, grp);
+}
+
+/**
+ * ice_mk_grp_table_get - create a marker group table
+ * @ice_hw: pointer to the hardware structure
+ */
+struct ice_mk_grp_item *ice_mk_grp_table_get(struct ice_hw *hw)
+{
+ return (struct ice_mk_grp_item *)
+ ice_parser_create_table(hw, ICE_SID_RXPARSER_MARKER_GRP,
+ sizeof(struct ice_mk_grp_item),
+ ICE_MK_GRP_TABLE_SIZE,
+ ice_parser_sect_item_get,
+ _mk_grp_parse_item, false);
+}
diff --git a/drivers/net/ice/base/ice_mk_grp.h b/drivers/net/ice/base/ice_mk_grp.h
new file mode 100644
index 0000000000..04d11b49c2
--- /dev/null
+++ b/drivers/net/ice/base/ice_mk_grp.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2021 Intel Corporation
+ */
+
+#ifndef _ICE_MK_GRP_H_
+#define _ICE_MK_GRP_H_
+
+struct ice_mk_grp_item {
+ int idx;
+ u8 markers[8];
+};
+
+void ice_mk_grp_dump(struct ice_hw *hw, struct ice_mk_grp_item *item);
+struct ice_mk_grp_item *ice_mk_grp_table_get(struct ice_hw *hw);
+#endif /* _ICE_MK_GRP_H_ */
diff --git a/drivers/net/ice/base/ice_parser.c b/drivers/net/ice/base/ice_parser.c
index 7f6aa59c8f..ed624d613a 100644
--- a/drivers/net/ice/base/ice_parser.c
+++ b/drivers/net/ice/base/ice_parser.c
@@ -14,6 +14,7 @@
#define ICE_SID_RXPARSER_NOMATCH_SPILL_ENTRY_SIZE 13
#define ICE_SID_RXPARSER_BOOST_TCAM_ENTRY_SIZE 88
#define ICE_SID_RXPARSER_MARKER_TYPE_ENTRY_SIZE 24
+#define ICE_SID_RXPARSER_MARKER_GRP_ENTRY_SIZE 8
#define ICE_SEC_LBL_DATA_OFFSET 2
#define ICE_SID_LBL_ENTRY_SIZE 66
@@ -76,6 +77,9 @@ void *ice_parser_sect_item_get(u32 sect_type, void *section,
case ICE_SID_RXPARSER_MARKER_PTYPE:
size = ICE_SID_RXPARSER_MARKER_TYPE_ENTRY_SIZE;
break;
+ case ICE_SID_RXPARSER_MARKER_GRP:
+ size = ICE_SID_RXPARSER_MARKER_GRP_ENTRY_SIZE;
+ break;
default:
return NULL;
}
@@ -215,6 +219,12 @@ enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr)
goto err;
}
+ p->mk_grp_table = ice_mk_grp_table_get(hw);
+ if (!p->mk_grp_table) {
+ status = ICE_ERR_PARAM;
+ goto err;
+ }
+
*psr = p;
return ICE_SUCCESS;
err:
@@ -237,6 +247,7 @@ void ice_parser_destroy(struct ice_parser *psr)
ice_free(psr->hw, psr->bst_tcam_table);
ice_free(psr->hw, psr->bst_lbl_table);
ice_free(psr->hw, psr->ptype_mk_tcam_table);
+ ice_free(psr->hw, psr->mk_grp_table);
ice_free(psr->hw, psr);
}
diff --git a/drivers/net/ice/base/ice_parser.h b/drivers/net/ice/base/ice_parser.h
index eb9ea874ed..4f224039c9 100644
--- a/drivers/net/ice/base/ice_parser.h
+++ b/drivers/net/ice/base/ice_parser.h
@@ -10,6 +10,7 @@
#include "ice_pg_cam.h"
#include "ice_bst_tcam.h"
#include "ice_ptype_mk.h"
+#include "ice_mk_grp.h"
struct ice_parser {
struct ice_hw *hw; /* pointer to the hardware structure */
@@ -32,6 +33,8 @@ struct ice_parser {
struct ice_lbl_item *bst_lbl_table;
/* load data from section ICE_SID_RXPARSER_MARKER_PTYPE */
struct ice_ptype_mk_tcam_item *ptype_mk_tcam_table;
+ /* load data from section ICE_SID_RXPARSER_MARKER_GRP */
+ struct ice_mk_grp_item *mk_grp_table;
};
enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr);
diff --git a/drivers/net/ice/base/meson.build b/drivers/net/ice/base/meson.build
index 78e3aee4e5..df021b12dd 100644
--- a/drivers/net/ice/base/meson.build
+++ b/drivers/net/ice/base/meson.build
@@ -21,6 +21,7 @@ sources = [
'ice_pg_cam.c',
'ice_bst_tcam.c',
'ice_ptype_mk.c',
+ 'ice_mk_grp.c',
]
error_cflags = [
--
2.26.2
^ permalink raw reply [flat|nested] 21+ messages in thread
* [dpdk-dev] [PATCH 08/20] net/ice/base: init protocol group table for parser
2021-09-17 11:02 [dpdk-dev] [PATCH 00/20] ice/base: add parser module Qi Zhang
` (6 preceding siblings ...)
2021-09-17 11:02 ` [dpdk-dev] [PATCH 07/20] net/ice/base: init marker group " Qi Zhang
@ 2021-09-17 11:02 ` Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 09/20] net/ice/base: init flag redirect " Qi Zhang
` (11 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Qi Zhang @ 2021-09-17 11:02 UTC (permalink / raw)
To: qiming.yang; +Cc: junfeng.guo, dev, Qi Zhang
Parse DDP section ICE_SID_RXPARSER_PROTO_GRP into an array of
ice_proto_grp_item.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_parser.c | 11 +++
drivers/net/ice/base/ice_parser.h | 3 +
drivers/net/ice/base/ice_proto_grp.c | 108 +++++++++++++++++++++++++++
drivers/net/ice/base/ice_proto_grp.h | 23 ++++++
drivers/net/ice/base/meson.build | 1 +
5 files changed, 146 insertions(+)
create mode 100644 drivers/net/ice/base/ice_proto_grp.c
create mode 100644 drivers/net/ice/base/ice_proto_grp.h
diff --git a/drivers/net/ice/base/ice_parser.c b/drivers/net/ice/base/ice_parser.c
index ed624d613a..a4ca7dd545 100644
--- a/drivers/net/ice/base/ice_parser.c
+++ b/drivers/net/ice/base/ice_parser.c
@@ -15,6 +15,7 @@
#define ICE_SID_RXPARSER_BOOST_TCAM_ENTRY_SIZE 88
#define ICE_SID_RXPARSER_MARKER_TYPE_ENTRY_SIZE 24
#define ICE_SID_RXPARSER_MARKER_GRP_ENTRY_SIZE 8
+#define ICE_SID_RXPARSER_PROTO_GRP_ENTRY_SIZE 24
#define ICE_SEC_LBL_DATA_OFFSET 2
#define ICE_SID_LBL_ENTRY_SIZE 66
@@ -80,6 +81,9 @@ void *ice_parser_sect_item_get(u32 sect_type, void *section,
case ICE_SID_RXPARSER_MARKER_GRP:
size = ICE_SID_RXPARSER_MARKER_GRP_ENTRY_SIZE;
break;
+ case ICE_SID_RXPARSER_PROTO_GRP:
+ size = ICE_SID_RXPARSER_PROTO_GRP_ENTRY_SIZE;
+ break;
default:
return NULL;
}
@@ -225,6 +229,12 @@ enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr)
goto err;
}
+ p->proto_grp_table = ice_proto_grp_table_get(hw);
+ if (!p->proto_grp_table) {
+ status = ICE_ERR_PARAM;
+ goto err;
+ }
+
*psr = p;
return ICE_SUCCESS;
err:
@@ -248,6 +258,7 @@ void ice_parser_destroy(struct ice_parser *psr)
ice_free(psr->hw, psr->bst_lbl_table);
ice_free(psr->hw, psr->ptype_mk_tcam_table);
ice_free(psr->hw, psr->mk_grp_table);
+ ice_free(psr->hw, psr->proto_grp_table);
ice_free(psr->hw, psr);
}
diff --git a/drivers/net/ice/base/ice_parser.h b/drivers/net/ice/base/ice_parser.h
index 4f224039c9..20e59451a5 100644
--- a/drivers/net/ice/base/ice_parser.h
+++ b/drivers/net/ice/base/ice_parser.h
@@ -11,6 +11,7 @@
#include "ice_bst_tcam.h"
#include "ice_ptype_mk.h"
#include "ice_mk_grp.h"
+#include "ice_proto_grp.h"
struct ice_parser {
struct ice_hw *hw; /* pointer to the hardware structure */
@@ -35,6 +36,8 @@ struct ice_parser {
struct ice_ptype_mk_tcam_item *ptype_mk_tcam_table;
/* load data from section ICE_SID_RXPARSER_MARKER_GRP */
struct ice_mk_grp_item *mk_grp_table;
+ /* load data from section ICE_SID_RXPARSER_PROTO_GRP */
+ struct ice_proto_grp_item *proto_grp_table;
};
enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr);
diff --git a/drivers/net/ice/base/ice_proto_grp.c b/drivers/net/ice/base/ice_proto_grp.c
new file mode 100644
index 0000000000..69d5d9a18a
--- /dev/null
+++ b/drivers/net/ice/base/ice_proto_grp.c
@@ -0,0 +1,108 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2021 Intel Corporation
+ */
+
+#include "ice_common.h"
+#include "ice_parser_util.h"
+
+#define ICE_PROTO_GRP_TABLE_SIZE 192
+
+static void _proto_off_dump(struct ice_hw *hw, struct ice_proto_off *po,
+ int idx)
+{
+ ice_info(hw, "proto %d\n", idx);
+ ice_info(hw, "\tpolarity = %d\n", po->polarity);
+ ice_info(hw, "\tproto_id = %d\n", po->proto_id);
+ ice_info(hw, "\toffset = %d\n", po->offset);
+}
+
+/**
+ * ice_proto_grp_dump - dump a proto group item info
+ * @ice_hw: pointer to the hardware structure
+ * @item: proto group item to dump
+ */
+void ice_proto_grp_dump(struct ice_hw *hw, struct ice_proto_grp_item *item)
+{
+ int i;
+
+ ice_info(hw, "index = %d\n", item->idx);
+
+ for (i = 0; i < ICE_PROTO_COUNT_PER_GRP; i++)
+ _proto_off_dump(hw, &item->po[i], i);
+}
+
+/** The function parses a 22 bits Protocol entry with below format:
+ * BIT 0: Polarity of Protocol Offset (po->polarity)
+ * BIT 1-8: Protocol ID (po->proto_id)
+ * BIT 9-11: reserved
+ * BIT 12-21: Protocol Offset (po->offset)
+ */
+static void _proto_off_parse(struct ice_proto_off *po, u32 data)
+{
+ po->polarity = (data & 0x1) != 0;
+ po->proto_id = (u8)((data >> 1) & 0xff);
+ po->offset = (u16)((data >> 12) & 0x3ff);
+}
+
+/** The function parses a 192 bits Protocol Group Table entry with below
+ * format:
+ * BIT 0-21: Protocol 0 (grp->po[0])
+ * BIT 22-43: Protocol 1 (grp->po[1])
+ * BIT 44-65: Protocol 2 (grp->po[2])
+ * BIT 66-87: Protocol 3 (grp->po[3])
+ * BIT 88-109: Protocol 4 (grp->po[4])
+ * BIT 110-131:Protocol 5 (grp->po[5])
+ * BIT 132-153:Protocol 6 (grp->po[6])
+ * BIT 154-175:Protocol 7 (grp->po[7])
+ * BIT 176-191:reserved
+ */
+static void _proto_grp_parse_item(struct ice_hw *hw, u16 idx, void *item,
+ void *data, int size)
+{
+ struct ice_proto_grp_item *grp = (struct ice_proto_grp_item *)item;
+ u8 *buf = (u8 *)data;
+ u32 d32;
+
+ grp->idx = idx;
+
+ d32 = *(u32 *)buf;
+ _proto_off_parse(&grp->po[0], d32);
+
+ d32 = (*(u32 *)&buf[2] >> 6);
+ _proto_off_parse(&grp->po[1], d32);
+
+ d32 = (*(u32 *)&buf[5] >> 4);
+ _proto_off_parse(&grp->po[2], d32);
+
+ d32 = (*(u32 *)&buf[8] >> 2);
+ _proto_off_parse(&grp->po[3], d32);
+
+ d32 = *(u32 *)&buf[11];
+ _proto_off_parse(&grp->po[4], d32);
+
+ d32 = (*(u32 *)&buf[13] >> 6);
+ _proto_off_parse(&grp->po[5], d32);
+
+ d32 = (*(u32 *)&buf[16] >> 4);
+ _proto_off_parse(&grp->po[6], d32);
+
+ d32 = (*(u32 *)&buf[19] >> 2);
+ _proto_off_parse(&grp->po[7], d32);
+
+ if (hw->debug_mask & ICE_DBG_PARSER)
+ ice_proto_grp_dump(hw, grp);
+}
+
+/**
+ * ice_proto_grp_table_get - create a proto group table
+ * @ice_hw: pointer to the hardware structure
+ */
+struct ice_proto_grp_item *ice_proto_grp_table_get(struct ice_hw *hw)
+{
+ return (struct ice_proto_grp_item *)
+ ice_parser_create_table(hw, ICE_SID_RXPARSER_PROTO_GRP,
+ sizeof(struct ice_proto_grp_item),
+ ICE_PROTO_GRP_TABLE_SIZE,
+ ice_parser_sect_item_get,
+ _proto_grp_parse_item, false);
+}
diff --git a/drivers/net/ice/base/ice_proto_grp.h b/drivers/net/ice/base/ice_proto_grp.h
new file mode 100644
index 0000000000..88d84505dd
--- /dev/null
+++ b/drivers/net/ice/base/ice_proto_grp.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2021 Intel Corporation
+ */
+
+#ifndef _ICE_PROTO_GRP_H_
+#define _ICE_PROTO_GRP_H_
+
+#define ICE_PROTO_COUNT_PER_GRP 8
+
+struct ice_proto_off {
+ bool polarity; /* true: positive, false: nagtive */
+ u8 proto_id;
+ u16 offset;
+};
+
+struct ice_proto_grp_item {
+ u16 idx;
+ struct ice_proto_off po[ICE_PROTO_COUNT_PER_GRP];
+};
+
+void ice_proto_grp_dump(struct ice_hw *hw, struct ice_proto_grp_item *item);
+struct ice_proto_grp_item *ice_proto_grp_table_get(struct ice_hw *hw);
+#endif /* _ICE_PROTO_GRP_H_ */
diff --git a/drivers/net/ice/base/meson.build b/drivers/net/ice/base/meson.build
index df021b12dd..8da942a2be 100644
--- a/drivers/net/ice/base/meson.build
+++ b/drivers/net/ice/base/meson.build
@@ -22,6 +22,7 @@ sources = [
'ice_bst_tcam.c',
'ice_ptype_mk.c',
'ice_mk_grp.c',
+ 'ice_proto_grp.c',
]
error_cflags = [
--
2.26.2
^ permalink raw reply [flat|nested] 21+ messages in thread
* [dpdk-dev] [PATCH 09/20] net/ice/base: init flag redirect table for parser
2021-09-17 11:02 [dpdk-dev] [PATCH 00/20] ice/base: add parser module Qi Zhang
` (7 preceding siblings ...)
2021-09-17 11:02 ` [dpdk-dev] [PATCH 08/20] net/ice/base: init protocol " Qi Zhang
@ 2021-09-17 11:02 ` Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 10/20] net/ice/base: init XLT key builder " Qi Zhang
` (10 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Qi Zhang @ 2021-09-17 11:02 UTC (permalink / raw)
To: qiming.yang; +Cc: junfeng.guo, dev, Qi Zhang
Parse DDP section ICE_SID_RXPARSER_FLAG_REDIR into an array of
ice_flag_rd_item.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flex_type.h | 2 ++
drivers/net/ice/base/ice_flg_rd.c | 53 ++++++++++++++++++++++++++++
drivers/net/ice/base/ice_flg_rd.h | 16 +++++++++
drivers/net/ice/base/ice_parser.c | 11 ++++++
drivers/net/ice/base/ice_parser.h | 3 ++
drivers/net/ice/base/meson.build | 1 +
6 files changed, 86 insertions(+)
create mode 100644 drivers/net/ice/base/ice_flg_rd.c
create mode 100644 drivers/net/ice/base/ice_flg_rd.h
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index 3f2038c931..59eeca0a30 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -198,6 +198,8 @@ struct ice_buf_hdr {
#define ICE_SID_CDID_KEY_BUILDER_PE 87
#define ICE_SID_CDID_REDIR_PE 88
+#define ICE_SID_RXPARSER_FLAG_REDIR 97
+
/* Label Metadata section IDs */
#define ICE_SID_LBL_FIRST 0x80000010
#define ICE_SID_LBL_RXPARSER_IMEM 0x80000010
diff --git a/drivers/net/ice/base/ice_flg_rd.c b/drivers/net/ice/base/ice_flg_rd.c
new file mode 100644
index 0000000000..292916d9a8
--- /dev/null
+++ b/drivers/net/ice/base/ice_flg_rd.c
@@ -0,0 +1,53 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2021 Intel Corporation
+ */
+
+#include "ice_common.h"
+#include "ice_parser_util.h"
+
+#define ICE_FLG_RD_TABLE_SIZE 64
+
+/**
+ * ice_flg_rd_dump - dump a flag redirect item info
+ * @ice_hw: pointer to the hardware structure
+ * @item: flag redirect item to dump
+ */
+void ice_flg_rd_dump(struct ice_hw *hw, struct ice_flg_rd_item *item)
+{
+ ice_info(hw, "index = %d\n", item->idx);
+ ice_info(hw, "expose = %d\n", item->expose);
+ ice_info(hw, "intr_flg_id = %d\n", item->intr_flg_id);
+}
+
+/** The function parses a 8 bits Flag Redirect Table entry with below format:
+ * BIT 0: Expose (rdi->expose)
+ * BIT 1-6: Internal Flag ID (rdi->intr_flg_id)
+ * BIT 7: reserved
+ */
+static void _flg_rd_parse_item(struct ice_hw *hw, u16 idx, void *item,
+ void *data, int size)
+{
+ struct ice_flg_rd_item *rdi = (struct ice_flg_rd_item *)item;
+ u8 d8 = *(u8 *)data;
+
+ rdi->idx = idx;
+ rdi->expose = (d8 & 0x1) != 0;
+ rdi->intr_flg_id = (u8)((d8 >> 1) & 0x3f);
+
+ if (hw->debug_mask & ICE_DBG_PARSER)
+ ice_flg_rd_dump(hw, rdi);
+}
+
+/**
+ * ice_flg_rd_table_get - create a flag redirect table
+ * @ice_hw: pointer to the hardware structure
+ */
+struct ice_flg_rd_item *ice_flg_rd_table_get(struct ice_hw *hw)
+{
+ return (struct ice_flg_rd_item *)
+ ice_parser_create_table(hw, ICE_SID_RXPARSER_FLAG_REDIR,
+ sizeof(struct ice_flg_rd_item),
+ ICE_FLG_RD_TABLE_SIZE,
+ ice_parser_sect_item_get,
+ _flg_rd_parse_item, false);
+}
diff --git a/drivers/net/ice/base/ice_flg_rd.h b/drivers/net/ice/base/ice_flg_rd.h
new file mode 100644
index 0000000000..e65350f18c
--- /dev/null
+++ b/drivers/net/ice/base/ice_flg_rd.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2021 Intel Corporation
+ */
+
+#ifndef _ICE_FLG_RD_H_
+#define _ICE_FLG_RD_H_
+
+struct ice_flg_rd_item {
+ u16 idx;
+ bool expose;
+ u8 intr_flg_id;
+};
+
+void ice_flg_rd_dump(struct ice_hw *hw, struct ice_flg_rd_item *item);
+struct ice_flg_rd_item *ice_flg_rd_table_get(struct ice_hw *hw);
+#endif /* _ICE_FLG_RD_H_ */
diff --git a/drivers/net/ice/base/ice_parser.c b/drivers/net/ice/base/ice_parser.c
index a4ca7dd545..437dc5b8f8 100644
--- a/drivers/net/ice/base/ice_parser.c
+++ b/drivers/net/ice/base/ice_parser.c
@@ -16,6 +16,7 @@
#define ICE_SID_RXPARSER_MARKER_TYPE_ENTRY_SIZE 24
#define ICE_SID_RXPARSER_MARKER_GRP_ENTRY_SIZE 8
#define ICE_SID_RXPARSER_PROTO_GRP_ENTRY_SIZE 24
+#define ICE_SID_RXPARSER_FLAG_REDIR_ENTRY_SIZE 1
#define ICE_SEC_LBL_DATA_OFFSET 2
#define ICE_SID_LBL_ENTRY_SIZE 66
@@ -84,6 +85,9 @@ void *ice_parser_sect_item_get(u32 sect_type, void *section,
case ICE_SID_RXPARSER_PROTO_GRP:
size = ICE_SID_RXPARSER_PROTO_GRP_ENTRY_SIZE;
break;
+ case ICE_SID_RXPARSER_FLAG_REDIR:
+ size = ICE_SID_RXPARSER_FLAG_REDIR_ENTRY_SIZE;
+ break;
default:
return NULL;
}
@@ -235,6 +239,12 @@ enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr)
goto err;
}
+ p->flg_rd_table = ice_flg_rd_table_get(hw);
+ if (!p->flg_rd_table) {
+ status = ICE_ERR_PARAM;
+ goto err;
+ }
+
*psr = p;
return ICE_SUCCESS;
err:
@@ -259,6 +269,7 @@ void ice_parser_destroy(struct ice_parser *psr)
ice_free(psr->hw, psr->ptype_mk_tcam_table);
ice_free(psr->hw, psr->mk_grp_table);
ice_free(psr->hw, psr->proto_grp_table);
+ ice_free(psr->hw, psr->flg_rd_table);
ice_free(psr->hw, psr);
}
diff --git a/drivers/net/ice/base/ice_parser.h b/drivers/net/ice/base/ice_parser.h
index 20e59451a5..f7c3c1a318 100644
--- a/drivers/net/ice/base/ice_parser.h
+++ b/drivers/net/ice/base/ice_parser.h
@@ -12,6 +12,7 @@
#include "ice_ptype_mk.h"
#include "ice_mk_grp.h"
#include "ice_proto_grp.h"
+#include "ice_flg_rd.h"
struct ice_parser {
struct ice_hw *hw; /* pointer to the hardware structure */
@@ -38,6 +39,8 @@ struct ice_parser {
struct ice_mk_grp_item *mk_grp_table;
/* load data from section ICE_SID_RXPARSER_PROTO_GRP */
struct ice_proto_grp_item *proto_grp_table;
+ /* load data from section ICE_SID_RXPARSER_FLAG_REDIR */
+ struct ice_flg_rd_item *flg_rd_table;
};
enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr);
diff --git a/drivers/net/ice/base/meson.build b/drivers/net/ice/base/meson.build
index 8da942a2be..9ce508c272 100644
--- a/drivers/net/ice/base/meson.build
+++ b/drivers/net/ice/base/meson.build
@@ -23,6 +23,7 @@ sources = [
'ice_ptype_mk.c',
'ice_mk_grp.c',
'ice_proto_grp.c',
+ 'ice_flg_rd.c',
]
error_cflags = [
--
2.26.2
^ permalink raw reply [flat|nested] 21+ messages in thread
* [dpdk-dev] [PATCH 10/20] net/ice/base: init XLT key builder for parser
2021-09-17 11:02 [dpdk-dev] [PATCH 00/20] ice/base: add parser module Qi Zhang
` (8 preceding siblings ...)
2021-09-17 11:02 ` [dpdk-dev] [PATCH 09/20] net/ice/base: init flag redirect " Qi Zhang
@ 2021-09-17 11:02 ` Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 11/20] net/ice/base: add parser runtime skeleton Qi Zhang
` (9 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Qi Zhang @ 2021-09-17 11:02 UTC (permalink / raw)
To: qiming.yang; +Cc: junfeng.guo, dev, Qi Zhang
Parse below DDP section into struct ice_xlt_kb:
ICE_SID_XLT_KEY_BUILDER_SW
ICE_SID_XLT_KEY_BUILDER_FD
ICE_SID_XLT_KEY_BUILDER_RSS
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 2 +-
drivers/net/ice/base/ice_flex_pipe.h | 3 +
drivers/net/ice/base/ice_parser.c | 28 ++++
drivers/net/ice/base/ice_parser.h | 9 ++
drivers/net/ice/base/ice_xlt_kb.c | 189 +++++++++++++++++++++++++++
drivers/net/ice/base/ice_xlt_kb.h | 33 +++++
drivers/net/ice/base/meson.build | 1 +
7 files changed, 264 insertions(+), 1 deletion(-)
create mode 100644 drivers/net/ice/base/ice_xlt_kb.c
create mode 100644 drivers/net/ice/base/ice_xlt_kb.h
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 703c3e0416..f35d59f4f5 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -218,7 +218,7 @@ ice_pkg_advance_sect(struct ice_seg *ice_seg, struct ice_pkg_enum *state)
* When the function returns a NULL pointer, then the end of the matching
* sections has been reached.
*/
-static void *
+void *
ice_pkg_enum_section(struct ice_seg *ice_seg, struct ice_pkg_enum *state,
u32 sect_type)
{
diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h
index 045a77c607..9733c4b214 100644
--- a/drivers/net/ice/base/ice_flex_pipe.h
+++ b/drivers/net/ice/base/ice_flex_pipe.h
@@ -99,4 +99,7 @@ ice_pkg_enum_entry(struct ice_seg *ice_seg, struct ice_pkg_enum *state,
u32 sect_type, u32 *offset,
void *(*handler)(u32 sect_type, void *section,
u32 index, u32 *offset));
+void *
+ice_pkg_enum_section(struct ice_seg *ice_seg, struct ice_pkg_enum *state,
+ u32 sect_type);
#endif /* _ICE_FLEX_PIPE_H_ */
diff --git a/drivers/net/ice/base/ice_parser.c b/drivers/net/ice/base/ice_parser.c
index 437dc5b8f8..0b79b62e04 100644
--- a/drivers/net/ice/base/ice_parser.c
+++ b/drivers/net/ice/base/ice_parser.c
@@ -245,6 +245,30 @@ enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr)
goto err;
}
+ p->xlt_kb_sw = ice_xlt_kb_get_sw(hw);
+ if (!p->xlt_kb_sw) {
+ status = ICE_ERR_PARAM;
+ goto err;
+ }
+
+ p->xlt_kb_acl = ice_xlt_kb_get_acl(hw);
+ if (!p->xlt_kb_acl) {
+ status = ICE_ERR_PARAM;
+ goto err;
+ }
+
+ p->xlt_kb_fd = ice_xlt_kb_get_fd(hw);
+ if (!p->xlt_kb_fd) {
+ status = ICE_ERR_PARAM;
+ goto err;
+ }
+
+ p->xlt_kb_rss = ice_xlt_kb_get_rss(hw);
+ if (!p->xlt_kb_rss) {
+ status = ICE_ERR_PARAM;
+ goto err;
+ }
+
*psr = p;
return ICE_SUCCESS;
err:
@@ -270,6 +294,10 @@ void ice_parser_destroy(struct ice_parser *psr)
ice_free(psr->hw, psr->mk_grp_table);
ice_free(psr->hw, psr->proto_grp_table);
ice_free(psr->hw, psr->flg_rd_table);
+ ice_free(psr->hw, psr->xlt_kb_sw);
+ ice_free(psr->hw, psr->xlt_kb_acl);
+ ice_free(psr->hw, psr->xlt_kb_fd);
+ ice_free(psr->hw, psr->xlt_kb_rss);
ice_free(psr->hw, psr);
}
diff --git a/drivers/net/ice/base/ice_parser.h b/drivers/net/ice/base/ice_parser.h
index f7c3c1a318..89cd714fbd 100644
--- a/drivers/net/ice/base/ice_parser.h
+++ b/drivers/net/ice/base/ice_parser.h
@@ -13,6 +13,7 @@
#include "ice_mk_grp.h"
#include "ice_proto_grp.h"
#include "ice_flg_rd.h"
+#include "ice_xlt_kb.h"
struct ice_parser {
struct ice_hw *hw; /* pointer to the hardware structure */
@@ -41,6 +42,14 @@ struct ice_parser {
struct ice_proto_grp_item *proto_grp_table;
/* load data from section ICE_SID_RXPARSER_FLAG_REDIR */
struct ice_flg_rd_item *flg_rd_table;
+ /* load data from section ICE_SID_XLT_KEY_BUILDER_SW */
+ struct ice_xlt_kb *xlt_kb_sw;
+ /* load data from section ICE_SID_XLT_KEY_BUILDER_ACL */
+ struct ice_xlt_kb *xlt_kb_acl;
+ /* load data from section ICE_SID_XLT_KEY_BUILDER_FD */
+ struct ice_xlt_kb *xlt_kb_fd;
+ /* load data from section ICE_SID_XLT_KEY_BUILDER_RSS */
+ struct ice_xlt_kb *xlt_kb_rss;
};
enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr);
diff --git a/drivers/net/ice/base/ice_xlt_kb.c b/drivers/net/ice/base/ice_xlt_kb.c
new file mode 100644
index 0000000000..8b4043a836
--- /dev/null
+++ b/drivers/net/ice/base/ice_xlt_kb.c
@@ -0,0 +1,189 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2021 Intel Corporation
+ */
+
+#include "ice_common.h"
+
+#define ICE_XLT_KB_TBL_OFF 12
+#define ICE_XLT_KB_TBL_ENTRY_SIZE 24
+
+static void _xlt_kb_entry_dump(struct ice_hw *hw,
+ struct ice_xlt_kb_entry *entry, int idx)
+{
+ int i;
+
+ ice_info(hw, "key builder entry %d\n", idx);
+ ice_info(hw, "\txlt1_ad_sel = %d\n", entry->xlt1_ad_sel);
+ ice_info(hw, "\txlt2_ad_sel = %d\n", entry->xlt2_ad_sel);
+
+ for (i = 0; i < ICE_XLT_KB_FLAG0_14_CNT; i++)
+ ice_info(hw, "\tflg%d_sel = %d\n", i, entry->flg0_14_sel[i]);
+
+ ice_info(hw, "\txlt1_md_sel = %d\n", entry->xlt1_md_sel);
+ ice_info(hw, "\txlt2_md_sel = %d\n", entry->xlt2_md_sel);
+}
+
+/**
+ * ice_imem_dump - dump a xlt key build info
+ * @ice_hw: pointer to the hardware structure
+ * @kb: key build to dump
+ */
+void ice_xlt_kb_dump(struct ice_hw *hw, struct ice_xlt_kb *kb)
+{
+ int i;
+
+ ice_info(hw, "xlt1_pm = %d\n", kb->xlt1_pm);
+ ice_info(hw, "xlt2_pm = %d\n", kb->xlt2_pm);
+ ice_info(hw, "prof_id_pm = %d\n", kb->prof_id_pm);
+ ice_info(hw, "flag15 low = 0x%08x\n", (u32)kb->flag15);
+ ice_info(hw, "flag15 high = 0x%08x\n", (u32)(kb->flag15 >> 32));
+
+ for (i = 0; i < ICE_XLT_KB_TBL_CNT; i++)
+ _xlt_kb_entry_dump(hw, &kb->entries[i], i);
+}
+
+/** The function parses a 192 bits XLT Key Build entry with below format:
+ * BIT 0-31: reserved
+ * BIT 32-34: XLT1 AdSel (entry->xlt1_ad_sel)
+ * BIT 35-37: XLT2 AdSel (entry->xlt2_ad_sel)
+ * BIT 38-46: Flag 0 Select (entry->flg0_14_sel[0])
+ * BIT 47-55: Flag 1 Select (entry->flg0_14_sel[1])
+ * BIT 56-64: Flag 2 Select (entry->flg0_14_sel[2])
+ * BIT 65-73: Flag 3 Select (entry->flg0_14_sel[3])
+ * BIT 74-82: Flag 4 Select (entry->flg0_14_sel[4])
+ * BIT 83-91: Flag 5 Select (entry->flg0_14_sel[5])
+ * BIT 92-100: Flag 6 Select (entry->flg0_14_sel[6])
+ * BIT 101-109:Flag 7 Select (entry->flg0_14_sel[7])
+ * BIT 110-118:Flag 8 Select (entry->flg0_14_sel[8])
+ * BIT 119-127:Flag 9 Select (entry->flg0_14_sel[9])
+ * BIT 128-136:Flag 10 Select (entry->flg0_14_sel[10])
+ * BIT 137-145:Flag 11 Select (entry->flg0_14_sel[11])
+ * BIT 146-154:Flag 12 Select (entry->flg0_14_sel[12])
+ * BIT 155-163:Flag 13 Select (entry->flg0_14_sel[13])
+ * BIT 164-172:Flag 14 Select (entry->flg0_14_sel[14])
+ * BIT 173-181:reserved
+ * BIT 182-186:XLT1 MdSel (entry->xlt1_md_sel)
+ * BIT 187-191:XLT2 MdSel (entry->xlt2_md_sel)
+ */
+static void _kb_entry_init(struct ice_xlt_kb_entry *entry, u8 *data)
+{
+ u64 d64 = *(u64 *)&data[4];
+
+ entry->xlt1_ad_sel = (u8)(d64 & 0x7);
+ entry->xlt2_ad_sel = (u8)((d64 >> 3) & 0x7);
+ entry->flg0_14_sel[0] = (u16)((d64 >> 6) & 0x1ff);
+ entry->flg0_14_sel[1] = (u16)((d64 >> 15) & 0x1ff);
+ entry->flg0_14_sel[2] = (u16)((d64 >> 24) & 0x1ff);
+ entry->flg0_14_sel[3] = (u16)((d64 >> 33) & 0x1ff);
+ entry->flg0_14_sel[4] = (u16)((d64 >> 42) & 0x1ff);
+ entry->flg0_14_sel[5] = (u16)((d64 >> 51) & 0x1ff);
+
+ d64 = (*(u64 *)&data[11] >> 4);
+ entry->flg0_14_sel[6] = (u16)(d64 & 0x1ff);
+ entry->flg0_14_sel[7] = (u16)((d64 >> 9) & 0x1ff);
+ entry->flg0_14_sel[8] = (u16)((d64 >> 18) & 0x1ff);
+ entry->flg0_14_sel[9] = (u16)((d64 >> 27) & 0x1ff);
+ entry->flg0_14_sel[10] = (u16)((d64 >> 36) & 0x1ff);
+ entry->flg0_14_sel[11] = (u16)((d64 >> 45) & 0x1ff);
+
+ d64 = (*(u64 *)&data[18] >> 2);
+ entry->flg0_14_sel[12] = (u16)(d64 & 0x1ff);
+ entry->flg0_14_sel[13] = (u16)((d64 >> 9) & 0x1ff);
+ entry->flg0_14_sel[14] = (u16)((d64 >> 18) & 0x1ff);
+
+ entry->xlt1_md_sel = (u8)((d64 >> 36) & 0x1f);
+ entry->xlt2_md_sel = (u8)((d64 >> 41) & 0x1f);
+}
+
+/** The function parses a 204 bytes XLT Key Build Table with below format:
+ * byte 0: XLT1 Partition Mode (kb->xlt1_pm)
+ * byte 1: XLT2 Partition Mode (kb->xlt2_pm)
+ * byte 2: Profile ID Partition Mode (kb->prof_id_pm)
+ * byte 3: reserved
+ * byte 4-11: Flag15 Mask (kb->flag15)
+ * byte 12-203:8 Key Build entries (kb->entries)
+ */
+static void _parse_kb_data(struct ice_hw *hw, struct ice_xlt_kb *kb, void *data)
+{
+ u8 *buf = (u8 *)data;
+ int i;
+
+ kb->xlt1_pm = buf[0];
+ kb->xlt2_pm = buf[1];
+ kb->prof_id_pm = buf[2];
+
+ kb->flag15 = *(u64 *)&buf[4];
+ for (i = 0; i < ICE_XLT_KB_TBL_CNT; i++)
+ _kb_entry_init(&kb->entries[i],
+ &buf[ICE_XLT_KB_TBL_OFF +
+ i * ICE_XLT_KB_TBL_ENTRY_SIZE]);
+
+ if (hw->debug_mask & ICE_DBG_PARSER)
+ ice_xlt_kb_dump(hw, kb);
+}
+
+static struct ice_xlt_kb *_xlt_kb_get(struct ice_hw *hw, u32 sect_type)
+{
+ struct ice_seg *seg = hw->seg;
+ struct ice_pkg_enum state;
+ struct ice_xlt_kb *kb;
+ void *data;
+
+ if (!seg)
+ return NULL;
+
+ kb = (struct ice_xlt_kb *)ice_malloc(hw, sizeof(*kb));
+ if (!kb) {
+ ice_debug(hw, ICE_DBG_PARSER, "failed to allocate memory for xlt key builder type %d.\n",
+ sect_type);
+ return NULL;
+ }
+
+ ice_memset(&state, 0, sizeof(state), ICE_NONDMA_MEM);
+ data = ice_pkg_enum_section(seg, &state, sect_type);
+ if (!data) {
+ ice_debug(hw, ICE_DBG_PARSER, "failed to find section type %d.\n",
+ sect_type);
+ return NULL;
+ }
+
+ _parse_kb_data(hw, kb, data);
+
+ return kb;
+}
+
+/**
+ * ice_xlt_kb_get_sw - create switch xlt key build
+ * @ice_hw: pointer to the hardware structure
+ */
+struct ice_xlt_kb *ice_xlt_kb_get_sw(struct ice_hw *hw)
+{
+ return _xlt_kb_get(hw, ICE_SID_XLT_KEY_BUILDER_SW);
+}
+
+/**
+ * ice_xlt_kb_get_acl - create acl xlt key build
+ * @ice_hw: pointer to the hardware structure
+ */
+struct ice_xlt_kb *ice_xlt_kb_get_acl(struct ice_hw *hw)
+{
+ return _xlt_kb_get(hw, ICE_SID_XLT_KEY_BUILDER_ACL);
+}
+
+/**
+ * ice_xlt_kb_get_fd - create fdir xlt key build
+ * @ice_hw: pointer to the hardware structure
+ */
+struct ice_xlt_kb *ice_xlt_kb_get_fd(struct ice_hw *hw)
+{
+ return _xlt_kb_get(hw, ICE_SID_XLT_KEY_BUILDER_FD);
+}
+
+/**
+ * ice_xlt_kb_get_fd - create rss xlt key build
+ * @ice_hw: pointer to the hardware structure
+ */
+struct ice_xlt_kb *ice_xlt_kb_get_rss(struct ice_hw *hw)
+{
+ return _xlt_kb_get(hw, ICE_SID_XLT_KEY_BUILDER_RSS);
+}
diff --git a/drivers/net/ice/base/ice_xlt_kb.h b/drivers/net/ice/base/ice_xlt_kb.h
new file mode 100644
index 0000000000..a95d845f89
--- /dev/null
+++ b/drivers/net/ice/base/ice_xlt_kb.h
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2021 Intel Corporation
+ */
+
+#ifndef _ICE_XLT_KB_H_
+#define _ICE_XLT_KB_H_
+
+#define ICE_XLT_KB_TBL_CNT 8
+#define ICE_XLT_KB_FLAG0_14_CNT 15
+
+struct ice_xlt_kb_entry {
+ u8 xlt1_ad_sel;
+ u8 xlt2_ad_sel;
+ u16 flg0_14_sel[ICE_XLT_KB_FLAG0_14_CNT];
+ u8 xlt1_md_sel;
+ u8 xlt2_md_sel;
+};
+
+struct ice_xlt_kb {
+ u8 xlt1_pm;
+ u8 xlt2_pm;
+ u8 prof_id_pm;
+ u64 flag15;
+
+ struct ice_xlt_kb_entry entries[ICE_XLT_KB_TBL_CNT];
+};
+
+void ice_xlt_kb_dump(struct ice_hw *hw, struct ice_xlt_kb *kb);
+struct ice_xlt_kb *ice_xlt_kb_get_sw(struct ice_hw *hw);
+struct ice_xlt_kb *ice_xlt_kb_get_acl(struct ice_hw *hw);
+struct ice_xlt_kb *ice_xlt_kb_get_fd(struct ice_hw *hw);
+struct ice_xlt_kb *ice_xlt_kb_get_rss(struct ice_hw *hw);
+#endif /* _ICE_XLT_KB_H */
diff --git a/drivers/net/ice/base/meson.build b/drivers/net/ice/base/meson.build
index 9ce508c272..35f2ac2312 100644
--- a/drivers/net/ice/base/meson.build
+++ b/drivers/net/ice/base/meson.build
@@ -24,6 +24,7 @@ sources = [
'ice_mk_grp.c',
'ice_proto_grp.c',
'ice_flg_rd.c',
+ 'ice_xlt_kb.c',
]
error_cflags = [
--
2.26.2
^ permalink raw reply [flat|nested] 21+ messages in thread
* [dpdk-dev] [PATCH 11/20] net/ice/base: add parser runtime skeleton
2021-09-17 11:02 [dpdk-dev] [PATCH 00/20] ice/base: add parser module Qi Zhang
` (9 preceding siblings ...)
2021-09-17 11:02 ` [dpdk-dev] [PATCH 10/20] net/ice/base: init XLT key builder " Qi Zhang
@ 2021-09-17 11:02 ` Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 12/20] net/ice/base: add helper function for boost TCAM match Qi Zhang
` (8 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Qi Zhang @ 2021-09-17 11:02 UTC (permalink / raw)
To: qiming.yang; +Cc: junfeng.guo, dev, Qi Zhang
Add parser runtime data struct ice_parser_rt.
Add below APIs for parser runtime preparation:
ice_parser_rt_reset
ice_parser_rt_pkt_buf_set
Add below API skeleton for parser runtime execution:
ice_parser_rt_execute
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_parser.c | 39 +++++++++++
drivers/net/ice/base/ice_parser.h | 24 +++++++
drivers/net/ice/base/ice_parser_rt.c | 98 ++++++++++++++++++++++++++++
drivers/net/ice/base/ice_parser_rt.h | 28 ++++++++
drivers/net/ice/base/meson.build | 1 +
5 files changed, 190 insertions(+)
create mode 100644 drivers/net/ice/base/ice_parser_rt.c
create mode 100644 drivers/net/ice/base/ice_parser_rt.h
diff --git a/drivers/net/ice/base/ice_parser.c b/drivers/net/ice/base/ice_parser.c
index 0b79b62e04..a0c5c9989d 100644
--- a/drivers/net/ice/base/ice_parser.c
+++ b/drivers/net/ice/base/ice_parser.c
@@ -167,6 +167,8 @@ enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr)
struct ice_parser *p;
p = (struct ice_parser *)ice_malloc(hw, sizeof(struct ice_parser));
+ p->hw = hw;
+ p->rt.psr = p;
if (!p)
return ICE_ERR_NO_MEMORY;
@@ -301,3 +303,40 @@ void ice_parser_destroy(struct ice_parser *psr)
ice_free(psr->hw, psr);
}
+
+/**
+ * ice_parser_run - parse on a packet in binary and return the result
+ * @psr: pointer to a parser instance
+ * @pkt_buf: packet data
+ * @pkt_len: packet length
+ * @rslt: input/output parameter to save parser result.
+ */
+enum ice_status ice_parser_run(struct ice_parser *psr, const u8 *pkt_buf,
+ int pkt_len, struct ice_parser_result *rslt)
+{
+ ice_parser_rt_reset(&psr->rt);
+ ice_parser_rt_pktbuf_set(&psr->rt, pkt_buf, pkt_len);
+
+ return ice_parser_rt_execute(&psr->rt, rslt);
+}
+
+/**
+ * ice_parser_result_dump - dump a parser result info
+ * @hw: pointer to the hardware structure
+ * @rslt: parser result info to dump
+ */
+void ice_parser_result_dump(struct ice_hw *hw, struct ice_parser_result *rslt)
+{
+ int i;
+
+ ice_info(hw, "ptype = %d\n", rslt->ptype);
+ for (i = 0; i < rslt->po_num; i++)
+ ice_info(hw, "proto = %d, offset = %d\n",
+ rslt->po[i].proto_id, rslt->po[i].offset);
+
+ ice_info(hw, "flags_psr = 0x%016" PRIx64 "\n", rslt->flags_psr);
+ ice_info(hw, "flags_pkt = 0x%016" PRIx64 "\n", rslt->flags_pkt);
+ ice_info(hw, "flags_sw = 0x%04x\n", rslt->flags_sw);
+ ice_info(hw, "flags_fd = 0x%04x\n", rslt->flags_fd);
+ ice_info(hw, "flags_rss = 0x%04x\n", rslt->flags_rss);
+}
diff --git a/drivers/net/ice/base/ice_parser.h b/drivers/net/ice/base/ice_parser.h
index 89cd714fbd..3a307e0344 100644
--- a/drivers/net/ice/base/ice_parser.h
+++ b/drivers/net/ice/base/ice_parser.h
@@ -14,6 +14,7 @@
#include "ice_proto_grp.h"
#include "ice_flg_rd.h"
#include "ice_xlt_kb.h"
+#include "ice_parser_rt.h"
struct ice_parser {
struct ice_hw *hw; /* pointer to the hardware structure */
@@ -50,8 +51,31 @@ struct ice_parser {
struct ice_xlt_kb *xlt_kb_fd;
/* load data from section ICE_SID_XLT_KEY_BUILDER_RSS */
struct ice_xlt_kb *xlt_kb_rss;
+ struct ice_parser_rt rt; /* parser runtime */
};
enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr);
void ice_parser_destroy(struct ice_parser *psr);
+
+struct ice_parser_proto_off {
+ u8 proto_id; /* hardware protocol ID */
+ u16 offset; /* offset where the protocol header start */
+};
+
+struct ice_parser_result {
+ u16 ptype; /* 16 bits hardware PTYPE */
+ /* protocol and header offset pairs */
+ struct ice_parser_proto_off po[16];
+ int po_num; /* number of pairs must <= 16 */
+ u64 flags_psr; /* 64 bits parser flags */
+ u64 flags_pkt; /* 64 bits packet flags */
+ u16 flags_sw; /* 16 bits key builder flag for SW */
+ u16 flags_acl; /* 16 bits key builder flag for ACL */
+ u16 flags_fd; /* 16 bits key builder flag for FD */
+ u16 flags_rss; /* 16 bits key builder flag for RSS */
+};
+
+enum ice_status ice_parser_run(struct ice_parser *psr, const u8 *pkt_buf,
+ int pkt_len, struct ice_parser_result *rslt);
+void ice_parser_result_dump(struct ice_hw *hw, struct ice_parser_result *rslt);
#endif /* _ICE_PARSER_H_ */
diff --git a/drivers/net/ice/base/ice_parser_rt.c b/drivers/net/ice/base/ice_parser_rt.c
new file mode 100644
index 0000000000..d62d0170e5
--- /dev/null
+++ b/drivers/net/ice/base/ice_parser_rt.c
@@ -0,0 +1,98 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2021 Intel Corporation
+ */
+
+#include "ice_common.h"
+
+#define GPR_HB_IDX 64
+#define GPR_ERR_IDX 84
+#define GPR_FLG_IDX 104
+#define GPR_TSR_IDX 108
+#define GPR_NN_IDX 109
+#define GPR_HO_IDX 110
+#define GPR_NP_IDX 111
+
+static void _rt_tsr_set(struct ice_parser_rt *rt, u16 tsr)
+{
+ rt->gpr[GPR_TSR_IDX] = tsr;
+}
+
+static void _rt_ho_set(struct ice_parser_rt *rt, u16 ho)
+{
+ rt->gpr[GPR_HO_IDX] = ho;
+ ice_memcpy(&rt->gpr[GPR_HB_IDX], &rt->pkt_buf[ho], 32,
+ ICE_NONDMA_TO_NONDMA);
+}
+
+static void _rt_np_set(struct ice_parser_rt *rt, u16 pc)
+{
+ rt->gpr[GPR_NP_IDX] = pc;
+}
+
+static void _rt_nn_set(struct ice_parser_rt *rt, u16 node)
+{
+ rt->gpr[GPR_NN_IDX] = node;
+}
+
+static void _rt_flag_set(struct ice_parser_rt *rt, int idx)
+{
+ int y = idx / 16;
+ int x = idx % 16;
+
+ rt->gpr[GPR_FLG_IDX + y] |= (u16)(1 << x);
+}
+
+/**
+ * ice_parser_rt_reset - reset the parser runtime
+ * @rt: pointer to the parser runtime
+ */
+void ice_parser_rt_reset(struct ice_parser_rt *rt)
+{
+ struct ice_parser *psr = rt->psr;
+ struct ice_metainit_item *mi = &psr->mi_table[0];
+ int i;
+
+ ice_memset(rt, 0, sizeof(*rt), ICE_NONDMA_MEM);
+
+ _rt_tsr_set(rt, mi->tsr);
+ _rt_ho_set(rt, mi->ho);
+ _rt_np_set(rt, mi->pc);
+ _rt_nn_set(rt, mi->pg_rn);
+
+ for (i = 0; i < 64; i++) {
+ if ((mi->flags & (1ul << i)) != 0ul)
+ _rt_flag_set(rt, i);
+ }
+
+ rt->psr = psr;
+}
+
+/**
+ * ice_parser_rt_pktbuf_set - set a packet into parser runtime
+ * @rt: pointer to the parser runtime
+ * @pkt_buf: buffer with packet data
+ * @pkt_len: packet buffer length
+ */
+void ice_parser_rt_pktbuf_set(struct ice_parser_rt *rt, const u8 *pkt_buf,
+ int pkt_len)
+{
+ int len = min(ICE_PARSER_MAX_PKT_LEN, pkt_len);
+ u16 ho = rt->gpr[GPR_HO_IDX];
+
+ ice_memcpy(rt->pkt_buf, pkt_buf, len, ICE_NONDMA_TO_NONDMA);
+ rt->pkt_len = pkt_len;
+
+ ice_memcpy(&rt->gpr[GPR_HB_IDX], &rt->pkt_buf[ho], 32,
+ ICE_NONDMA_TO_NONDMA);
+}
+
+/**
+ * ice_parser_rt_execute - parser execution routine
+ * @rt: pointer to the parser runtime
+ * @rslt: input/output parameter to save parser result
+ */
+enum ice_status ice_parser_rt_execute(struct ice_parser_rt *rt,
+ struct ice_parser_result *rslt)
+{
+ return ICE_ERR_NOT_IMPL;
+}
diff --git a/drivers/net/ice/base/ice_parser_rt.h b/drivers/net/ice/base/ice_parser_rt.h
new file mode 100644
index 0000000000..32fa7f6579
--- /dev/null
+++ b/drivers/net/ice/base/ice_parser_rt.h
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2021 Intel Corporation
+ */
+
+#ifndef _ICE_PARSER_RT_H_
+#define _ICE_PARSER_RT_H_
+
+struct ice_parser_ctx;
+
+#define ICE_PARSER_MAX_PKT_LEN 504
+#define ICE_PARSER_GPR_NUM 128
+
+struct ice_parser_rt {
+ struct ice_parser *psr;
+ u16 gpr[ICE_PARSER_GPR_NUM];
+ u8 pkt_buf[ICE_PARSER_MAX_PKT_LEN + 32];
+ u16 pkt_len;
+ u16 po;
+};
+
+void ice_parser_rt_reset(struct ice_parser_rt *rt);
+void ice_parser_rt_pktbuf_set(struct ice_parser_rt *rt, const u8 *pkt_buf,
+ int pkt_len);
+
+struct ice_parser_result;
+enum ice_status ice_parser_rt_execute(struct ice_parser_rt *rt,
+ struct ice_parser_result *rslt);
+#endif /* _ICE_PARSER_RT_H_ */
diff --git a/drivers/net/ice/base/meson.build b/drivers/net/ice/base/meson.build
index 35f2ac2312..c4fd1b96c6 100644
--- a/drivers/net/ice/base/meson.build
+++ b/drivers/net/ice/base/meson.build
@@ -25,6 +25,7 @@ sources = [
'ice_proto_grp.c',
'ice_flg_rd.c',
'ice_xlt_kb.c',
+ 'ice_parser_rt.c',
]
error_cflags = [
--
2.26.2
^ permalink raw reply [flat|nested] 21+ messages in thread
* [dpdk-dev] [PATCH 12/20] net/ice/base: add helper function for boost TCAM match
2021-09-17 11:02 [dpdk-dev] [PATCH 00/20] ice/base: add parser module Qi Zhang
` (10 preceding siblings ...)
2021-09-17 11:02 ` [dpdk-dev] [PATCH 11/20] net/ice/base: add parser runtime skeleton Qi Zhang
@ 2021-09-17 11:02 ` Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 13/20] net/ice/base: add helper functions for parse graph key matching Qi Zhang
` (7 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Qi Zhang @ 2021-09-17 11:02 UTC (permalink / raw)
To: qiming.yang; +Cc: junfeng.guo, dev, Qi Zhang
Add internal helper function ice_bst_tcam_match to perform ternary
match on boost TCAM.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_bst_tcam.c | 22 +++++++++++++++
drivers/net/ice/base/ice_bst_tcam.h | 3 ++
drivers/net/ice/base/ice_parser.h | 1 +
drivers/net/ice/base/ice_tmatch.h | 44 +++++++++++++++++++++++++++++
4 files changed, 70 insertions(+)
create mode 100644 drivers/net/ice/base/ice_tmatch.h
diff --git a/drivers/net/ice/base/ice_bst_tcam.c b/drivers/net/ice/base/ice_bst_tcam.c
index 1c82359681..76b3a5c551 100644
--- a/drivers/net/ice/base/ice_bst_tcam.c
+++ b/drivers/net/ice/base/ice_bst_tcam.c
@@ -239,3 +239,25 @@ struct ice_lbl_item *ice_bst_lbl_table_get(struct ice_hw *hw)
ice_parser_sect_item_get,
_parse_lbl_item, true);
}
+
+/**
+ * ice_bst_tcam_match - match a pattern on the boost tcam table
+ * @tcam_table: boost tcam table to search
+ * @pat: pattern to match
+ */
+struct ice_bst_tcam_item *
+ice_bst_tcam_match(struct ice_bst_tcam_item *tcam_table, u8 *pat)
+{
+ int i;
+
+ for (i = 0; i < ICE_BST_TCAM_TABLE_SIZE; i++) {
+ struct ice_bst_tcam_item *item = &tcam_table[i];
+
+ if (item->hit_idx_grp == 0)
+ continue;
+ if (ice_ternary_match(item->key, item->key_inv, pat, 20))
+ return item;
+ }
+
+ return NULL;
+}
diff --git a/drivers/net/ice/base/ice_bst_tcam.h b/drivers/net/ice/base/ice_bst_tcam.h
index a4ab40721f..3cba0bbf55 100644
--- a/drivers/net/ice/base/ice_bst_tcam.h
+++ b/drivers/net/ice/base/ice_bst_tcam.h
@@ -25,4 +25,7 @@ void ice_bst_tcam_dump(struct ice_hw *hw, struct ice_bst_tcam_item *item);
struct ice_bst_tcam_item *ice_bst_tcam_table_get(struct ice_hw *hw);
struct ice_lbl_item *ice_bst_lbl_table_get(struct ice_hw *hw);
+
+struct ice_bst_tcam_item *
+ice_bst_tcam_match(struct ice_bst_tcam_item *tcam_table, u8 *pat);
#endif /*_ICE_BST_TCAM_H_ */
diff --git a/drivers/net/ice/base/ice_parser.h b/drivers/net/ice/base/ice_parser.h
index 3a307e0344..b2ab21728e 100644
--- a/drivers/net/ice/base/ice_parser.h
+++ b/drivers/net/ice/base/ice_parser.h
@@ -15,6 +15,7 @@
#include "ice_flg_rd.h"
#include "ice_xlt_kb.h"
#include "ice_parser_rt.h"
+#include "ice_tmatch.h"
struct ice_parser {
struct ice_hw *hw; /* pointer to the hardware structure */
diff --git a/drivers/net/ice/base/ice_tmatch.h b/drivers/net/ice/base/ice_tmatch.h
new file mode 100644
index 0000000000..178a084639
--- /dev/null
+++ b/drivers/net/ice/base/ice_tmatch.h
@@ -0,0 +1,44 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2021 Intel Corporation
+ */
+
+#ifndef _ICE_TMATCH_H_
+#define _ICE_TMATCH_H_
+
+static inline
+bool ice_ternary_match_byte(u8 key, u8 key_inv, u8 pat)
+{
+ u8 k1, k2, v;
+ int i;
+
+ for (i = 0; i < 8; i++) {
+ k1 = (u8)(key & (1 << i));
+ k2 = (u8)(key_inv & (1 << i));
+ v = (u8)(pat & (1 << i));
+
+ if (k1 != 0 && k2 != 0)
+ continue;
+ if (k1 == 0 && k2 == 0)
+ return false;
+
+ if (k1 == v)
+ return false;
+ }
+
+ return true;
+}
+
+static inline
+bool ice_ternary_match(const u8 *key, const u8 *key_inv,
+ const u8 *pat, int len)
+{
+ int i;
+
+ for (i = 0; i < len; i++)
+ if (!ice_ternary_match_byte(key[i], key_inv[i], pat[i]))
+ return false;
+
+ return true;
+}
+
+#endif /* _ICE_TMATCH_H_ */
--
2.26.2
^ permalink raw reply [flat|nested] 21+ messages in thread
* [dpdk-dev] [PATCH 13/20] net/ice/base: add helper functions for parse graph key matching
2021-09-17 11:02 [dpdk-dev] [PATCH 00/20] ice/base: add parser module Qi Zhang
` (11 preceding siblings ...)
2021-09-17 11:02 ` [dpdk-dev] [PATCH 12/20] net/ice/base: add helper function for boost TCAM match Qi Zhang
@ 2021-09-17 11:02 ` Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 14/20] net/ice/base: add helper function for ptype markers match Qi Zhang
` (6 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Qi Zhang @ 2021-09-17 11:02 UTC (permalink / raw)
To: qiming.yang; +Cc: junfeng.guo, dev, Qi Zhang
Add below two internal helper functions for parse graph key matching
in cam table:
ice_pg_cam_match
ice_pg_nm_cam_match
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_pg_cam.c | 76 +++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_pg_cam.h | 6 +++
2 files changed, 82 insertions(+)
diff --git a/drivers/net/ice/base/ice_pg_cam.c b/drivers/net/ice/base/ice_pg_cam.c
index 03484d6a91..fe461ad849 100644
--- a/drivers/net/ice/base/ice_pg_cam.c
+++ b/drivers/net/ice/base/ice_pg_cam.c
@@ -296,3 +296,79 @@ struct ice_pg_nm_cam_item *ice_pg_nm_sp_cam_table_get(struct ice_hw *hw)
ice_parser_sect_item_get,
_pg_nm_sp_cam_parse_item, false);
}
+
+static bool _pg_cam_match(struct ice_pg_cam_item *item,
+ struct ice_pg_cam_key *key)
+{
+ if (!item->key.valid ||
+ item->key.node_id != key->node_id ||
+ item->key.flag0 != key->flag0 ||
+ item->key.flag1 != key->flag1 ||
+ item->key.flag2 != key->flag2 ||
+ item->key.flag3 != key->flag3 ||
+ item->key.boost_idx != key->boost_idx ||
+ item->key.alu_reg != key->alu_reg ||
+ item->key.next_proto != key->next_proto)
+ return false;
+
+ return true;
+}
+
+static bool _pg_nm_cam_match(struct ice_pg_nm_cam_item *item,
+ struct ice_pg_cam_key *key)
+{
+ if (!item->key.valid ||
+ item->key.node_id != key->node_id ||
+ item->key.flag0 != key->flag0 ||
+ item->key.flag1 != key->flag1 ||
+ item->key.flag2 != key->flag2 ||
+ item->key.flag3 != key->flag3 ||
+ item->key.boost_idx != key->boost_idx ||
+ item->key.alu_reg != key->alu_reg)
+ return false;
+
+ return true;
+}
+
+/**
+ * ice_pg_cam_match - search parse graph cam table by key
+ * @table: parse graph cam table to search
+ * @size: cam table size
+ * @key: search key
+ */
+struct ice_pg_cam_item *ice_pg_cam_match(struct ice_pg_cam_item *table,
+ int size, struct ice_pg_cam_key *key)
+{
+ int i;
+
+ for (i = 0; i < size; i++) {
+ struct ice_pg_cam_item *item = &table[i];
+
+ if (_pg_cam_match(item, key))
+ return item;
+ }
+
+ return NULL;
+}
+
+/**
+ * ice_pg_nm_cam_match - search parse graph no match cam table by key
+ * @table: parse graph no match cam table to search
+ * @size: cam table size
+ * @key: search key
+ */
+struct ice_pg_nm_cam_item *
+ice_pg_nm_cam_match(struct ice_pg_nm_cam_item *table, int size,
+ struct ice_pg_cam_key *key)
+{
+ int i;
+
+ for (i = 0; i < size; i++) {
+ struct ice_pg_nm_cam_item *item = &table[i];
+
+ if (_pg_nm_cam_match(item, key))
+ return item;
+ }
+
+ return NULL;
+}
diff --git a/drivers/net/ice/base/ice_pg_cam.h b/drivers/net/ice/base/ice_pg_cam.h
index fcb2e11e54..aeadc20a77 100644
--- a/drivers/net/ice/base/ice_pg_cam.h
+++ b/drivers/net/ice/base/ice_pg_cam.h
@@ -65,4 +65,10 @@ struct ice_pg_cam_item *ice_pg_sp_cam_table_get(struct ice_hw *hw);
struct ice_pg_nm_cam_item *ice_pg_nm_cam_table_get(struct ice_hw *hw);
struct ice_pg_nm_cam_item *ice_pg_nm_sp_cam_table_get(struct ice_hw *hw);
+
+struct ice_pg_cam_item *ice_pg_cam_match(struct ice_pg_cam_item *table,
+ int size, struct ice_pg_cam_key *key);
+struct ice_pg_nm_cam_item *
+ice_pg_nm_cam_match(struct ice_pg_nm_cam_item *table, int size,
+ struct ice_pg_cam_key *key);
#endif /* _ICE_PG_CAM_H_ */
--
2.26.2
^ permalink raw reply [flat|nested] 21+ messages in thread
* [dpdk-dev] [PATCH 14/20] net/ice/base: add helper function for ptype markers match
2021-09-17 11:02 [dpdk-dev] [PATCH 00/20] ice/base: add parser module Qi Zhang
` (12 preceding siblings ...)
2021-09-17 11:02 ` [dpdk-dev] [PATCH 13/20] net/ice/base: add helper functions for parse graph key matching Qi Zhang
@ 2021-09-17 11:02 ` Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 15/20] net/ice/base: add helper function to redirect flags Qi Zhang
` (5 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Qi Zhang @ 2021-09-17 11:02 UTC (permalink / raw)
To: qiming.yang; +Cc: junfeng.guo, dev, Qi Zhang
Add internal helper function ice_ptype_mk_tcam_match for ptype markers
matching in tcam table.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_ptype_mk.c | 22 ++++++++++++++++++++++
drivers/net/ice/base/ice_ptype_mk.h | 3 +++
2 files changed, 25 insertions(+)
diff --git a/drivers/net/ice/base/ice_ptype_mk.c b/drivers/net/ice/base/ice_ptype_mk.c
index 33623dcfbc..97c41cb586 100644
--- a/drivers/net/ice/base/ice_ptype_mk.c
+++ b/drivers/net/ice/base/ice_ptype_mk.c
@@ -52,3 +52,25 @@ struct ice_ptype_mk_tcam_item *ice_ptype_mk_tcam_table_get(struct ice_hw *hw)
ice_parser_sect_item_get,
_parse_ptype_mk_tcam_item, true);
}
+
+/**
+ * ice_ptype_mk_tcam_match - match a pattern on a ptype marker tcam table
+ * @table: ptype marker tcam table to search
+ * @pat: pattern to match
+ * @len: length of the pattern
+ */
+struct ice_ptype_mk_tcam_item *
+ice_ptype_mk_tcam_match(struct ice_ptype_mk_tcam_item *table,
+ u8 *pat, int len)
+{
+ int i;
+
+ for (i = 0; i < ICE_PTYPE_MK_TCAM_TABLE_SIZE; i++) {
+ struct ice_ptype_mk_tcam_item *item = &table[i];
+
+ if (ice_ternary_match(item->key, item->key_inv, pat, len))
+ return item;
+ }
+
+ return NULL;
+}
diff --git a/drivers/net/ice/base/ice_ptype_mk.h b/drivers/net/ice/base/ice_ptype_mk.h
index c93cd8f0ad..2cd49b1b63 100644
--- a/drivers/net/ice/base/ice_ptype_mk.h
+++ b/drivers/net/ice/base/ice_ptype_mk.h
@@ -15,4 +15,7 @@ struct ice_ptype_mk_tcam_item {
void ice_ptype_mk_tcam_dump(struct ice_hw *hw,
struct ice_ptype_mk_tcam_item *item);
struct ice_ptype_mk_tcam_item *ice_ptype_mk_tcam_table_get(struct ice_hw *hw);
+struct ice_ptype_mk_tcam_item *
+ice_ptype_mk_tcam_match(struct ice_ptype_mk_tcam_item *table,
+ u8 *pat, int len);
#endif /* _ICE_PTYPE_MK_H_ */
--
2.26.2
^ permalink raw reply [flat|nested] 21+ messages in thread
* [dpdk-dev] [PATCH 15/20] net/ice/base: add helper function to redirect flags
2021-09-17 11:02 [dpdk-dev] [PATCH 00/20] ice/base: add parser module Qi Zhang
` (13 preceding siblings ...)
2021-09-17 11:02 ` [dpdk-dev] [PATCH 14/20] net/ice/base: add helper function for ptype markers match Qi Zhang
@ 2021-09-17 11:02 ` Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 16/20] net/ice/base: add helper function to aggregate flags Qi Zhang
` (4 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Qi Zhang @ 2021-09-17 11:02 UTC (permalink / raw)
To: qiming.yang; +Cc: junfeng.guo, dev, Qi Zhang
Add internal helper function ice_flg_redirect to redirect parser flags
to packet flags.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flg_rd.c | 23 +++++++++++++++++++++++
drivers/net/ice/base/ice_flg_rd.h | 1 +
2 files changed, 24 insertions(+)
diff --git a/drivers/net/ice/base/ice_flg_rd.c b/drivers/net/ice/base/ice_flg_rd.c
index 292916d9a8..833986cac3 100644
--- a/drivers/net/ice/base/ice_flg_rd.c
+++ b/drivers/net/ice/base/ice_flg_rd.c
@@ -51,3 +51,26 @@ struct ice_flg_rd_item *ice_flg_rd_table_get(struct ice_hw *hw)
ice_parser_sect_item_get,
_flg_rd_parse_item, false);
}
+
+/**
+ * ice_flg_redirect - redirect a parser flag to packet flag
+ * @table: flag redirect table
+ * @psr_flg: parser flag to redirect
+ */
+u64 ice_flg_redirect(struct ice_flg_rd_item *table, u64 psr_flg)
+{
+ u64 flg = 0;
+ int i;
+
+ for (i = 0; i < 64; i++) {
+ struct ice_flg_rd_item *item = &table[i];
+
+ if (!item->expose)
+ continue;
+
+ if (psr_flg & (1ul << item->intr_flg_id))
+ flg |= (1ul << i);
+ }
+
+ return flg;
+}
diff --git a/drivers/net/ice/base/ice_flg_rd.h b/drivers/net/ice/base/ice_flg_rd.h
index e65350f18c..6c3e01b0fa 100644
--- a/drivers/net/ice/base/ice_flg_rd.h
+++ b/drivers/net/ice/base/ice_flg_rd.h
@@ -13,4 +13,5 @@ struct ice_flg_rd_item {
void ice_flg_rd_dump(struct ice_hw *hw, struct ice_flg_rd_item *item);
struct ice_flg_rd_item *ice_flg_rd_table_get(struct ice_hw *hw);
+u64 ice_flg_redirect(struct ice_flg_rd_item *table, u64 psr_flg);
#endif /* _ICE_FLG_RD_H_ */
--
2.26.2
^ permalink raw reply [flat|nested] 21+ messages in thread
* [dpdk-dev] [PATCH 16/20] net/ice/base: add helper function to aggregate flags
2021-09-17 11:02 [dpdk-dev] [PATCH 00/20] ice/base: add parser module Qi Zhang
` (14 preceding siblings ...)
2021-09-17 11:02 ` [dpdk-dev] [PATCH 15/20] net/ice/base: add helper function to redirect flags Qi Zhang
@ 2021-09-17 11:02 ` Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 17/20] net/ice/base: add parser execution main loop Qi Zhang
` (3 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Qi Zhang @ 2021-09-17 11:02 UTC (permalink / raw)
To: qiming.yang; +Cc: junfeng.guo, dev, Qi Zhang
Add internal helper function ice_xlt_kb_flg_get to aggregate 64 bit
packet flag into 16 bit key builder flags.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_xlt_kb.c | 27 +++++++++++++++++++++++++++
drivers/net/ice/base/ice_xlt_kb.h | 1 +
2 files changed, 28 insertions(+)
diff --git a/drivers/net/ice/base/ice_xlt_kb.c b/drivers/net/ice/base/ice_xlt_kb.c
index 8b4043a836..4c1ab747cf 100644
--- a/drivers/net/ice/base/ice_xlt_kb.c
+++ b/drivers/net/ice/base/ice_xlt_kb.c
@@ -187,3 +187,30 @@ struct ice_xlt_kb *ice_xlt_kb_get_rss(struct ice_hw *hw)
{
return _xlt_kb_get(hw, ICE_SID_XLT_KEY_BUILDER_RSS);
}
+
+/**
+ * ice_xlt_kb_flag_get - aggregate 64 bits packet flag into 16 bits xlt flag
+ * @kb: xlt key build
+ * @pkt_flag: 64 bits packet flag
+ */
+u16 ice_xlt_kb_flag_get(struct ice_xlt_kb *kb, u64 pkt_flag)
+{
+ struct ice_xlt_kb_entry *entry = &kb->entries[0];
+ u16 flg = 0;
+ int i;
+
+ /* check flag 15 */
+ if (kb->flag15 & pkt_flag)
+ flg = (u16)(1u << 15);
+
+ /* check flag 0 - 14 */
+ for (i = 0; i < 15; i++) {
+ /* only check first entry */
+ u16 idx = (u16)(entry->flg0_14_sel[i] & 0x3f);
+
+ if (pkt_flag & (1ul << idx))
+ flg |= (u16)(1u << i);
+ }
+
+ return flg;
+}
diff --git a/drivers/net/ice/base/ice_xlt_kb.h b/drivers/net/ice/base/ice_xlt_kb.h
index a95d845f89..ec802b663a 100644
--- a/drivers/net/ice/base/ice_xlt_kb.h
+++ b/drivers/net/ice/base/ice_xlt_kb.h
@@ -30,4 +30,5 @@ struct ice_xlt_kb *ice_xlt_kb_get_sw(struct ice_hw *hw);
struct ice_xlt_kb *ice_xlt_kb_get_acl(struct ice_hw *hw);
struct ice_xlt_kb *ice_xlt_kb_get_fd(struct ice_hw *hw);
struct ice_xlt_kb *ice_xlt_kb_get_rss(struct ice_hw *hw);
+u16 ice_xlt_kb_flag_get(struct ice_xlt_kb *kb, u64 pkt_flag);
#endif /* _ICE_XLT_KB_H */
--
2.26.2
^ permalink raw reply [flat|nested] 21+ messages in thread
* [dpdk-dev] [PATCH 17/20] net/ice/base: add parser execution main loop
2021-09-17 11:02 [dpdk-dev] [PATCH 00/20] ice/base: add parser module Qi Zhang
` (15 preceding siblings ...)
2021-09-17 11:02 ` [dpdk-dev] [PATCH 16/20] net/ice/base: add helper function to aggregate flags Qi Zhang
@ 2021-09-17 11:02 ` Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 18/20] net/ice/base: support double VLAN mode configure for parser Qi Zhang
` (2 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Qi Zhang @ 2021-09-17 11:02 UTC (permalink / raw)
To: qiming.yang; +Cc: junfeng.guo, dev, Qi Zhang
Implement function ice_parser_rt_execute which perform the main
loop of the parser.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_parser_rt.c | 777 ++++++++++++++++++++++++++-
drivers/net/ice/base/ice_parser_rt.h | 20 +
2 files changed, 793 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ice/base/ice_parser_rt.c b/drivers/net/ice/base/ice_parser_rt.c
index d62d0170e5..682e34e885 100644
--- a/drivers/net/ice/base/ice_parser_rt.c
+++ b/drivers/net/ice/base/ice_parser_rt.c
@@ -34,12 +34,40 @@ static void _rt_nn_set(struct ice_parser_rt *rt, u16 node)
rt->gpr[GPR_NN_IDX] = node;
}
-static void _rt_flag_set(struct ice_parser_rt *rt, int idx)
+static void _rt_flag_set(struct ice_parser_rt *rt, int idx, bool val)
{
int y = idx / 16;
int x = idx % 16;
- rt->gpr[GPR_FLG_IDX + y] |= (u16)(1 << x);
+ if (val)
+ rt->gpr[GPR_FLG_IDX + y] |= (u16)(1 << x);
+ else
+ rt->gpr[GPR_FLG_IDX + y] &= ~(u16)(1 << x);
+
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Set parser flag %d value %d\n",
+ idx, val);
+}
+
+static void _rt_gpr_set(struct ice_parser_rt *rt, int idx, u16 val)
+{
+ if (idx == GPR_HO_IDX)
+ _rt_ho_set(rt, val);
+ else
+ rt->gpr[idx] = val;
+
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Set GPR %d value %d\n",
+ idx, val);
+}
+
+static void _rt_err_set(struct ice_parser_rt *rt, int idx, bool val)
+{
+ if (val)
+ rt->gpr[GPR_ERR_IDX] |= (u16)(1 << idx);
+ else
+ rt->gpr[GPR_ERR_IDX] &= ~(u16)(1 << idx);
+
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Set parser error %d value %d\n",
+ idx, val);
}
/**
@@ -61,7 +89,7 @@ void ice_parser_rt_reset(struct ice_parser_rt *rt)
for (i = 0; i < 64; i++) {
if ((mi->flags & (1ul << i)) != 0ul)
- _rt_flag_set(rt, i);
+ _rt_flag_set(rt, i, true);
}
rt->psr = psr;
@@ -86,6 +114,650 @@ void ice_parser_rt_pktbuf_set(struct ice_parser_rt *rt, const u8 *pkt_buf,
ICE_NONDMA_TO_NONDMA);
}
+static void _bst_key_init(struct ice_parser_rt *rt, struct ice_imem_item *imem)
+{
+ u8 tsr = (u8)rt->gpr[GPR_TSR_IDX];
+ u16 ho = rt->gpr[GPR_HO_IDX];
+ u8 *key = rt->bst_key;
+ int i, j;
+
+ if (imem->b_kb.tsr_ctrl)
+ key[19] = (u8)tsr;
+ else
+ key[19] = imem->b_kb.priority;
+
+ for (i = 18; i >= 0; i--) {
+ j = ho + 18 - i;
+ if (j < ICE_PARSER_MAX_PKT_LEN)
+ key[i] = rt->pkt_buf[ho + 18 - i];
+ else
+ key[i] = 0;
+ }
+
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Generated Boost TCAM Key:\n");
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "%02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n",
+ key[0], key[1], key[2], key[3], key[4],
+ key[5], key[6], key[7], key[8], key[9],
+ key[10], key[11], key[12], key[13], key[14],
+ key[15], key[16], key[17], key[18], key[19]);
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "\n");
+}
+
+static u8 _bit_rev_u8(u8 v)
+{
+ u8 r = 0;
+ int i;
+
+ for (i = 0; i < 8; i++) {
+ r |= (u8)((v & 0x1) << (7 - i));
+ v >>= 1;
+ }
+
+ return r;
+}
+
+static u8 _bit_rev_u16(u16 v, int len)
+{
+ u16 r = 0;
+ int i;
+
+ for (i = 0; i < len; i++) {
+ r |= (u16)((v & 0x1) << (len - 1 - i));
+ v >>= 1;
+ }
+
+ return r;
+}
+
+static u32 _bit_rev_u32(u32 v, int len)
+{
+ u32 r = 0;
+ int i;
+
+ for (i = 0; i < len; i++) {
+ r |= (u32)((v & 0x1) << (len - 1 - i));
+ v >>= 1;
+ }
+
+ return r;
+}
+
+static u32 _hv_bit_sel(struct ice_parser_rt *rt, int start, int len)
+{
+ u64 d64, msk;
+ u8 b[8];
+ int i;
+
+ int offset = GPR_HB_IDX + start / 16;
+
+ ice_memcpy(b, &rt->gpr[offset], 8, ICE_NONDMA_TO_NONDMA);
+
+ for (i = 0; i < 8; i++)
+ b[i] = _bit_rev_u8(b[i]);
+
+ d64 = *(u64 *)b;
+ msk = (1ul << len) - 1;
+
+ return _bit_rev_u32((u32)((d64 >> (start % 16)) & msk), len);
+}
+
+static u32 _pk_build(struct ice_parser_rt *rt, struct ice_np_keybuilder *kb)
+{
+ if (kb->ops == 0)
+ return _hv_bit_sel(rt, kb->start_or_reg0, kb->len_or_reg1);
+ else if (kb->ops == 1)
+ return rt->gpr[kb->start_or_reg0] |
+ ((u32)rt->gpr[kb->len_or_reg1] << 16);
+ else if (kb->ops == 2)
+ return 0;
+
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Unsupported ops %d\n", kb->ops);
+ return 0xffffffff;
+}
+
+static bool _flag_get(struct ice_parser_rt *rt, int index)
+{
+ int y = index / 16;
+ int x = index % 16;
+
+ return (rt->gpr[GPR_FLG_IDX + y] & (u16)(1 << x)) != 0;
+}
+
+static void _imem_pgk_init(struct ice_parser_rt *rt, struct ice_imem_item *imem)
+{
+ ice_memset(&rt->pg_key, 0, sizeof(rt->pg_key), ICE_NONDMA_MEM);
+ rt->pg_key.next_proto = _pk_build(rt, &imem->np_kb);
+
+ if (imem->pg_kb.flag0_ena)
+ rt->pg_key.flag0 = _flag_get(rt, imem->pg_kb.flag0_idx);
+ if (imem->pg_kb.flag1_ena)
+ rt->pg_key.flag1 = _flag_get(rt, imem->pg_kb.flag1_idx);
+ if (imem->pg_kb.flag2_ena)
+ rt->pg_key.flag2 = _flag_get(rt, imem->pg_kb.flag2_idx);
+ if (imem->pg_kb.flag3_ena)
+ rt->pg_key.flag3 = _flag_get(rt, imem->pg_kb.flag3_idx);
+
+ rt->pg_key.alu_reg = rt->gpr[imem->pg_kb.alu_reg_idx];
+ rt->pg_key.node_id = rt->gpr[GPR_NN_IDX];
+
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Generate Parse Graph Key: node_id(%d),flag0(%d), flag1(%d), flag2(%d), flag3(%d), boost_idx(%d), alu_reg(0x%04x), next_proto(0x%08x)\n",
+ rt->pg_key.node_id,
+ rt->pg_key.flag0,
+ rt->pg_key.flag1,
+ rt->pg_key.flag2,
+ rt->pg_key.flag3,
+ rt->pg_key.boost_idx,
+ rt->pg_key.alu_reg,
+ rt->pg_key.next_proto);
+}
+
+static void _imem_alu0_set(struct ice_parser_rt *rt, struct ice_imem_item *imem)
+{
+ rt->alu0 = &imem->alu0;
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Load ALU0 from imem pc %d\n",
+ imem->idx);
+}
+
+static void _imem_alu1_set(struct ice_parser_rt *rt, struct ice_imem_item *imem)
+{
+ rt->alu1 = &imem->alu1;
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Load ALU1 from imem pc %d\n",
+ imem->idx);
+}
+
+static void _imem_alu2_set(struct ice_parser_rt *rt, struct ice_imem_item *imem)
+{
+ rt->alu2 = &imem->alu2;
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Load ALU2 from imem pc %d\n",
+ imem->idx);
+}
+
+static void _imem_pgp_set(struct ice_parser_rt *rt, struct ice_imem_item *imem)
+{
+ rt->pg = imem->pg;
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Load PG priority %d from imem pc %d\n",
+ rt->pg, imem->idx);
+}
+
+static void
+_bst_pgk_init(struct ice_parser_rt *rt, struct ice_bst_tcam_item *bst)
+{
+ ice_memset(&rt->pg_key, 0, sizeof(rt->pg_key), ICE_NONDMA_MEM);
+ rt->pg_key.boost_idx = bst->hit_idx_grp;
+ rt->pg_key.next_proto = _pk_build(rt, &bst->np_kb);
+
+ if (bst->pg_kb.flag0_ena)
+ rt->pg_key.flag0 = _flag_get(rt, bst->pg_kb.flag0_idx);
+ if (bst->pg_kb.flag1_ena)
+ rt->pg_key.flag1 = _flag_get(rt, bst->pg_kb.flag1_idx);
+ if (bst->pg_kb.flag2_ena)
+ rt->pg_key.flag2 = _flag_get(rt, bst->pg_kb.flag2_idx);
+ if (bst->pg_kb.flag3_ena)
+ rt->pg_key.flag3 = _flag_get(rt, bst->pg_kb.flag3_idx);
+
+ rt->pg_key.alu_reg = rt->gpr[bst->pg_kb.alu_reg_idx];
+ rt->pg_key.node_id = rt->gpr[GPR_NN_IDX];
+
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Generate Parse Graph Key: node_id(%d),flag0(%d), flag1(%d), flag2(%d), flag3(%d), boost_idx(%d), alu_reg(0x%04x), next_proto(0x%08x)\n",
+ rt->pg_key.node_id,
+ rt->pg_key.flag0,
+ rt->pg_key.flag1,
+ rt->pg_key.flag2,
+ rt->pg_key.flag3,
+ rt->pg_key.boost_idx,
+ rt->pg_key.alu_reg,
+ rt->pg_key.next_proto);
+}
+
+static void _bst_alu0_set(struct ice_parser_rt *rt,
+ struct ice_bst_tcam_item *bst)
+{
+ rt->alu0 = &bst->alu0;
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Load ALU0 from boost address %d\n",
+ bst->address);
+}
+
+static void _bst_alu1_set(struct ice_parser_rt *rt,
+ struct ice_bst_tcam_item *bst)
+{
+ rt->alu1 = &bst->alu1;
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Load ALU1 from boost address %d\n",
+ bst->address);
+}
+
+static void _bst_alu2_set(struct ice_parser_rt *rt,
+ struct ice_bst_tcam_item *bst)
+{
+ rt->alu2 = &bst->alu2;
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Load ALU2 from boost address %d\n",
+ bst->address);
+}
+
+static void _bst_pgp_set(struct ice_parser_rt *rt,
+ struct ice_bst_tcam_item *bst)
+{
+ rt->pg = bst->pg_pri;
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Load PG priority %d from boost address %d\n",
+ rt->pg, bst->address);
+}
+
+static struct ice_pg_cam_item *_pg_cam_match(struct ice_parser_rt *rt)
+{
+ struct ice_parser *psr = rt->psr;
+ struct ice_pg_cam_item *item;
+
+ item = ice_pg_cam_match(psr->pg_cam_table, ICE_PG_CAM_TABLE_SIZE,
+ &rt->pg_key);
+ if (item)
+ return item;
+
+ item = ice_pg_cam_match(psr->pg_sp_cam_table, ICE_PG_SP_CAM_TABLE_SIZE,
+ &rt->pg_key);
+ return item;
+}
+
+static struct ice_pg_nm_cam_item *_pg_nm_cam_match(struct ice_parser_rt *rt)
+{
+ struct ice_parser *psr = rt->psr;
+ struct ice_pg_nm_cam_item *item;
+
+ item = ice_pg_nm_cam_match(psr->pg_nm_cam_table,
+ ICE_PG_NM_CAM_TABLE_SIZE, &rt->pg_key);
+
+ if (item)
+ return item;
+
+ item = ice_pg_nm_cam_match(psr->pg_nm_sp_cam_table,
+ ICE_PG_NM_SP_CAM_TABLE_SIZE,
+ &rt->pg_key);
+ return item;
+}
+
+static void _gpr_add(struct ice_parser_rt *rt, int idx, u16 val)
+{
+ rt->pu.gpr_val_upd[idx] = true;
+ rt->pu.gpr_val[idx] = val;
+
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Pending update for register %d value %d\n",
+ idx, val);
+}
+
+static void _pg_exe(struct ice_parser_rt *rt)
+{
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Executing ParseGraph action ...\n");
+
+ _gpr_add(rt, GPR_NP_IDX, rt->action->next_pc);
+ _gpr_add(rt, GPR_NN_IDX, rt->action->next_node);
+
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Executing ParseGraph action done.\n");
+}
+
+static void _flg_add(struct ice_parser_rt *rt, int idx, bool val)
+{
+ rt->pu.flg_msk |= (1ul << idx);
+ if (val)
+ rt->pu.flg_val |= (1ul << idx);
+ else
+ rt->pu.flg_val &= ~(1ul << idx);
+
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Pending update for flag %d value %d\n",
+ idx, val);
+}
+
+static void _flg_update(struct ice_parser_rt *rt, struct ice_alu *alu)
+{
+ int i;
+
+ if (alu->dedicate_flags_ena) {
+ if (alu->flags_extr_imm) {
+ for (i = 0; i < alu->dst_len; i++)
+ _flg_add(rt, alu->dst_start + i,
+ (alu->flags_start_imm &
+ (1u << i)) != 0);
+ } else {
+ for (i = 0; i < alu->dst_len; i++) {
+ _flg_add(rt, alu->dst_start + i,
+ _hv_bit_sel(rt,
+ alu->flags_start_imm + i,
+ 1) != 0);
+ }
+ }
+ }
+}
+
+static void _po_update(struct ice_parser_rt *rt, struct ice_alu *alu)
+{
+ if (alu->proto_offset_opc == 1)
+ rt->po = (u16)(rt->gpr[GPR_HO_IDX] + alu->proto_offset);
+ else if (alu->proto_offset_opc == 2)
+ rt->po = (u16)(rt->gpr[GPR_HO_IDX] - alu->proto_offset);
+ else if (alu->proto_offset_opc == 0)
+ rt->po = rt->gpr[GPR_HO_IDX];
+
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Update Protocol Offset = %d\n",
+ rt->po);
+}
+
+static u16 _reg_bit_sel(struct ice_parser_rt *rt, int reg_idx,
+ int start, int len)
+{
+ u32 d32, msk;
+ u8 b[4];
+ u8 v[4];
+
+ ice_memcpy(b, &rt->gpr[reg_idx + start / 16], 4, ICE_NONDMA_TO_NONDMA);
+
+ v[0] = _bit_rev_u8(b[0]);
+ v[1] = _bit_rev_u8(b[1]);
+ v[2] = _bit_rev_u8(b[2]);
+ v[3] = _bit_rev_u8(b[3]);
+
+ d32 = *(u32 *)v;
+ msk = (1u << len) - 1;
+
+ return _bit_rev_u16((u16)((d32 >> (start % 16)) & msk), len);
+}
+
+static void _err_add(struct ice_parser_rt *rt, int idx, bool val)
+{
+ rt->pu.err_msk |= (u16)(1 << idx);
+ if (val)
+ rt->pu.flg_val |= (u16)(1 << idx);
+ else
+ rt->pu.flg_val &= ~(u16)(1 << idx);
+
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Pending update for error %d value %d\n",
+ idx, val);
+}
+
+static void _dst_reg_bit_set(struct ice_parser_rt *rt, struct ice_alu *alu,
+ bool val)
+{
+ u16 flg_idx;
+
+ if (alu->dedicate_flags_ena) {
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "DedicatedFlagsEnable should not be enabled in opcode %d\n",
+ alu->opc);
+ return;
+ }
+
+ if (alu->dst_reg_id == GPR_ERR_IDX) {
+ if (alu->dst_start >= 16) {
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Invalid error %d\n",
+ alu->dst_start);
+ return;
+ }
+ _err_add(rt, alu->dst_start, val);
+ } else if (alu->dst_reg_id >= GPR_FLG_IDX) {
+ flg_idx = (u16)(((alu->dst_reg_id - GPR_FLG_IDX) << 4) +
+ alu->dst_start);
+
+ if (flg_idx >= 64) {
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Invalid flag %d\n",
+ flg_idx);
+ return;
+ }
+ _flg_add(rt, flg_idx, val);
+ } else {
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Unexpected Dest Register Bit set, RegisterID %d Start %d\n",
+ alu->dst_reg_id, alu->dst_start);
+ }
+}
+
+static void _alu_exe(struct ice_parser_rt *rt, struct ice_alu *alu)
+{
+ u16 dst, src, shift, imm;
+
+ if (alu->shift_xlate_select) {
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "shift_xlate_select != 0 is not expected\n");
+ return;
+ }
+
+ _po_update(rt, alu);
+ _flg_update(rt, alu);
+
+ dst = rt->gpr[alu->dst_reg_id];
+ src = _reg_bit_sel(rt, alu->src_reg_id, alu->src_start, alu->src_len);
+ shift = alu->shift_xlate_key;
+ imm = alu->imm;
+
+ switch (alu->opc) {
+ case ICE_ALU_PARK:
+ break;
+ case ICE_ALU_MOV_ADD:
+ dst = (u16)((src << shift) + imm);
+ _gpr_add(rt, alu->dst_reg_id, dst);
+ break;
+ case ICE_ALU_ADD:
+ dst += (u16)((src << shift) + imm);
+ _gpr_add(rt, alu->dst_reg_id, dst);
+ break;
+ case ICE_ALU_ORLT:
+ if (src < imm)
+ _dst_reg_bit_set(rt, alu, true);
+ _gpr_add(rt, GPR_NP_IDX, alu->branch_addr);
+ break;
+ case ICE_ALU_OREQ:
+ if (src == imm)
+ _dst_reg_bit_set(rt, alu, true);
+ _gpr_add(rt, GPR_NP_IDX, alu->branch_addr);
+ break;
+ case ICE_ALU_SETEQ:
+ if (src == imm)
+ _dst_reg_bit_set(rt, alu, true);
+ else
+ _dst_reg_bit_set(rt, alu, false);
+ _gpr_add(rt, GPR_NP_IDX, alu->branch_addr);
+ break;
+ case ICE_ALU_MOV_XOR:
+ dst = (u16)((u16)(src << shift) ^ (u16)imm);
+ _gpr_add(rt, alu->dst_reg_id, dst);
+ break;
+ default:
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Unsupported ALU instruction %d\n",
+ alu->opc);
+ break;
+ }
+}
+
+static void _alu0_exe(struct ice_parser_rt *rt)
+{
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Executing ALU0 ...\n");
+ _alu_exe(rt, rt->alu0);
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Executing ALU0 done.\n");
+}
+
+static void _alu1_exe(struct ice_parser_rt *rt)
+{
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Executing ALU1 ...\n");
+ _alu_exe(rt, rt->alu1);
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Executing ALU1 done.\n");
+}
+
+static void _alu2_exe(struct ice_parser_rt *rt)
+{
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Executing ALU2 ...\n");
+ _alu_exe(rt, rt->alu2);
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Executing ALU2 done.\n");
+}
+
+static void _pu_exe(struct ice_parser_rt *rt)
+{
+ struct ice_gpr_pu *pu = &rt->pu;
+ int i;
+
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Updating Registers ...\n");
+
+ for (i = 0; i < 128; i++) {
+ if (pu->gpr_val_upd[i])
+ _rt_gpr_set(rt, i, pu->gpr_val[i]);
+ }
+
+ for (i = 0; i < 64; i++) {
+ if (pu->flg_msk & (1ul << i))
+ _rt_flag_set(rt, i, pu->flg_val & (1ul << i));
+ }
+
+ for (i = 0; i < 16; i++) {
+ if (pu->err_msk & (1u << 1))
+ _rt_err_set(rt, i, pu->err_val & (1u << i));
+ }
+
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Updating Registers done.\n");
+}
+
+static void _alu_pg_exe(struct ice_parser_rt *rt)
+{
+ ice_memset(&rt->pu, 0, sizeof(rt->pu), ICE_NONDMA_MEM);
+
+ if (rt->pg == 0) {
+ _pg_exe(rt);
+ _alu0_exe(rt);
+ _alu1_exe(rt);
+ _alu2_exe(rt);
+ } else if (rt->pg == 1) {
+ _alu0_exe(rt);
+ _pg_exe(rt);
+ _alu1_exe(rt);
+ _alu2_exe(rt);
+ } else if (rt->pg == 2) {
+ _alu0_exe(rt);
+ _alu1_exe(rt);
+ _pg_exe(rt);
+ _alu2_exe(rt);
+ } else if (rt->pg == 3) {
+ _alu0_exe(rt);
+ _alu1_exe(rt);
+ _alu2_exe(rt);
+ _pg_exe(rt);
+ }
+
+ _pu_exe(rt);
+
+ if (rt->action->ho_inc == 0)
+ return;
+
+ if (rt->action->ho_polarity)
+ _rt_ho_set(rt, rt->gpr[GPR_HO_IDX] + rt->action->ho_inc);
+ else
+ _rt_ho_set(rt, rt->gpr[GPR_HO_IDX] - rt->action->ho_inc);
+}
+
+static void _proto_off_update(struct ice_parser_rt *rt)
+{
+ struct ice_parser *psr = rt->psr;
+ int i;
+
+ if (rt->action->is_pg) {
+ struct ice_proto_grp_item *proto_grp =
+ &psr->proto_grp_table[rt->action->proto_id];
+ u16 po;
+
+ for (i = 0; i < 8; i++) {
+ struct ice_proto_off *entry = &proto_grp->po[i];
+
+ if (entry->proto_id == 0xff)
+ break;
+
+ if (!entry->polarity)
+ po = (u16)(rt->po + entry->offset);
+ else
+ po = (u16)(rt->po - entry->offset);
+
+ rt->protocols[entry->proto_id] = true;
+ rt->offsets[entry->proto_id] = po;
+
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Set Protocol %d at offset %d\n",
+ entry->proto_id, po);
+ }
+ } else {
+ rt->protocols[rt->action->proto_id] = true;
+ rt->offsets[rt->action->proto_id] = rt->po;
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Set Protocol %d at offset %d\n",
+ rt->action->proto_id, rt->po);
+ }
+}
+
+static void _marker_set(struct ice_parser_rt *rt, int idx)
+{
+ int x = idx / 8;
+ int y = idx % 8;
+
+ rt->markers[x] |= (u8)(1u << y);
+}
+
+static void _marker_update(struct ice_parser_rt *rt)
+{
+ struct ice_parser *psr = rt->psr;
+ int i;
+
+ if (rt->action->is_mg) {
+ struct ice_mk_grp_item *mk_grp =
+ &psr->mk_grp_table[rt->action->marker_id];
+
+ for (i = 0; i < 8; i++) {
+ u8 marker = mk_grp->markers[i];
+
+ if (marker == 71)
+ break;
+
+ _marker_set(rt, marker);
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Set Marker %d\n",
+ marker);
+ }
+ } else {
+ if (rt->action->marker_id != 71)
+ _marker_set(rt, rt->action->marker_id);
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Set Marker %d\n",
+ rt->action->marker_id);
+ }
+}
+
+static u16 _ptype_resolve(struct ice_parser_rt *rt)
+{
+ struct ice_parser *psr = rt->psr;
+ struct ice_ptype_mk_tcam_item *item;
+
+ item = ice_ptype_mk_tcam_match(psr->ptype_mk_tcam_table,
+ rt->markers, 9);
+ if (item)
+ return item->ptype;
+ return 0xffff;
+}
+
+static void _proto_off_resolve(struct ice_parser_rt *rt,
+ struct ice_parser_result *rslt)
+{
+ int i;
+
+ for (i = 0; i < 255; i++) {
+ if (rt->protocols[i]) {
+ rslt->po[rslt->po_num].proto_id = (u8)i;
+ rslt->po[rslt->po_num].offset = rt->offsets[i];
+ rslt->po_num++;
+ }
+ }
+}
+
+static void _result_resolve(struct ice_parser_rt *rt,
+ struct ice_parser_result *rslt)
+{
+ struct ice_parser *psr = rt->psr;
+
+ ice_memset(rslt, 0, sizeof(*rslt), ICE_NONDMA_MEM);
+
+ rslt->ptype = _ptype_resolve(rt);
+
+ ice_memcpy(&rslt->flags_psr, &rt->gpr[GPR_FLG_IDX], 8,
+ ICE_NONDMA_TO_NONDMA);
+ rslt->flags_pkt = ice_flg_redirect(psr->flg_rd_table, rslt->flags_psr);
+ rslt->flags_sw = ice_xlt_kb_flag_get(psr->xlt_kb_sw, rslt->flags_pkt);
+ rslt->flags_fd = ice_xlt_kb_flag_get(psr->xlt_kb_fd, rslt->flags_pkt);
+ rslt->flags_rss = ice_xlt_kb_flag_get(psr->xlt_kb_rss, rslt->flags_pkt);
+
+ _proto_off_resolve(rt, rslt);
+}
+
/**
* ice_parser_rt_execute - parser execution routine
* @rt: pointer to the parser runtime
@@ -94,5 +766,102 @@ void ice_parser_rt_pktbuf_set(struct ice_parser_rt *rt, const u8 *pkt_buf,
enum ice_status ice_parser_rt_execute(struct ice_parser_rt *rt,
struct ice_parser_result *rslt)
{
- return ICE_ERR_NOT_IMPL;
+ enum ice_status status = ICE_SUCCESS;
+ struct ice_pg_nm_cam_item *pg_nm_cam;
+ struct ice_parser *psr = rt->psr;
+ struct ice_pg_cam_item *pg_cam;
+ struct ice_bst_tcam_item *bst;
+ struct ice_imem_item *imem;
+ u16 node;
+ u16 pc;
+
+ node = rt->gpr[GPR_NN_IDX];
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Start with Node: %d\n", node);
+
+ while (true) {
+ pc = rt->gpr[GPR_NP_IDX];
+ imem = &psr->imem_table[pc];
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Load imem at pc: %d\n",
+ pc);
+
+ _bst_key_init(rt, imem);
+ bst = ice_bst_tcam_match(psr->bst_tcam_table, rt->bst_key);
+
+ if (!bst) {
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "No Boost TCAM Match\n");
+ _imem_pgk_init(rt, imem);
+ _imem_alu0_set(rt, imem);
+ _imem_alu1_set(rt, imem);
+ _imem_alu2_set(rt, imem);
+ _imem_pgp_set(rt, imem);
+ } else {
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Boost TCAM Match address: %d\n",
+ bst->address);
+ if (imem->b_m.pg) {
+ _bst_pgk_init(rt, bst);
+ _bst_pgp_set(rt, bst);
+ } else {
+ _imem_pgk_init(rt, imem);
+ _imem_pgp_set(rt, imem);
+ }
+
+ if (imem->b_m.al0)
+ _bst_alu0_set(rt, bst);
+ else
+ _imem_alu0_set(rt, imem);
+
+ if (imem->b_m.al1)
+ _bst_alu1_set(rt, bst);
+ else
+ _imem_alu1_set(rt, imem);
+
+ if (imem->b_m.al2)
+ _bst_alu2_set(rt, bst);
+ else
+ _imem_alu2_set(rt, imem);
+ }
+
+ rt->action = NULL;
+ pg_cam = _pg_cam_match(rt);
+ if (!pg_cam) {
+ pg_nm_cam = _pg_nm_cam_match(rt);
+ if (pg_nm_cam) {
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Match ParseGraph Nomatch CAM Address %d\n",
+ pg_nm_cam->idx);
+ rt->action = &pg_nm_cam->action;
+ }
+ } else {
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Match ParseGraph CAM Address %d\n",
+ pg_cam->idx);
+ rt->action = &pg_cam->action;
+ }
+
+ if (!rt->action) {
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Failed to match ParseGraph CAM, stop parsing.\n");
+ status = ICE_ERR_PARAM;
+ break;
+ }
+
+ _alu_pg_exe(rt);
+ _marker_update(rt);
+ _proto_off_update(rt);
+
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Go to node %d\n",
+ rt->action->next_node);
+
+ if (rt->action->is_last_round) {
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Last Round in ParseGraph Action, stop parsing.\n");
+ break;
+ }
+
+ if (rt->gpr[GPR_HO_IDX] >= rt->pkt_len) {
+ ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Header Offset %d is larger than packet len %d, stop parsing\n",
+ rt->gpr[GPR_HO_IDX], rt->pkt_len);
+ break;
+ }
+ }
+
+ _result_resolve(rt, rslt);
+
+ return status;
}
diff --git a/drivers/net/ice/base/ice_parser_rt.h b/drivers/net/ice/base/ice_parser_rt.h
index 32fa7f6579..2a11087e3a 100644
--- a/drivers/net/ice/base/ice_parser_rt.h
+++ b/drivers/net/ice/base/ice_parser_rt.h
@@ -10,12 +10,32 @@ struct ice_parser_ctx;
#define ICE_PARSER_MAX_PKT_LEN 504
#define ICE_PARSER_GPR_NUM 128
+struct ice_gpr_pu {
+ bool gpr_val_upd[128]; /* flag to indicate if GRP needs to be updated */
+ u16 gpr_val[128];
+ u64 flg_msk;
+ u64 flg_val;
+ u16 err_msk;
+ u16 err_val;
+};
+
struct ice_parser_rt {
struct ice_parser *psr;
u16 gpr[ICE_PARSER_GPR_NUM];
u8 pkt_buf[ICE_PARSER_MAX_PKT_LEN + 32];
u16 pkt_len;
u16 po;
+ u8 bst_key[20];
+ struct ice_pg_cam_key pg_key;
+ struct ice_alu *alu0;
+ struct ice_alu *alu1;
+ struct ice_alu *alu2;
+ struct ice_pg_cam_action *action;
+ u8 pg;
+ struct ice_gpr_pu pu;
+ u8 markers[9]; /* 8 * 9 = 72 bits*/
+ bool protocols[256];
+ u16 offsets[256];
};
void ice_parser_rt_reset(struct ice_parser_rt *rt);
--
2.26.2
^ permalink raw reply [flat|nested] 21+ messages in thread
* [dpdk-dev] [PATCH 18/20] net/ice/base: support double VLAN mode configure for parser
2021-09-17 11:02 [dpdk-dev] [PATCH 00/20] ice/base: add parser module Qi Zhang
` (16 preceding siblings ...)
2021-09-17 11:02 ` [dpdk-dev] [PATCH 17/20] net/ice/base: add parser execution main loop Qi Zhang
@ 2021-09-17 11:02 ` Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 19/20] net/ice/base: add tunnel port support " Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 20/20] net/ice/base: add API for parser profile initialization Qi Zhang
19 siblings, 0 replies; 21+ messages in thread
From: Qi Zhang @ 2021-09-17 11:02 UTC (permalink / raw)
To: qiming.yang; +Cc: junfeng.guo, dev, Qi Zhang
Add API ice_parser_dvm_set to support turn on/off parser's
double vlan mode.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_bst_tcam.c | 28 ++++++++++++++++++++++++++++
drivers/net/ice/base/ice_bst_tcam.h | 4 ++++
drivers/net/ice/base/ice_parser.c | 27 +++++++++++++++++++++++++++
drivers/net/ice/base/ice_parser.h | 1 +
4 files changed, 60 insertions(+)
diff --git a/drivers/net/ice/base/ice_bst_tcam.c b/drivers/net/ice/base/ice_bst_tcam.c
index 76b3a5c551..306f62db2a 100644
--- a/drivers/net/ice/base/ice_bst_tcam.c
+++ b/drivers/net/ice/base/ice_bst_tcam.c
@@ -261,3 +261,31 @@ ice_bst_tcam_match(struct ice_bst_tcam_item *tcam_table, u8 *pat)
return NULL;
}
+
+static bool _start_with(const char *prefix, const char *string)
+{
+ int len1 = strlen(prefix);
+ int len2 = strlen(string);
+
+ if (len2 < len1)
+ return false;
+
+ return !memcmp(prefix, string, len1);
+}
+
+struct ice_bst_tcam_item *
+ice_bst_tcam_search(struct ice_bst_tcam_item *tcam_table,
+ struct ice_lbl_item *lbl_table,
+ const char *prefix, u16 *start)
+{
+ u16 i = *start;
+
+ for (; i < ICE_BST_TCAM_TABLE_SIZE; i++) {
+ if (_start_with(prefix, lbl_table[i].label)) {
+ *start = i;
+ return &tcam_table[lbl_table[i].idx];
+ }
+ }
+
+ return NULL;
+}
diff --git a/drivers/net/ice/base/ice_bst_tcam.h b/drivers/net/ice/base/ice_bst_tcam.h
index 3cba0bbf55..e4c96c439d 100644
--- a/drivers/net/ice/base/ice_bst_tcam.h
+++ b/drivers/net/ice/base/ice_bst_tcam.h
@@ -28,4 +28,8 @@ struct ice_lbl_item *ice_bst_lbl_table_get(struct ice_hw *hw);
struct ice_bst_tcam_item *
ice_bst_tcam_match(struct ice_bst_tcam_item *tcam_table, u8 *pat);
+struct ice_bst_tcam_item *
+ice_bst_tcam_search(struct ice_bst_tcam_item *tcam_table,
+ struct ice_lbl_item *lbl_table,
+ const char *prefix, u16 *start);
#endif /*_ICE_BST_TCAM_H_ */
diff --git a/drivers/net/ice/base/ice_parser.c b/drivers/net/ice/base/ice_parser.c
index a0c5c9989d..052bc67a4c 100644
--- a/drivers/net/ice/base/ice_parser.c
+++ b/drivers/net/ice/base/ice_parser.c
@@ -340,3 +340,30 @@ void ice_parser_result_dump(struct ice_hw *hw, struct ice_parser_result *rslt)
ice_info(hw, "flags_fd = 0x%04x\n", rslt->flags_fd);
ice_info(hw, "flags_rss = 0x%04x\n", rslt->flags_rss);
}
+
+static void _bst_vm_set(struct ice_parser *psr, const char *prefix, bool on)
+{
+ struct ice_bst_tcam_item *item;
+ u16 i = 0;
+
+ while (true) {
+ item = ice_bst_tcam_search(psr->bst_tcam_table,
+ psr->bst_lbl_table,
+ prefix, &i);
+ if (!item)
+ break;
+ item->key[0] = (u8)(on ? 0xff : 0xfe);
+ item->key_inv[0] = (u8)(on ? 0xff : 0xfe);
+ i++;
+ }
+}
+
+/**
+ * ice_parser_dvm_set - configure double vlan mode for parser
+ * @psr: pointer to a parser instance
+ */
+void ice_parser_dvm_set(struct ice_parser *psr, bool on)
+{
+ _bst_vm_set(psr, "BOOST_MAC_VLAN_DVM", on);
+ _bst_vm_set(psr, "BOOST_MAC_VLAN_SVM", !on);
+}
diff --git a/drivers/net/ice/base/ice_parser.h b/drivers/net/ice/base/ice_parser.h
index b2ab21728e..74d72c26df 100644
--- a/drivers/net/ice/base/ice_parser.h
+++ b/drivers/net/ice/base/ice_parser.h
@@ -57,6 +57,7 @@ struct ice_parser {
enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr);
void ice_parser_destroy(struct ice_parser *psr);
+void ice_parser_dvm_set(struct ice_parser *psr, bool on);
struct ice_parser_proto_off {
u8 proto_id; /* hardware protocol ID */
--
2.26.2
^ permalink raw reply [flat|nested] 21+ messages in thread
* [dpdk-dev] [PATCH 19/20] net/ice/base: add tunnel port support for parser
2021-09-17 11:02 [dpdk-dev] [PATCH 00/20] ice/base: add parser module Qi Zhang
` (17 preceding siblings ...)
2021-09-17 11:02 ` [dpdk-dev] [PATCH 18/20] net/ice/base: support double VLAN mode configure for parser Qi Zhang
@ 2021-09-17 11:02 ` Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 20/20] net/ice/base: add API for parser profile initialization Qi Zhang
19 siblings, 0 replies; 21+ messages in thread
From: Qi Zhang @ 2021-09-17 11:02 UTC (permalink / raw)
To: qiming.yang; +Cc: junfeng.guo, dev, Qi Zhang
UDP tunnel can be added/deleted for vxlan, geneve, ecpri through
below APIs:
ice_parser_vxlan_tunnel_set
ice_parser_geneve_tunnel_set
ice_parser_ecpri_tunnel_set
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_parser.c | 75 +++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_parser.h | 6 +++
2 files changed, 81 insertions(+)
diff --git a/drivers/net/ice/base/ice_parser.c b/drivers/net/ice/base/ice_parser.c
index 052bc67a4c..c8272cb9c2 100644
--- a/drivers/net/ice/base/ice_parser.c
+++ b/drivers/net/ice/base/ice_parser.c
@@ -367,3 +367,78 @@ void ice_parser_dvm_set(struct ice_parser *psr, bool on)
_bst_vm_set(psr, "BOOST_MAC_VLAN_DVM", on);
_bst_vm_set(psr, "BOOST_MAC_VLAN_SVM", !on);
}
+
+static enum ice_status
+_tunnel_port_set(struct ice_parser *psr, const char *prefix, u16 udp_port,
+ bool on)
+{
+ u8 *buf = (u8 *)&udp_port;
+ struct ice_bst_tcam_item *item;
+ u16 i = 0;
+
+ while (true) {
+ item = ice_bst_tcam_search(psr->bst_tcam_table,
+ psr->bst_lbl_table,
+ prefix, &i);
+ if (!item)
+ break;
+
+ /* found empty slot to add */
+ if (on && item->key[16] == 0xfe && item->key_inv[16] == 0xfe) {
+ item->key_inv[15] = buf[0];
+ item->key_inv[16] = buf[1];
+ item->key[15] = (u8)(0xff - buf[0]);
+ item->key[16] = (u8)(0xff - buf[1]);
+
+ return ICE_SUCCESS;
+ /* found a matched slot to delete */
+ } else if (!on && (item->key_inv[15] == buf[0] ||
+ item->key_inv[16] == buf[1])) {
+ item->key_inv[15] = 0xff;
+ item->key_inv[16] = 0xfe;
+ item->key[15] = 0xff;
+ item->key[16] = 0xfe;
+
+ return ICE_SUCCESS;
+ }
+ i++;
+ }
+
+ return ICE_ERR_PARAM;
+}
+
+/**
+ * ice_parser_vxlan_tunnel_set - configure vxlan tunnel for parser
+ * @psr: pointer to a parser instance
+ * @udp_port: vxlan tunnel port in UDP header
+ * @on: true to turn on; false to turn off
+ */
+enum ice_status ice_parser_vxlan_tunnel_set(struct ice_parser *psr,
+ u16 udp_port, bool on)
+{
+ return _tunnel_port_set(psr, "TNL_VXLAN", udp_port, on);
+}
+
+/**
+ * ice_parser_geneve_tunnel_set - configure geneve tunnel for parser
+ * @psr: pointer to a parser instance
+ * @udp_port: geneve tunnel port in UDP header
+ * @on: true to turn on; false to turn off
+ */
+enum ice_status ice_parser_geneve_tunnel_set(struct ice_parser *psr,
+ u16 udp_port, bool on)
+{
+ return _tunnel_port_set(psr, "TNL_GENEVE", udp_port, on);
+}
+
+/**
+ * ice_parser_ecpri_tunnel_set - configure ecpri tunnel for parser
+ * @psr: pointer to a parser instance
+ * @udp_port: ecpri tunnel port in UDP header
+ * @on: true to turn on; false to turn off
+ */
+enum ice_status ice_parser_ecpri_tunnel_set(struct ice_parser *psr,
+ u16 udp_port, bool on)
+{
+ return _tunnel_port_set(psr, "TNL_UDP_ECPRI", udp_port, on);
+}
diff --git a/drivers/net/ice/base/ice_parser.h b/drivers/net/ice/base/ice_parser.h
index 74d72c26df..5c77d7d98c 100644
--- a/drivers/net/ice/base/ice_parser.h
+++ b/drivers/net/ice/base/ice_parser.h
@@ -58,6 +58,12 @@ struct ice_parser {
enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr);
void ice_parser_destroy(struct ice_parser *psr);
void ice_parser_dvm_set(struct ice_parser *psr, bool on);
+enum ice_status ice_parser_vxlan_tunnel_set(struct ice_parser *psr,
+ u16 udp_port, bool on);
+enum ice_status ice_parser_geneve_tunnel_set(struct ice_parser *psr,
+ u16 udp_port, bool on);
+enum ice_status ice_parser_ecpri_tunnel_set(struct ice_parser *psr,
+ u16 udp_port, bool on);
struct ice_parser_proto_off {
u8 proto_id; /* hardware protocol ID */
--
2.26.2
^ permalink raw reply [flat|nested] 21+ messages in thread
* [dpdk-dev] [PATCH 20/20] net/ice/base: add API for parser profile initialization
2021-09-17 11:02 [dpdk-dev] [PATCH 00/20] ice/base: add parser module Qi Zhang
` (18 preceding siblings ...)
2021-09-17 11:02 ` [dpdk-dev] [PATCH 19/20] net/ice/base: add tunnel port support " Qi Zhang
@ 2021-09-17 11:02 ` Qi Zhang
19 siblings, 0 replies; 21+ messages in thread
From: Qi Zhang @ 2021-09-17 11:02 UTC (permalink / raw)
To: qiming.yang; +Cc: junfeng.guo, dev, Qi Zhang
Add API ice_parser_profile_init to init a parser profile base on
a parser result and a mask buffer. The ice_parser_profile can feed to
low level FXP engine to create HW profile / field vector directly.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_parser.c | 112 ++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_parser.h | 24 +++++++
2 files changed, 136 insertions(+)
diff --git a/drivers/net/ice/base/ice_parser.c b/drivers/net/ice/base/ice_parser.c
index c8272cb9c2..9180b358eb 100644
--- a/drivers/net/ice/base/ice_parser.c
+++ b/drivers/net/ice/base/ice_parser.c
@@ -442,3 +442,115 @@ enum ice_status ice_parser_ecpri_tunnel_set(struct ice_parser *psr,
{
return _tunnel_port_set(psr, "TNL_UDP_ECPRI", udp_port, on);
}
+
+static bool _nearest_proto_id(struct ice_parser_result *rslt, u16 offset,
+ u8 *proto_id, u16 *proto_off)
+{
+ u16 dist = 0xffff;
+ u8 p = 0;
+ int i;
+
+ for (i = 0; i < rslt->po_num; i++) {
+ if (offset < rslt->po[i].offset)
+ continue;
+ if (offset - rslt->po[i].offset < dist) {
+ p = rslt->po[i].proto_id;
+ dist = offset - rslt->po[i].offset;
+ }
+ }
+
+ if (dist % 2)
+ return false;
+
+ *proto_id = p;
+ *proto_off = dist;
+
+ return true;
+}
+
+/** default flag mask to cover GTP_EH_PDU, GTP_EH_PDU_LINK and TUN2
+ * In future, the flag masks should learn from DDP
+ */
+#define ICE_KEYBUILD_FLAG_MASK_DEFAULT_SW 0x4002
+#define ICE_KEYBUILD_FLAG_MASK_DEFAULT_ACL 0x0000
+#define ICE_KEYBUILD_FLAG_MASK_DEFAULT_FD 0x6080
+#define ICE_KEYBUILD_FLAG_MASK_DEFAULT_RSS 0x6010
+
+/**
+ * ice_parser_profile_init - initialize a FXP profile base on parser result
+ * @rslt: a instance of a parser result
+ * @pkt_buf: packet data buffer
+ * @pkt_msk: packet mask buffer
+ * @pkt_len: packet length
+ * @blk: FXP pipeline stage
+ * @prefix_match: match protocol stack exactly or only prefix
+ * @prof: input/output parameter to save the profile
+ */
+enum ice_status ice_parser_profile_init(struct ice_parser_result *rslt,
+ const u8 *pkt_buf, const u8 *msk_buf,
+ int buf_len, enum ice_block blk,
+ bool prefix_match,
+ struct ice_parser_profile *prof)
+{
+ u8 proto_id = 0xff;
+ u16 proto_off = 0;
+ u16 off;
+
+ ice_memset(prof, 0, sizeof(*prof), ICE_NONDMA_MEM);
+ ice_set_bit(rslt->ptype, prof->ptypes);
+ if (blk == ICE_BLK_SW) {
+ prof->flags = rslt->flags_sw;
+ prof->flags_msk = ICE_KEYBUILD_FLAG_MASK_DEFAULT_SW;
+ } else if (blk == ICE_BLK_ACL) {
+ prof->flags = rslt->flags_acl;
+ prof->flags_msk = ICE_KEYBUILD_FLAG_MASK_DEFAULT_ACL;
+ } else if (blk == ICE_BLK_FD) {
+ prof->flags = rslt->flags_fd;
+ prof->flags_msk = ICE_KEYBUILD_FLAG_MASK_DEFAULT_FD;
+ } else if (blk == ICE_BLK_RSS) {
+ prof->flags = rslt->flags_rss;
+ prof->flags_msk = ICE_KEYBUILD_FLAG_MASK_DEFAULT_RSS;
+ } else {
+ return ICE_ERR_PARAM;
+ }
+
+ for (off = 0; off < buf_len - 1; off++) {
+ if (msk_buf[off] == 0 && msk_buf[off + 1] == 0)
+ continue;
+ if (!_nearest_proto_id(rslt, off, &proto_id, &proto_off))
+ continue;
+ if (prof->fv_num >= 32)
+ return ICE_ERR_PARAM;
+
+ prof->fv[prof->fv_num].proto_id = proto_id;
+ prof->fv[prof->fv_num].offset = proto_off;
+ prof->fv[prof->fv_num].spec = *(const u16 *)&pkt_buf[off];
+ prof->fv[prof->fv_num].msk = *(const u16 *)&msk_buf[off];
+ prof->fv_num++;
+ }
+
+ return ICE_SUCCESS;
+}
+
+/**
+ * ice_parser_profile_dump - dump an FXP profile info
+ * @hw: pointer to the hardware structure
+ * @prof: profile info to dump
+ */
+void ice_parser_profile_dump(struct ice_hw *hw, struct ice_parser_profile *prof)
+{
+ u16 i;
+
+ ice_info(hw, "ptypes:\n");
+ for (i = 0; i < ICE_FLOW_PTYPE_MAX; i++)
+ if (ice_is_bit_set(prof->ptypes, i))
+ ice_info(hw, "\t%d\n", i);
+
+ for (i = 0; i < prof->fv_num; i++)
+ ice_info(hw, "proto = %d, offset = %d spec = 0x%04x, mask = 0x%04x\n",
+ prof->fv[i].proto_id, prof->fv[i].offset,
+ prof->fv[i].spec, prof->fv[i].msk);
+
+ ice_info(hw, "flags = 0x%04x\n", prof->flags);
+ ice_info(hw, "flags_msk = 0x%04x\n", prof->flags_msk);
+}
diff --git a/drivers/net/ice/base/ice_parser.h b/drivers/net/ice/base/ice_parser.h
index 5c77d7d98c..690144d77b 100644
--- a/drivers/net/ice/base/ice_parser.h
+++ b/drivers/net/ice/base/ice_parser.h
@@ -86,4 +86,28 @@ struct ice_parser_result {
enum ice_status ice_parser_run(struct ice_parser *psr, const u8 *pkt_buf,
int pkt_len, struct ice_parser_result *rslt);
void ice_parser_result_dump(struct ice_hw *hw, struct ice_parser_result *rslt);
+
+struct ice_parser_fv {
+ u8 proto_id; /* hardware protocol ID */
+ u16 offset; /* offset from the start of the protocol header */
+ u16 spec; /* 16 bits pattern to match */
+ u16 msk; /* 16 bits pattern mask */
+};
+
+struct ice_parser_profile {
+ struct ice_parser_fv fv[48]; /* field vector arrary */
+ int fv_num; /* field vector number must <= 48 */
+ u16 flags; /* 16 bits key builder flag */
+ u16 flags_msk; /* key builder flag masker */
+ /* 1024 bits PTYPE bitmap */
+ ice_declare_bitmap(ptypes, ICE_FLOW_PTYPE_MAX);
+};
+
+enum ice_status ice_parser_profile_init(struct ice_parser_result *rslt,
+ const u8 *pkt_buf, const u8 *msk_buf,
+ int buf_len, enum ice_block blk,
+ bool prefix_match,
+ struct ice_parser_profile *prof);
+void ice_parser_profile_dump(struct ice_hw *hw,
+ struct ice_parser_profile *prof);
#endif /* _ICE_PARSER_H_ */
--
2.26.2
^ permalink raw reply [flat|nested] 21+ messages in thread
end of thread, other threads:[~2021-09-17 11:02 UTC | newest]
Thread overview: 21+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-09-17 11:02 [dpdk-dev] [PATCH 00/20] ice/base: add parser module Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 01/20] net/ice/base: add parser create and destroy skeleton Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 02/20] net/ice/base: init imem table for parser Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 03/20] net/ice/base: init metainit " Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 04/20] net/ice/base: init parse graph cam " Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 05/20] net/ice/base: init boost TCAM " Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 06/20] net/ice/base: init ptype marker " Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 07/20] net/ice/base: init marker group " Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 08/20] net/ice/base: init protocol " Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 09/20] net/ice/base: init flag redirect " Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 10/20] net/ice/base: init XLT key builder " Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 11/20] net/ice/base: add parser runtime skeleton Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 12/20] net/ice/base: add helper function for boost TCAM match Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 13/20] net/ice/base: add helper functions for parse graph key matching Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 14/20] net/ice/base: add helper function for ptype markers match Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 15/20] net/ice/base: add helper function to redirect flags Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 16/20] net/ice/base: add helper function to aggregate flags Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 17/20] net/ice/base: add parser execution main loop Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 18/20] net/ice/base: support double VLAN mode configure for parser Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 19/20] net/ice/base: add tunnel port support " Qi Zhang
2021-09-17 11:02 ` [dpdk-dev] [PATCH 20/20] net/ice/base: add API for parser profile initialization Qi Zhang
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