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dpdk.org; dkim=none (message not signed) header.d=none;dpdk.org; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by DM6NAM11FT048.mail.protection.outlook.com (10.13.173.114) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4544.13 via Frontend Transport; Mon, 27 Sep 2021 08:34:00 +0000 Received: from DRHQMAIL107.nvidia.com (10.27.9.16) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 27 Sep 2021 08:34:00 +0000 Received: from nvidia.com (172.20.187.5) by DRHQMAIL107.nvidia.com (10.27.9.16) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 27 Sep 2021 08:33:58 +0000 From: Xueming Li To: CC: , Matan Azrad , "Viacheslav Ovsiienko" Date: Mon, 27 Sep 2021 16:32:53 +0800 Message-ID: <20210927083256.337450-6-xuemingl@nvidia.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210927083256.337450-1-xuemingl@nvidia.com> References: <20210927083256.337450-1-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL107.nvidia.com (172.20.187.13) To DRHQMAIL107.nvidia.com (10.27.9.16) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: a2edd501-a5ff-4b4d-a4aa-08d981918e3e X-MS-TrafficTypeDiagnostic: BY5PR12MB3681: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:6108; 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CAT:NONE; SFS:(4636009)(46966006)(36840700001)(16526019)(86362001)(47076005)(70206006)(6666004)(83380400001)(36906005)(5660300002)(107886003)(26005)(356005)(316002)(186003)(36860700001)(508600001)(8936002)(55016002)(54906003)(70586007)(82310400003)(8676002)(1076003)(2616005)(4326008)(36756003)(7696005)(7636003)(6286002)(426003)(336012)(6916009)(2906002); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Sep 2021 08:34:00.5297 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a2edd501-a5ff-4b4d-a4aa-08d981918e3e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT048.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB3681 Subject: [dpdk-dev] [PATCH 5/8] net/mlx5: support flow item port of switch manager X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When sending packet from representor, the vport ID in transport domain is E-Switch manager vport ID since representor shares resources of eswitch manager. To match packet sent by representor, pattern has to be vport_id== && txq== On BlueField, eswitch manager ID is 0xfffe. 0 on other NIC. Signed-off-by: Xueming Li --- drivers/net/mlx5/mlx5_flow.h | 3 +++ drivers/net/mlx5/mlx5_flow_dv.c | 25 +++++++++++++++++++++++++ 2 files changed, 28 insertions(+) diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index 76ad53f2a1e..861e18fb3b1 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -18,6 +18,9 @@ #include "mlx5.h" +/* E-Switch Manager port, used for rte_flow_item_port_id. */ +#define MLX5_PORT_ESW_MGR UINT32_MAX + /* Private rte flow items. */ enum mlx5_rte_flow_item_type { MLX5_RTE_FLOW_ITEM_TYPE_END = INT_MIN, diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index 3f6f5dcfbad..d4242a4aa8d 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -92,6 +93,23 @@ static int flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev, uint32_t rix_jump); +static int16_t +flow_dv_get_esw_manager_vport_id(struct rte_eth_dev *dev) +{ + struct mlx5_priv *priv = dev->data->dev_private; + + if (priv->pci_dev == NULL) + return 0; + switch (priv->pci_dev->id.device_id) { + case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF: + case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF: + case PCI_DEVICE_ID_MELLANOX_CONNECTX7BF: + return (int16_t)0xfffe; + default: + return 0; + } +} + /** * Initialize flow attributes structure according to flow items' types. * @@ -2224,6 +2242,8 @@ flow_dv_validate_item_port_id(struct rte_eth_dev *dev, return ret; if (!spec) return 0; + if (spec->id == MLX5_PORT_ESW_MGR) + return 0; esw_priv = mlx5_port_to_eswitch_info(spec->id, false); if (!esw_priv) return rte_flow_error_set(error, rte_errno, @@ -9691,6 +9711,11 @@ flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher, struct mlx5_priv *priv; uint16_t mask, id; + if (pid_v && pid_v->id == MLX5_PORT_ESW_MGR) { + flow_dv_translate_item_source_vport(matcher, key, + flow_dv_get_esw_manager_vport_id(dev), 0xffff); + return 0; + } mask = pid_m ? pid_m->id : 0xffff; id = pid_v ? pid_v->id : dev->data->port_id; priv = mlx5_port_to_eswitch_info(id, item == NULL); -- 2.33.0