From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D6D9AA0C4C; Tue, 28 Sep 2021 11:30:52 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 73E1D40E3C; Tue, 28 Sep 2021 11:30:52 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id CC99340DF6 for ; Tue, 28 Sep 2021 11:30:50 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 18S17oCl026166 for ; Tue, 28 Sep 2021 02:30:49 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=evrLkj8CHt6LBS5DkJEt+F3a++wn3OeIGGCRtg/iODE=; b=fLxRfjYV5kVBk/iF55A7YLscPWcSYvX9gLmUt0lhFl45VhURLFzfMlE5uVXeVtHn4dtY 3zOXCWXTo/kNHhE9LwjOaEuj2na1hdM/v2cXgEyvz3N1scS2mAGv2DdYjKjTohQybs/4 7H+gJaso+Q5iZTgWAqDAcJfSkfKEOolYeH7xiRUyxQnlq0LntCiMpxzhDDXhe7x+DewL XPxcfMxu9oElzcULIAfOWdUIk4oK6gdDOqLCPJLlKiOLWQ64yuwoPeUrLPHCFu+n2IFI 3wUjr3z32FN7fmjiIifLhOIS4tvD+qW1sKV8TpeRtxuYP6iQqYzXBcCKZooOqADslz2d sw== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com with ESMTP id 3bbs489pjf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 28 Sep 2021 02:30:49 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Tue, 28 Sep 2021 02:30:48 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Tue, 28 Sep 2021 02:30:48 -0700 Received: from hyd1554T5810.caveonetworks.com.com (unknown [10.29.57.11]) by maili.marvell.com (Postfix) with ESMTP id 530993F7040; Tue, 28 Sep 2021 02:30:46 -0700 (PDT) From: Tejasree Kondoj To: Akhil Goyal CC: Tejasree Kondoj , Anoob Joseph , Ankur Dwivedi , Date: Tue, 28 Sep 2021 15:54:30 +0530 Message-ID: <20210928102430.30270-1-ktejasree@marvell.com> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: 40nWLHsn5HoBmaC-59_emeiJvJSDr-RR X-Proofpoint-ORIG-GUID: 40nWLHsn5HoBmaC-59_emeiJvJSDr-RR X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475 definitions=2021-09-28_05,2021-09-28_01,2020-04-07_01 Subject: [dpdk-dev] [PATCH] crypto/octeontx2: fix lookaside IPsec capabilities X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Adding cbc, sha1-hmac and sha256-hmac to lookaside IPsec capabilities. Fixes: 8f685ec2d545 ("crypto/octeontx2: support AES-CBC SHA1-HMAC") Fixes: 61baeec4682c ("crypto/octeontx2: support AES-CBC SHA256-128-HMAC") Signed-off-by: Tejasree Kondoj --- .../octeontx2/otx2_cryptodev_capabilities.c | 64 +++++++++++++++++++ 1 file changed, 64 insertions(+) diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_capabilities.c b/drivers/crypto/octeontx2/otx2_cryptodev_capabilities.c index 80f3729995..ba3fbbbe22 100644 --- a/drivers/crypto/octeontx2/otx2_cryptodev_capabilities.c +++ b/drivers/crypto/octeontx2/otx2_cryptodev_capabilities.c @@ -767,6 +767,69 @@ static const struct rte_cryptodev_capabilities sec_caps_aes[] = { }, } }, } }, + { /* AES CBC */ + .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, + {.sym = { + .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER, + {.cipher = { + .algo = RTE_CRYPTO_CIPHER_AES_CBC, + .block_size = 16, + .key_size = { + .min = 16, + .max = 32, + .increment = 8 + }, + .iv_size = { + .min = 16, + .max = 16, + .increment = 0 + } + }, } + }, } + }, +}; + +static const struct rte_cryptodev_capabilities sec_caps_sha1_sha2[] = { + { /* SHA1 HMAC */ + .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, + {.sym = { + .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH, + {.auth = { + .algo = RTE_CRYPTO_AUTH_SHA1_HMAC, + .block_size = 64, + .key_size = { + .min = 1, + .max = 1024, + .increment = 1 + }, + .digest_size = { + .min = 12, + .max = 20, + .increment = 8 + }, + }, } + }, } + }, + { /* SHA256 HMAC */ + .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, + {.sym = { + .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH, + {.auth = { + .algo = RTE_CRYPTO_AUTH_SHA256_HMAC, + .block_size = 64, + .key_size = { + .min = 1, + .max = 1024, + .increment = 1 + }, + .digest_size = { + .min = 16, + .max = 32, + .increment = 16 + }, + }, } + }, } + }, }; static const struct rte_security_capability @@ -849,6 +912,7 @@ void otx2_crypto_sec_capabilities_init(union cpt_eng_caps *hw_caps) { SEC_CAPS_ADD(hw_caps, aes); + SEC_CAPS_ADD(hw_caps, sha1_sha2); sec_caps_add(caps_end, RTE_DIM(caps_end)); } -- 2.27.0