From: Ciara Power <ciara.power@intel.com>
To: dev@dpdk.org
Cc: roy.fan.zhang@intel.com, piotrx.bronowski@intel.com,
gakhil@marvell.com, Kai Ji <kai.ji@intel.com>,
Ciara Power <ciara.power@intel.com>,
Declan Doherty <declan.doherty@intel.com>,
Pablo de Lara <pablo.de.lara.guarch@intel.com>
Subject: [dpdk-dev] [PATCH v3 09/10] crypto/ipsec_mb: add chacha20-poly1305 PMD to framework
Date: Wed, 29 Sep 2021 16:30:34 +0000 [thread overview]
Message-ID: <20210929163035.608387-10-ciara.power@intel.com> (raw)
In-Reply-To: <20210929163035.608387-1-ciara.power@intel.com>
From: Kai Ji <kai.ji@intel.com>
Add in new chacha20_poly1305 support in ipsec_mb.
Add in new chacha20_poly1305 test vector for SGL test.
Signed-off-by: Kai Ji <kai.ji@intel.com>
Signed-off-by: Ciara Power <ciara.power@intel.com>
---
v3:
- Fixed some formatting.
- Removed unnecessary get session function.
v2:
- Added unused tag to session configure parameter.
- Added release note.
- Added documentation for PMD.
---
app/test/test_cryptodev.c | 23 +
app/test/test_cryptodev.h | 1 +
app/test/test_cryptodev_aead_test_vectors.h | 114 +++++
doc/guides/cryptodevs/chacha20_poly1305.rst | 99 ++++
.../cryptodevs/features/chacha20_poly1305.ini | 35 ++
doc/guides/cryptodevs/index.rst | 1 +
doc/guides/rel_notes/release_21_11.rst | 5 +
drivers/crypto/ipsec_mb/meson.build | 1 +
drivers/crypto/ipsec_mb/pmd_chacha_poly.c | 482 ++++++++++++++++++
.../ipsec_mb/rte_ipsec_mb_pmd_private.h | 7 +
10 files changed, 768 insertions(+)
create mode 100644 doc/guides/cryptodevs/chacha20_poly1305.rst
create mode 100644 doc/guides/cryptodevs/features/chacha20_poly1305.ini
create mode 100644 drivers/crypto/ipsec_mb/pmd_chacha_poly.c
diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
index 16d770a17f..92c9bd0141 100644
--- a/app/test/test_cryptodev.c
+++ b/app/test/test_cryptodev.c
@@ -13455,6 +13455,14 @@ test_chacha20_poly1305_decrypt_test_case_rfc8439(void)
return test_authenticated_decryption(&chacha20_poly1305_case_rfc8439);
}
+static int
+test_chacha20_poly1305_encrypt_SGL_out_of_place(void)
+{
+ return test_authenticated_encryption_SGL(
+ &chacha20_poly1305_case_2, OUT_OF_PLACE, 32,
+ chacha20_poly1305_case_2.plaintext.len);
+}
+
#ifdef RTE_CRYPTO_SCHEDULER
/* global AESNI worker IDs for the scheduler test */
@@ -14063,6 +14071,8 @@ static struct unit_test_suite cryptodev_chacha20_poly1305_testsuite = {
test_chacha20_poly1305_encrypt_test_case_rfc8439),
TEST_CASE_ST(ut_setup, ut_teardown,
test_chacha20_poly1305_decrypt_test_case_rfc8439),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_chacha20_poly1305_encrypt_SGL_out_of_place),
TEST_CASES_END()
}
};
@@ -14629,6 +14639,17 @@ test_cryptodev_cpu_aesni_mb(void)
return rc;
}
+static int
+test_cryptodev_chacha_poly_mb(void)
+{
+ int32_t rc;
+ enum rte_security_session_action_type at = gbl_action_type;
+ rc = run_cryptodev_testsuite(
+ RTE_STR(CRYPTODEV_NAME_CHACHA20_POLY1305_PMD));
+ gbl_action_type = at;
+ return rc;
+}
+
static int
test_cryptodev_openssl(void)
{
@@ -14888,6 +14909,8 @@ REGISTER_TEST_COMMAND(cryptodev_qat_autotest, test_cryptodev_qat);
REGISTER_TEST_COMMAND(cryptodev_aesni_mb_autotest, test_cryptodev_aesni_mb);
REGISTER_TEST_COMMAND(cryptodev_cpu_aesni_mb_autotest,
test_cryptodev_cpu_aesni_mb);
+REGISTER_TEST_COMMAND(cryptodev_chacha_poly_mb_autotest,
+ test_cryptodev_chacha_poly_mb);
REGISTER_TEST_COMMAND(cryptodev_openssl_autotest, test_cryptodev_openssl);
REGISTER_TEST_COMMAND(cryptodev_aesni_gcm_autotest, test_cryptodev_aesni_gcm);
REGISTER_TEST_COMMAND(cryptodev_cpu_aesni_gcm_autotest,
diff --git a/app/test/test_cryptodev.h b/app/test/test_cryptodev.h
index 1cdd84d01f..90c8287365 100644
--- a/app/test/test_cryptodev.h
+++ b/app/test/test_cryptodev.h
@@ -59,6 +59,7 @@
#define CRYPTODEV_NAME_SNOW3G_PMD crypto_snow3g
#define CRYPTODEV_NAME_KASUMI_PMD crypto_kasumi
#define CRYPTODEV_NAME_ZUC_PMD crypto_zuc
+#define CRYPTODEV_NAME_CHACHA20_POLY1305_PMD crypto_chacha20_poly1305
#define CRYPTODEV_NAME_ARMV8_PMD crypto_armv8
#define CRYPTODEV_NAME_DPAA_SEC_PMD crypto_dpaa_sec
#define CRYPTODEV_NAME_DPAA2_SEC_PMD crypto_dpaa2_sec
diff --git a/app/test/test_cryptodev_aead_test_vectors.h b/app/test/test_cryptodev_aead_test_vectors.h
index 73cc143f10..07292620a4 100644
--- a/app/test/test_cryptodev_aead_test_vectors.h
+++ b/app/test/test_cryptodev_aead_test_vectors.h
@@ -3930,4 +3930,118 @@ static const struct aead_test_data chacha20_poly1305_case_rfc8439 = {
.len = 16
}
};
+
+static uint8_t chacha_aad_2[] = {
+ 0xf3, 0x33, 0x88, 0x86, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x4e, 0x91
+};
+
+static const struct aead_test_data chacha20_poly1305_case_2 = {
+ .algo = RTE_CRYPTO_AEAD_CHACHA20_POLY1305,
+ .key = {
+ .data = {
+ 0x1c, 0x92, 0x40, 0xa5, 0xeb, 0x55, 0xd3, 0x8a,
+ 0xf3, 0x33, 0x88, 0x86, 0x04, 0xf6, 0xb5, 0xf0,
+ 0x47, 0x39, 0x17, 0xc1, 0x40, 0x2b, 0x80, 0x09,
+ 0x9d, 0xca, 0x5c, 0xbc, 0x20, 0x70, 0x75, 0xc0
+ },
+ .len = 32
+ },
+ .iv = {
+ .data = {
+ 0x00, 0x00, 0x00, 0x00, 0x01, 0x02, 0x03, 0x04,
+ 0x05, 0x06, 0x07, 0x08
+ },
+ .len = 12
+ },
+ .aad = {
+ .data = chacha_aad_2,
+ .len = 12
+ },
+ .plaintext = {
+ .data = {
+ 0x49, 0x6e, 0x74, 0x65, 0x72, 0x6e, 0x65, 0x74,
+ 0x2d, 0x44, 0x72, 0x61, 0x66, 0x74, 0x73, 0x20,
+ 0x61, 0x72, 0x65, 0x20, 0x64, 0x72, 0x61, 0x66,
+ 0x74, 0x20, 0x64, 0x6f, 0x63, 0x75, 0x6d, 0x65,
+ 0x6e, 0x74, 0x73, 0x20, 0x76, 0x61, 0x6c, 0x69,
+ 0x64, 0x20, 0x66, 0x6f, 0x72, 0x20, 0x61, 0x20,
+ 0x6d, 0x61, 0x78, 0x69, 0x6d, 0x75, 0x6d, 0x20,
+ 0x6f, 0x66, 0x20, 0x73, 0x69, 0x78, 0x20, 0x6d,
+ 0x6f, 0x6e, 0x74, 0x68, 0x73, 0x20, 0x61, 0x6e,
+ 0x64, 0x20, 0x6d, 0x61, 0x79, 0x20, 0x62, 0x65,
+ 0x20, 0x75, 0x70, 0x64, 0x61, 0x74, 0x65, 0x64,
+ 0x2c, 0x20, 0x72, 0x65, 0x70, 0x6c, 0x61, 0x63,
+ 0x65, 0x64, 0x2c, 0x20, 0x6f, 0x72, 0x20, 0x6f,
+ 0x62, 0x73, 0x6f, 0x6c, 0x65, 0x74, 0x65, 0x64,
+ 0x20, 0x62, 0x79, 0x20, 0x6f, 0x74, 0x68, 0x65,
+ 0x72, 0x20, 0x64, 0x6f, 0x63, 0x75, 0x6d, 0x65,
+ 0x6e, 0x74, 0x73, 0x20, 0x61, 0x74, 0x20, 0x61,
+ 0x6e, 0x79, 0x20, 0x74, 0x69, 0x6d, 0x65, 0x2e,
+ 0x20, 0x49, 0x74, 0x20, 0x69, 0x73, 0x20, 0x69,
+ 0x6e, 0x61, 0x70, 0x70, 0x72, 0x6f, 0x70, 0x72,
+ 0x69, 0x61, 0x74, 0x65, 0x20, 0x74, 0x6f, 0x20,
+ 0x75, 0x73, 0x65, 0x20, 0x49, 0x6e, 0x74, 0x65,
+ 0x72, 0x6e, 0x65, 0x74, 0x2d, 0x44, 0x72, 0x61,
+ 0x66, 0x74, 0x73, 0x20, 0x61, 0x73, 0x20, 0x72,
+ 0x65, 0x66, 0x65, 0x72, 0x65, 0x6e, 0x63, 0x65,
+ 0x20, 0x6d, 0x61, 0x74, 0x65, 0x72, 0x69, 0x61,
+ 0x6c, 0x20, 0x6f, 0x72, 0x20, 0x74, 0x6f, 0x20,
+ 0x63, 0x69, 0x74, 0x65, 0x20, 0x74, 0x68, 0x65,
+ 0x6d, 0x20, 0x6f, 0x74, 0x68, 0x65, 0x72, 0x20,
+ 0x74, 0x68, 0x61, 0x6e, 0x20, 0x61, 0x73, 0x20,
+ 0x2f, 0xe2, 0x80, 0x9c, 0x77, 0x6f, 0x72, 0x6b,
+ 0x20, 0x69, 0x6e, 0x20, 0x70, 0x72, 0x6f, 0x67,
+ 0x72, 0x65, 0x73, 0x73, 0x2e, 0x2f, 0xe2, 0x80,
+ 0x9d
+ },
+ .len = 265
+ },
+ .ciphertext = {
+ .data = {
+ 0x64, 0xa0, 0x86, 0x15, 0x75, 0x86, 0x1a, 0xf4,
+ 0x60, 0xf0, 0x62, 0xc7, 0x9b, 0xe6, 0x43, 0xbd,
+ 0x5e, 0x80, 0x5c, 0xfd, 0x34, 0x5c, 0xf3, 0x89,
+ 0xf1, 0x08, 0x67, 0x0a, 0xc7, 0x6c, 0x8c, 0xb2,
+ 0x4c, 0x6c, 0xfc, 0x18, 0x75, 0x5d, 0x43, 0xee,
+ 0xa0, 0x9e, 0xe9, 0x4e, 0x38, 0x2d, 0x26, 0xb0,
+ 0xbd, 0xb7, 0xb7, 0x3c, 0x32, 0x1b, 0x01, 0x00,
+ 0xd4, 0xf0, 0x3b, 0x7f, 0x35, 0x58, 0x94, 0xcf,
+ 0x33, 0x2f, 0x83, 0x0e, 0x71, 0x0b, 0x97, 0xce,
+ 0x98, 0xc8, 0xa8, 0x4a, 0xbd, 0x0b, 0x94, 0x81,
+ 0x14, 0xad, 0x17, 0x6e, 0x00, 0x8d, 0x33, 0xbd,
+ 0x60, 0xf9, 0x82, 0xb1, 0xff, 0x37, 0xc8, 0x55,
+ 0x97, 0x97, 0xa0, 0x6e, 0xf4, 0xf0, 0xef, 0x61,
+ 0xc1, 0x86, 0x32, 0x4e, 0x2b, 0x35, 0x06, 0x38,
+ 0x36, 0x06, 0x90, 0x7b, 0x6a, 0x7c, 0x02, 0xb0,
+ 0xf9, 0xf6, 0x15, 0x7b, 0x53, 0xc8, 0x67, 0xe4,
+ 0xb9, 0x16, 0x6c, 0x76, 0x7b, 0x80, 0x4d, 0x46,
+ 0xa5, 0x9b, 0x52, 0x16, 0xcd, 0xe7, 0xa4, 0xe9,
+ 0x90, 0x40, 0xc5, 0xa4, 0x04, 0x33, 0x22, 0x5e,
+ 0xe2, 0x82, 0xa1, 0xb0, 0xa0, 0x6c, 0x52, 0x3e,
+ 0xaf, 0x45, 0x34, 0xd7, 0xf8, 0x3f, 0xa1, 0x15,
+ 0x5b, 0x00, 0x47, 0x71, 0x8c, 0xbc, 0x54, 0x6a,
+ 0x0d, 0x07, 0x2b, 0x04, 0xb3, 0x56, 0x4e, 0xea,
+ 0x1b, 0x42, 0x22, 0x73, 0xf5, 0x48, 0x27, 0x1a,
+ 0x0b, 0xb2, 0x31, 0x60, 0x53, 0xfa, 0x76, 0x99,
+ 0x19, 0x55, 0xeb, 0xd6, 0x31, 0x59, 0x43, 0x4e,
+ 0xce, 0xbb, 0x4e, 0x46, 0x6d, 0xae, 0x5a, 0x10,
+ 0x73, 0xa6, 0x72, 0x76, 0x27, 0x09, 0x7a, 0x10,
+ 0x49, 0xe6, 0x17, 0xd9, 0x1d, 0x36, 0x10, 0x94,
+ 0xfa, 0x68, 0xf0, 0xff, 0x77, 0x98, 0x71, 0x30,
+ 0x30, 0x5b, 0xea, 0xba, 0x2e, 0xda, 0x04, 0xdf,
+ 0x99, 0x7b, 0x71, 0x4d, 0x6c, 0x6f, 0x2c, 0x29,
+ 0xa6, 0xad, 0x5c, 0xb4, 0x02, 0x2b, 0x02, 0x70,
+ 0x9b
+ },
+ .len = 265
+ },
+ .auth_tag = {
+ .data = {
+ 0xee, 0xad, 0x9d, 0x67, 0x89, 0x0c, 0xbb, 0x22,
+ 0x39, 0x23, 0x36, 0xfe, 0xa1, 0x85, 0x1f, 0x38
+ },
+ .len = 16
+ }
+};
#endif /* TEST_CRYPTODEV_AEAD_TEST_VECTORS_H_ */
diff --git a/doc/guides/cryptodevs/chacha20_poly1305.rst b/doc/guides/cryptodevs/chacha20_poly1305.rst
new file mode 100644
index 0000000000..e5f7368d6d
--- /dev/null
+++ b/doc/guides/cryptodevs/chacha20_poly1305.rst
@@ -0,0 +1,99 @@
+.. SPDX-License-Identifier: BSD-3-Clause
+ Copyright(c) 2016-2019 Intel Corporation.
+
+Chacha20-poly1305 Crypto Poll Mode Driver
+=========================================
+
+The Chacha20-poly1305 PMD provides poll mode crypto driver support for
+utilizing `Intel IPSec Multi-buffer library <https://github.com/01org/intel-ipsec-mb>`_.
+
+Features
+--------
+
+Chacha20-poly1305 PMD has support for:
+
+AEAD algorithms:
+
+* RTE_CRYPTO_AEAD_CHACHA20_POLY1305
+
+
+Installation
+------------
+
+To build DPDK with the Chacha20-poly1305 PMD the user is required to download
+the multi-buffer library from `here <https://github.com/01org/intel-ipsec-mb>`_
+and compile it on their user system before building DPDK.
+The latest version of the library supported by this PMD is v1.0, which
+can be downloaded from `<https://github.com/01org/intel-ipsec-mb/archive/v1.0.zip>`_.
+
+After downloading the library, the user needs to unpack and compile it
+on their system before building DPDK:
+
+.. code-block:: console
+
+ make
+ make install
+
+The library requires NASM to be built. Depending on the library version, it might
+require a minimum NASM version (e.g. v0.54 requires at least NASM 2.14).
+
+NASM is packaged for different OS. However, on some OS the version is too old,
+so a manual installation is required. In that case, NASM can be downloaded from
+`NASM website <https://www.nasm.us/pub/nasm/releasebuilds/?C=M;O=D>`_.
+Once it is downloaded, extract it and follow these steps:
+
+.. code-block:: console
+
+ ./configure
+ make
+ make install
+
+.. note::
+
+ Compilation of the Multi-Buffer library is broken when GCC < 5.0, if library <= v0.53.
+ If a lower GCC version than 5.0, the workaround proposed by the following link
+ should be used: `<https://github.com/intel/intel-ipsec-mb/issues/40>`_.
+
+As a reference, the following table shows a mapping between the past DPDK versions
+and the external crypto libraries supported by them:
+
+.. _table_zuc_versions:
+
+.. table:: DPDK and external crypto library version compatibility
+
+ ============= ================================
+ DPDK version Crypto library version
+ ============= ================================
+ 21.11+ Multi-buffer library 1.0*
+ ============= ================================
+
+\* Multi-buffer library 1.0 or newer only works for Meson but not Make build system.
+
+Initialization
+--------------
+
+In order to enable this virtual crypto PMD, user must:
+
+* Build the multi buffer library (explained in Installation section).
+
+To use the PMD in an application, user must:
+
+* Call rte_vdev_init("crypto_chacha20_poly1305") within the application.
+
+* Use --vdev="crypto_chacha20_poly1305" in the EAL options, which will call
+ rte_vdev_init() internally.
+
+The following parameters (all optional) can be provided in the previous two calls:
+
+* socket_id: Specify the socket where the memory for the device is going to be allocated
+ (by default, socket_id will be the socket where the core that is creating the PMD is running on).
+
+* max_nb_queue_pairs: Specify the maximum number of queue pairs in the device (8 by default).
+
+* max_nb_sessions: Specify the maximum number of sessions that can be created (2048 by default).
+
+Example:
+
+.. code-block:: console
+
+ --vdev="crypto_chacha20_poly1305,socket_id=0,max_nb_sessions=128"
diff --git a/doc/guides/cryptodevs/features/chacha20_poly1305.ini b/doc/guides/cryptodevs/features/chacha20_poly1305.ini
new file mode 100644
index 0000000000..3353e031c9
--- /dev/null
+++ b/doc/guides/cryptodevs/features/chacha20_poly1305.ini
@@ -0,0 +1,35 @@
+;
+; Supported features of the 'chacha20_poly1305' crypto driver.
+;
+; Refer to default.ini for the full list of available PMD features.
+;
+[Features]
+Symmetric crypto = Y
+Sym operation chaining = Y
+Symmetric sessionless = Y
+Non-Byte aligned data = Y
+In Place SGL = Y
+OOP SGL In LB Out = Y
+OOP LB In LB Out = Y
+CPU crypto = Y
+
+;
+; Supported crypto algorithms of the 'chacha20_poly1305' crypto driver.
+;
+[Cipher]
+
+;
+; Supported authentication algorithms of the 'chacha20_poly1305' crypto driver.
+;
+[Auth]
+
+;
+; Supported AEAD algorithms of the 'chacha20_poly1305' crypto driver.
+;
+[AEAD]
+CHACHA20-POLY1305 = Y
+
+;
+; Supported Asymmetric algorithms of the 'chacha20_poly1305' crypto driver.
+;
+[Asymmetric]
diff --git a/doc/guides/cryptodevs/index.rst b/doc/guides/cryptodevs/index.rst
index 0f981c77b5..3dcc2ecd2e 100644
--- a/doc/guides/cryptodevs/index.rst
+++ b/doc/guides/cryptodevs/index.rst
@@ -16,6 +16,7 @@ Crypto Device Drivers
bcmfs
caam_jr
ccp
+ chacha20_poly1305
cnxk
dpaa2_sec
dpaa_sec
diff --git a/doc/guides/rel_notes/release_21_11.rst b/doc/guides/rel_notes/release_21_11.rst
index 696541dab7..3beecb2392 100644
--- a/doc/guides/rel_notes/release_21_11.rst
+++ b/doc/guides/rel_notes/release_21_11.rst
@@ -76,6 +76,11 @@ New Features
* Added support for partially encrypted digest when using auth-cipher
operations.
+* **Added Chacha20-poly1305 Crypto PMD.**
+
+ * Added PMD to support chacha20-poly1305 algorithms to IPSec_MB PMD framework.
+ * Test vector added for chacha20-poly1305 SGL test.
+
* **Updated Marvell cnxk crypto PMD.**
* Added AES-CBC SHA1-HMAC support in lookaside protocol (IPsec) for CN10K.
diff --git a/drivers/crypto/ipsec_mb/meson.build b/drivers/crypto/ipsec_mb/meson.build
index a1619c78ac..6e0a5f8004 100644
--- a/drivers/crypto/ipsec_mb/meson.build
+++ b/drivers/crypto/ipsec_mb/meson.build
@@ -25,6 +25,7 @@ sources = files('rte_ipsec_mb_pmd.c',
'rte_ipsec_mb_pmd_ops.c',
'pmd_aesni_mb.c',
'pmd_aesni_gcm.c',
+ 'pmd_chacha_poly.c',
'pmd_kasumi.c',
'pmd_snow3g.c',
'pmd_zuc.c'
diff --git a/drivers/crypto/ipsec_mb/pmd_chacha_poly.c b/drivers/crypto/ipsec_mb/pmd_chacha_poly.c
new file mode 100644
index 0000000000..814bc0761c
--- /dev/null
+++ b/drivers/crypto/ipsec_mb/pmd_chacha_poly.c
@@ -0,0 +1,482 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2015-2021 Intel Corporation
+ */
+
+#include <intel-ipsec-mb.h>
+
+#if defined(RTE_LIB_SECURITY)
+#define AESNI_MB_DOCSIS_SEC_ENABLED 1
+#include <rte_ether.h>
+#include <rte_security.h>
+#include <rte_security_driver.h>
+#endif
+
+#include "rte_ipsec_mb_pmd_private.h"
+
+#define CHACHA20_POLY1305_IV_LENGTH 12
+#define CHACHA20_POLY1305_DIGEST_LENGTH 16
+#define CHACHA20_POLY1305_KEY_SIZE 32
+
+static const
+struct rte_cryptodev_capabilities chacha20_poly1305_capabilities[] = {
+ {/* CHACHA20-POLY1305 */
+ .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+ {.sym = {
+ .xform_type = RTE_CRYPTO_SYM_XFORM_AEAD,
+ {.aead = {
+ .algo = RTE_CRYPTO_AEAD_CHACHA20_POLY1305,
+ .block_size = 64,
+ .key_size = {
+ .min = 32,
+ .max = 32,
+ .increment = 0},
+ .digest_size = {
+ .min = 16,
+ .max = 16,
+ .increment = 0},
+ .aad_size = {
+ .min = 0,
+ .max = 240,
+ .increment = 1},
+ .iv_size = {
+ .min = 12,
+ .max = 12,
+ .increment = 0},
+ },
+ }
+ },}
+ },
+ RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
+};
+
+uint8_t pmd_driver_id_chacha20_poly1305;
+
+/** CHACHA20 POLY1305 private session structure */
+struct chacha20_poly1305_session {
+ struct {
+ uint16_t length;
+ uint16_t offset;
+ } iv;
+ /**< IV parameters */
+ uint16_t aad_length;
+ /**< AAD length */
+ uint16_t req_digest_length;
+ /**< Requested digest length */
+ uint16_t gen_digest_length;
+ /**< Generated digest length */
+ uint8_t key[CHACHA20_POLY1305_KEY_SIZE];
+ enum ipsec_mb_operation op;
+} __rte_cache_aligned;
+
+struct chacha20_poly1305_qp_data {
+ struct chacha20_poly1305_context_data chacha20_poly1305_ctx_data;
+ uint8_t temp_digest[CHACHA20_POLY1305_DIGEST_LENGTH];
+ /**< Buffer used to store the digest generated
+ * by the driver when verifying a digest provided
+ * by the user (using authentication verify operation)
+ */
+};
+
+/** Parse crypto xform chain and set private session parameters. */
+static int
+chacha20_poly1305_session_configure(IMB_MGR * mb_mgr __rte_unused,
+ void *priv_sess, const struct rte_crypto_sym_xform *xform)
+{
+ struct chacha20_poly1305_session *sess = priv_sess;
+ const struct rte_crypto_sym_xform *auth_xform;
+ const struct rte_crypto_sym_xform *cipher_xform;
+ const struct rte_crypto_sym_xform *aead_xform;
+
+ uint8_t key_length;
+ const uint8_t *key;
+ enum ipsec_mb_operation mode;
+ int ret = 0;
+
+ ret = ipsec_mb_parse_xform(xform, &mode, &auth_xform,
+ &cipher_xform, &aead_xform);
+ if (ret)
+ return ret;
+
+ sess->op = mode;
+
+ switch (sess->op) {
+ case IPSEC_MB_OP_AEAD_AUTHENTICATED_ENCRYPT:
+ case IPSEC_MB_OP_AEAD_AUTHENTICATED_DECRYPT:
+ if (aead_xform->aead.algo !=
+ RTE_CRYPTO_AEAD_CHACHA20_POLY1305) {
+ IPSEC_MB_LOG(ERR,
+ "The only combined operation supported is CHACHA20 POLY1305");
+ ret = -ENOTSUP;
+ goto error_exit;
+ }
+ /* Set IV parameters */
+ sess->iv.offset = aead_xform->aead.iv.offset;
+ sess->iv.length = aead_xform->aead.iv.length;
+ key_length = aead_xform->aead.key.length;
+ key = aead_xform->aead.key.data;
+ sess->aad_length = aead_xform->aead.aad_length;
+ sess->req_digest_length = aead_xform->aead.digest_length;
+ break;
+ default:
+ IPSEC_MB_LOG(
+ ERR, "Wrong xform type, has to be AEAD or authentication");
+ ret = -ENOTSUP;
+ goto error_exit;
+ }
+
+ /* IV check */
+ if (sess->iv.length != CHACHA20_POLY1305_IV_LENGTH &&
+ sess->iv.length != 0) {
+ IPSEC_MB_LOG(ERR, "Wrong IV length");
+ ret = -EINVAL;
+ goto error_exit;
+ }
+
+ /* Check key length */
+ if (key_length != CHACHA20_POLY1305_KEY_SIZE) {
+ IPSEC_MB_LOG(ERR, "Invalid key length");
+ ret = -EINVAL;
+ goto error_exit;
+ } else {
+ memcpy(sess->key, key, CHACHA20_POLY1305_KEY_SIZE);
+ }
+
+ /* Digest check */
+ if (sess->req_digest_length != CHACHA20_POLY1305_DIGEST_LENGTH) {
+ IPSEC_MB_LOG(ERR, "Invalid digest length");
+ ret = -EINVAL;
+ goto error_exit;
+ } else {
+ sess->gen_digest_length = CHACHA20_POLY1305_DIGEST_LENGTH;
+ }
+
+error_exit:
+ return ret;
+}
+
+/**
+ * Process a crypto operation, calling
+ * the direct chacha poly API from the multi buffer library.
+ *
+ * @param qp queue pair
+ * @param op symmetric crypto operation
+ * @param session chacha poly session
+ *
+ * @return
+ * - Return 0 if success
+ */
+static int
+chacha20_poly1305_crypto_op(struct ipsec_mb_qp *qp, struct rte_crypto_op *op,
+ struct chacha20_poly1305_session *session)
+{
+ struct chacha20_poly1305_qp_data *qp_data =
+ ipsec_mb_get_qp_private_data(qp);
+ uint8_t *src, *dst;
+ uint8_t *iv_ptr;
+ struct rte_crypto_sym_op *sym_op = op->sym;
+ struct rte_mbuf *m_src = sym_op->m_src;
+ uint32_t offset, data_offset, data_length;
+ uint32_t part_len, data_len;
+ int total_len;
+ uint8_t *tag;
+ unsigned int oop = 0;
+
+ offset = sym_op->aead.data.offset;
+ data_offset = offset;
+ data_length = sym_op->aead.data.length;
+ RTE_ASSERT(m_src != NULL);
+
+ while (offset >= m_src->data_len && data_length != 0) {
+ offset -= m_src->data_len;
+ m_src = m_src->next;
+
+ RTE_ASSERT(m_src != NULL);
+ }
+
+ src = rte_pktmbuf_mtod_offset(m_src, uint8_t *, offset);
+
+ data_len = m_src->data_len - offset;
+ part_len = (data_len < data_length) ? data_len :
+ data_length;
+
+ /* In-place */
+ if (sym_op->m_dst == NULL || (sym_op->m_dst == sym_op->m_src))
+ dst = src;
+ /* Out-of-place */
+ else {
+ oop = 1;
+ /* Segmented destination buffer is not supported
+ * if operation is Out-of-place
+ */
+ RTE_ASSERT(rte_pktmbuf_is_contiguous(sym_op->m_dst));
+ dst = rte_pktmbuf_mtod_offset(sym_op->m_dst, uint8_t *,
+ data_offset);
+ }
+
+ iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
+ session->iv.offset);
+
+ IMB_CHACHA20_POLY1305_INIT(qp->mb_mgr, session->key,
+ &qp_data->chacha20_poly1305_ctx_data,
+ iv_ptr, sym_op->aead.aad.data,
+ (uint64_t)session->aad_length);
+
+ if (session->op == IPSEC_MB_OP_AEAD_AUTHENTICATED_ENCRYPT) {
+ IMB_CHACHA20_POLY1305_ENC_UPDATE(qp->mb_mgr,
+ session->key,
+ &qp_data->chacha20_poly1305_ctx_data,
+ dst, src, (uint64_t)part_len);
+ total_len = data_length - part_len;
+
+ while (total_len) {
+ m_src = m_src->next;
+ RTE_ASSERT(m_src != NULL);
+
+ src = rte_pktmbuf_mtod(m_src, uint8_t *);
+ if (oop)
+ dst += part_len;
+ else
+ dst = src;
+ part_len = (m_src->data_len < total_len) ?
+ m_src->data_len : total_len;
+
+ if (dst == NULL || src == NULL) {
+ IPSEC_MB_LOG(ERR, "Invalid src or dst input");
+ return -EINVAL;
+ }
+ IMB_CHACHA20_POLY1305_ENC_UPDATE(qp->mb_mgr,
+ session->key,
+ &qp_data->chacha20_poly1305_ctx_data,
+ dst, src, (uint64_t)part_len);
+ total_len -= part_len;
+ if (total_len < 0) {
+ IPSEC_MB_LOG(ERR, "Invalid part len");
+ return -EINVAL;
+ }
+ }
+
+ tag = sym_op->aead.digest.data;
+ IMB_CHACHA20_POLY1305_ENC_FINALIZE(qp->mb_mgr,
+ &qp_data->chacha20_poly1305_ctx_data,
+ tag, session->gen_digest_length);
+
+ } else {
+ IMB_CHACHA20_POLY1305_DEC_UPDATE(qp->mb_mgr,
+ session->key,
+ &qp_data->chacha20_poly1305_ctx_data,
+ dst, src, (uint64_t)part_len);
+
+ total_len = data_length - part_len;
+
+ while (total_len) {
+ m_src = m_src->next;
+
+ RTE_ASSERT(m_src != NULL);
+
+ src = rte_pktmbuf_mtod(m_src, uint8_t *);
+ if (oop)
+ dst += part_len;
+ else
+ dst = src;
+ part_len = (m_src->data_len < total_len) ?
+ m_src->data_len : total_len;
+
+ if (dst == NULL || src == NULL) {
+ IPSEC_MB_LOG(ERR, "Invalid src or dst input");
+ return -EINVAL;
+ }
+ IMB_CHACHA20_POLY1305_DEC_UPDATE(qp->mb_mgr,
+ session->key,
+ &qp_data->chacha20_poly1305_ctx_data,
+ dst, src, (uint64_t)part_len);
+ total_len -= part_len;
+ if (total_len < 0) {
+ IPSEC_MB_LOG(ERR, "Invalid part len");
+ return -EINVAL;
+ }
+ }
+
+ tag = qp_data->temp_digest;
+ IMB_CHACHA20_POLY1305_DEC_FINALIZE(qp->mb_mgr,
+ &qp_data->chacha20_poly1305_ctx_data,
+ tag, session->gen_digest_length);
+ }
+
+ return 0;
+}
+
+/**
+ * Process a completed chacha poly op
+ *
+ * @param qp Queue Pair to process
+ * @param op Crypto operation
+ * @param sess Crypto session
+ *
+ * @return
+ * - void
+ */
+static void
+post_process_chacha20_poly1305_crypto_op(struct ipsec_mb_qp *qp,
+ struct rte_crypto_op *op,
+ struct chacha20_poly1305_session *session)
+{
+ struct chacha20_poly1305_qp_data *qp_data =
+ ipsec_mb_get_qp_private_data(qp);
+
+ op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
+ /* Verify digest if required */
+ if (session->op == IPSEC_MB_OP_AEAD_AUTHENTICATED_DECRYPT ||
+ session->op == IPSEC_MB_OP_HASH_VERIFY_ONLY) {
+ uint8_t *digest = op->sym->aead.digest.data;
+ uint8_t *tag = qp_data->temp_digest;
+
+#ifdef RTE_LIBRTE_PMD_CHACHA20_POLY1305_DEBUG
+ rte_hexdump(stdout, "auth tag (orig):",
+ digest, session->req_digest_length);
+ rte_hexdump(stdout, "auth tag (calc):",
+ tag, session->req_digest_length);
+#endif
+ if (memcmp(tag, digest, session->req_digest_length) != 0)
+ op->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
+
+ }
+
+}
+
+/**
+ * Process a completed Chacha20_poly1305 request
+ *
+ * @param qp Queue Pair to process
+ * @param op Crypto operation
+ * @param sess Crypto session
+ *
+ * @return
+ * - void
+ */
+static void
+handle_completed_chacha20_poly1305_crypto_op(struct ipsec_mb_qp *qp,
+ struct rte_crypto_op *op,
+ struct chacha20_poly1305_session *sess)
+{
+ post_process_chacha20_poly1305_crypto_op(qp, op, sess);
+
+ /* Free session if a session-less crypto op */
+ if (op->sess_type == RTE_CRYPTO_OP_SESSIONLESS) {
+ memset(sess, 0, sizeof(struct chacha20_poly1305_session));
+ memset(op->sym->session, 0,
+ rte_cryptodev_sym_get_existing_header_session_size(
+ op->sym->session));
+ rte_mempool_put(qp->sess_mp_priv, sess);
+ rte_mempool_put(qp->sess_mp, op->sym->session);
+ op->sym->session = NULL;
+ }
+}
+
+static uint16_t
+chacha20_poly1305_pmd_dequeue_burst(void *queue_pair,
+ struct rte_crypto_op **ops, uint16_t nb_ops)
+{
+ struct chacha20_poly1305_session *sess;
+ struct ipsec_mb_qp *qp = queue_pair;
+
+ int retval = 0;
+ unsigned int i = 0, nb_dequeued;
+
+ nb_dequeued = rte_ring_dequeue_burst(qp->ingress_queue,
+ (void **)ops, nb_ops, NULL);
+
+ for (i = 0; i < nb_dequeued; i++) {
+
+ sess = ipsec_mb_get_session_private(qp, ops[i]);
+ if (unlikely(sess == NULL)) {
+ ops[i]->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
+ qp->stats.dequeue_err_count++;
+ break;
+ }
+
+ retval = chacha20_poly1305_crypto_op(qp, ops[i], sess);
+ if (retval < 0) {
+ ops[i]->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
+ qp->stats.dequeue_err_count++;
+ break;
+ }
+
+ handle_completed_chacha20_poly1305_crypto_op(qp, ops[i], sess);
+ }
+
+ qp->stats.dequeued_count += i;
+
+ return i;
+}
+
+struct rte_cryptodev_ops chacha20_poly1305_pmd_ops = {
+ .dev_configure = ipsec_mb_pmd_config,
+ .dev_start = ipsec_mb_pmd_start,
+ .dev_stop = ipsec_mb_pmd_stop,
+ .dev_close = ipsec_mb_pmd_close,
+
+ .stats_get = ipsec_mb_pmd_stats_get,
+ .stats_reset = ipsec_mb_pmd_stats_reset,
+
+ .dev_infos_get = ipsec_mb_pmd_info_get,
+
+ .queue_pair_setup = ipsec_mb_pmd_qp_setup,
+ .queue_pair_release = ipsec_mb_pmd_qp_release,
+
+ .sym_session_get_size = ipsec_mb_pmd_sym_session_get_size,
+ .sym_session_configure = ipsec_mb_pmd_sym_session_configure,
+ .sym_session_clear = ipsec_mb_pmd_sym_session_clear
+};
+
+struct rte_cryptodev_ops *rte_chacha20_poly1305_pmd_ops =
+ &chacha20_poly1305_pmd_ops;
+
+static int
+cryptodev_chacha20_poly1305_probe(struct rte_vdev_device *vdev)
+{
+ return cryptodev_ipsec_mb_create(vdev,
+ IPSEC_MB_PMD_TYPE_CHACHA20_POLY1305);
+}
+
+static struct rte_vdev_driver cryptodev_chacha20_poly1305_pmd_drv = {
+ .probe = cryptodev_chacha20_poly1305_probe,
+ .remove = cryptodev_ipsec_mb_remove
+};
+
+static struct cryptodev_driver chacha20_poly1305_crypto_drv;
+
+RTE_PMD_REGISTER_VDEV(CRYPTODEV_NAME_CHACHA20_POLY1305_PMD,
+ cryptodev_chacha20_poly1305_pmd_drv);
+RTE_PMD_REGISTER_ALIAS(CRYPTODEV_NAME_CHACHA20_POLY1305_PMD,
+ cryptodev_chacha20_poly1305_pmd);
+RTE_PMD_REGISTER_PARAM_STRING(CRYPTODEV_NAME_CHACHA20_POLY1305_PMD,
+ "max_nb_queue_pairs=<int> socket_id=<int>");
+RTE_PMD_REGISTER_CRYPTO_DRIVER(chacha20_poly1305_crypto_drv,
+ cryptodev_chacha20_poly1305_pmd_drv.driver,
+ pmd_driver_id_chacha20_poly1305);
+
+/* Constructor function to register chacha20_poly1305 PMD */
+RTE_INIT(ipsec_mb_register_chacha20_poly1305)
+{
+ struct ipsec_mb_pmd_data *chacha_poly_data
+ = &ipsec_mb_pmds[IPSEC_MB_PMD_TYPE_CHACHA20_POLY1305];
+
+ chacha_poly_data->caps = chacha20_poly1305_capabilities;
+ chacha_poly_data->dequeue_burst = chacha20_poly1305_pmd_dequeue_burst;
+ chacha_poly_data->feature_flags =
+ RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
+ RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
+ RTE_CRYPTODEV_FF_IN_PLACE_SGL |
+ RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
+ RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT |
+ RTE_CRYPTODEV_FF_SYM_CPU_CRYPTO |
+ RTE_CRYPTODEV_FF_SYM_SESSIONLESS;
+ chacha_poly_data->internals_priv_size = 0;
+ chacha_poly_data->ops = &chacha20_poly1305_pmd_ops;
+ chacha_poly_data->qp_priv_size =
+ sizeof(struct chacha20_poly1305_qp_data);
+ chacha_poly_data->session_configure =
+ chacha20_poly1305_session_configure;
+ chacha_poly_data->session_priv_size =
+ sizeof(struct chacha20_poly1305_session);
+}
diff --git a/drivers/crypto/ipsec_mb/rte_ipsec_mb_pmd_private.h b/drivers/crypto/ipsec_mb/rte_ipsec_mb_pmd_private.h
index b6a98a85ba..db36584f3a 100644
--- a/drivers/crypto/ipsec_mb/rte_ipsec_mb_pmd_private.h
+++ b/drivers/crypto/ipsec_mb/rte_ipsec_mb_pmd_private.h
@@ -49,6 +49,9 @@ extern RTE_DEFINE_PER_LCORE(IMB_MGR *, mb_mgr);
#define CRYPTODEV_NAME_ZUC_PMD crypto_zuc
/**< IPSEC Multi buffer PMD zuc device name */
+#define CRYPTODEV_NAME_CHACHA20_POLY1305_PMD crypto_chacha20_poly1305
+/**< IPSEC Multi buffer PMD chacha20_poly1305 device name */
+
/** PMD LOGTYPE DRIVER, common to all PMDs */
extern int ipsec_mb_logtype_driver;
#define IPSEC_MB_LOG(level, fmt, ...) \
@@ -62,6 +65,7 @@ enum ipsec_mb_pmd_types {
IPSEC_MB_PMD_TYPE_KASUMI,
IPSEC_MB_PMD_TYPE_SNOW3G,
IPSEC_MB_PMD_TYPE_ZUC,
+ IPSEC_MB_PMD_TYPE_CHACHA20_POLY1305,
IPSEC_MB_N_PMD_TYPES
};
@@ -85,6 +89,7 @@ extern uint8_t pmd_driver_id_aesni_gcm;
extern uint8_t pmd_driver_id_kasumi;
extern uint8_t pmd_driver_id_snow3g;
extern uint8_t pmd_driver_id_zuc;
+extern uint8_t pmd_driver_id_chacha20_poly1305;
/** Helper function. Gets driver ID based on PMD type */
static __rte_always_inline uint8_t
@@ -101,6 +106,8 @@ ipsec_mb_get_driver_id(enum ipsec_mb_pmd_types pmd_type)
return pmd_driver_id_snow3g;
case IPSEC_MB_PMD_TYPE_ZUC:
return pmd_driver_id_zuc;
+ case IPSEC_MB_PMD_TYPE_CHACHA20_POLY1305:
+ return pmd_driver_id_chacha20_poly1305;
default:
break;
}
--
2.25.1
next prev parent reply other threads:[~2021-09-29 16:32 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-05 17:15 [dpdk-dev] [dpdk-dev v1] crypto/snow3g: add support for digest appended ops Kai Ji
2021-05-08 12:57 ` [dpdk-dev] [EXT] " Akhil Goyal
2021-05-10 9:50 ` [dpdk-dev] [dpdk-dev v2] " Kai Ji
2021-06-29 20:14 ` [dpdk-dev] [EXT] " Akhil Goyal
2021-06-30 12:08 ` Zhang, Roy Fan
2021-07-06 19:48 ` Akhil Goyal
2021-07-21 9:22 ` [dpdk-dev] [dpdk-dev v3] " Kai Ji
2021-07-27 8:38 ` [dpdk-dev] [dpdk-dev v4] " Fan Zhang
2021-09-29 16:30 ` [dpdk-dev] [PATCH v3 00/10] drivers/crypto: introduce ipsec_mb framework Ciara Power
2021-09-29 16:30 ` [dpdk-dev] [PATCH v3 01/10] drivers/crypto: introduce IPsec-mb framework Ciara Power
2021-09-30 9:51 ` Kinsella, Ray
2021-10-06 13:50 ` [dpdk-dev] [EXT] " Akhil Goyal
2021-10-06 15:45 ` Power, Ciara
2021-10-06 17:34 ` Akhil Goyal
2021-09-29 16:30 ` [dpdk-dev] [PATCH v3 02/10] crypto/ipsec_mb: add multiprocess support Ciara Power
2021-10-06 14:01 ` [dpdk-dev] [EXT] " Akhil Goyal
2021-09-29 16:30 ` [dpdk-dev] [PATCH v3 03/10] drivers/crypto: move aesni-mb PMD to IPsec-mb framework Ciara Power
2021-10-11 11:09 ` De Lara Guarch, Pablo
2021-09-29 16:30 ` [dpdk-dev] [PATCH v3 04/10] drivers/crypto: move aesni-gcm " Ciara Power
2021-10-06 14:31 ` [dpdk-dev] [EXT] " Akhil Goyal
2021-09-29 16:30 ` [dpdk-dev] [PATCH v3 05/10] drivers/crypto: move kasumi " Ciara Power
2021-09-29 16:30 ` [dpdk-dev] [PATCH v3 06/10] drivers/crypto: move snow3g " Ciara Power
2021-10-04 12:45 ` De Lara Guarch, Pablo
2021-09-29 16:30 ` [dpdk-dev] [PATCH v3 07/10] crypto/ipsec_mb: add snow3g digest appended ops support Ciara Power
2021-09-29 16:30 ` [dpdk-dev] [PATCH v3 08/10] drivers/crypto: move zuc PMD to IPsec-mb framework Ciara Power
2021-09-29 16:30 ` Ciara Power [this message]
2021-10-06 14:48 ` [dpdk-dev] [EXT] [PATCH v3 09/10] crypto/ipsec_mb: add chacha20-poly1305 PMD to framework Akhil Goyal
2021-10-07 15:07 ` Ji, Kai
2021-10-07 15:22 ` Akhil Goyal
2021-09-29 16:30 ` [dpdk-dev] [PATCH v3 10/10] doc/rel_notes: added note for SW Crypto PMD change Ciara Power
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