From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 757B5A0C41; Thu, 30 Sep 2021 11:10:56 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 48F334113F; Thu, 30 Sep 2021 11:09:35 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 9DFB94116A for ; Thu, 30 Sep 2021 11:09:31 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 18U1KS9R001373 for ; Thu, 30 Sep 2021 02:09:31 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=l2R2fYRz8yUWcAs8owRnnuyERxH4xZ5Xz3VSX4Iy/fw=; b=YiTLLXP8ANoNuztUNDnSEn8q6vOZqaC4FPCw45Cs3x74643tP2xPsezG7rp3d0DgA8f/ 7n0EJ4WK5PDCL72IUmJ2QI1SNMW4Rk9vm/r+zz3ap4O2RoKSZE67gWo41NrMevD2jgIj QY93SQDnv7tk+z2HlwEt0UkgI/2y9hdpSNCtJ1R1/DSFErX3KwGmpqCN5u2SSX7EccxP GZm0T8fPdCoRW3y3Otk/0rgbS8Wc5cAFibRGb7QFHpZ3hYv5H0YMUaI7Un8GuehYwUSE S3YJI+OG2KhPpQL67Nw1nnQbFlL1YI5/7YKOHgZ5cpPSvHnP225YoMktDNK4mDZYjAR6 BA== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com with ESMTP id 3bd3g39ken-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Thu, 30 Sep 2021 02:09:30 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 30 Sep 2021 02:09:28 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Thu, 30 Sep 2021 02:09:28 -0700 Received: from localhost.localdomain (unknown [10.28.34.25]) by maili.marvell.com (Postfix) with ESMTP id 85B123F7068; Thu, 30 Sep 2021 02:09:26 -0700 (PDT) From: To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , Rakesh Kudurumalla Date: Thu, 30 Sep 2021 14:38:34 +0530 Message-ID: <20210930090844.1059326-17-skori@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210930090844.1059326-1-skori@marvell.com> References: <20210927082223.757436-1-skori@marvell.com> <20210930090844.1059326-1-skori@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: 2JLVFQyW2OKsrRSJ8pDChowr_whjpokQ X-Proofpoint-ORIG-GUID: 2JLVFQyW2OKsrRSJ8pDChowr_whjpokQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475 definitions=2021-09-30_02,2021-09-29_01,2020-04-07_01 Subject: [dpdk-dev] [PATCH v3 17/27] net/cnxk: support ops to create meter profile X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Sunil Kumar Kori Implement API to add meter profile for CN10K platform. Signed-off-by: Sunil Kumar Kori Signed-off-by: Rakesh Kudurumalla --- v3: - Rebase support on latest DPDK - Handled multilevel chaining for tree hierarchy - Fix naming convention v2: - Rebase support on latest DPDK - Handled multilevel chaining for linear hierarchy - Review comments incorporated drivers/net/cnxk/cn10k_ethdev_mtr.c | 138 ++++++++++++++++++++++++++++ drivers/net/cnxk/cnxk_ethdev.c | 14 +++ drivers/net/cnxk/cnxk_ethdev.h | 13 +++ 3 files changed, 165 insertions(+) diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c b/drivers/net/cnxk/cn10k_ethdev_mtr.c index a1b42831a5..69efe395b5 100644 --- a/drivers/net/cnxk/cn10k_ethdev_mtr.c +++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c @@ -37,6 +37,106 @@ static struct rte_mtr_capabilities mtr_capa = { RTE_MTR_STATS_N_BYTES_YELLOW | RTE_MTR_STATS_N_BYTES_RED | RTE_MTR_STATS_N_BYTES_DROPPED}; +static struct cnxk_mtr_profile_node * +nix_mtr_profile_find(struct cnxk_eth_dev *dev, uint32_t profile_id) +{ + struct cnxk_mtr_profiles *fmps = &dev->mtr_profiles; + struct cnxk_mtr_profile_node *fmp; + + TAILQ_FOREACH(fmp, fmps, next) + if (profile_id == fmp->id) + return fmp; + + return NULL; +} + +static int +nix_mtr_profile_validate(struct cnxk_eth_dev *dev, uint32_t profile_id, + struct rte_mtr_meter_profile *profile, + struct rte_mtr_error *error) +{ + int rc = 0; + + PLT_SET_USED(dev); + + if (profile == NULL) + return -rte_mtr_error_set(error, EINVAL, + RTE_MTR_ERROR_TYPE_METER_PROFILE, + NULL, "Meter profile is null."); + + if (profile_id == UINT32_MAX) + return -rte_mtr_error_set(error, EINVAL, + RTE_MTR_ERROR_TYPE_METER_PROFILE_ID, + NULL, "Meter profile id not valid."); + + switch (profile->alg) { + case RTE_MTR_SRTCM_RFC2697: + if (profile->srtcm_rfc2697.cir > mtr_capa.meter_rate_max) + rc = -rte_mtr_error_set(error, EINVAL, + RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL, + "CIR exceeds max meter rate"); + + if (profile->srtcm_rfc2697.cbs > NIX_BPF_BURST_MAX) + rc = -rte_mtr_error_set(error, EINVAL, + RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL, + "CBS exceeds max meter burst size"); + + if (profile->srtcm_rfc2697.ebs > NIX_BPF_BURST_MAX) + rc = -rte_mtr_error_set(error, EINVAL, + RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL, + "EBS exceeds max meter burst size"); + break; + + case RTE_MTR_TRTCM_RFC2698: + if (profile->trtcm_rfc2698.cir > mtr_capa.meter_rate_max) + rc = -rte_mtr_error_set(error, EINVAL, + RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL, + "CIR exceeds max meter rate"); + + if (profile->trtcm_rfc2698.pir > mtr_capa.meter_rate_max) + rc = -rte_mtr_error_set(error, EINVAL, + RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL, + "PIR exceeds max meter rate"); + + if (profile->trtcm_rfc2698.cbs > NIX_BPF_BURST_MAX) + rc = -rte_mtr_error_set(error, EINVAL, + RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL, + "CBS exceeds max meter burst size"); + + if (profile->trtcm_rfc2698.pbs > NIX_BPF_BURST_MAX) + rc = -rte_mtr_error_set(error, EINVAL, + RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL, + "PBS exceeds max meter burst size"); + break; + + case RTE_MTR_TRTCM_RFC4115: + if ((profile->trtcm_rfc4115.cir + profile->trtcm_rfc4115.eir) > + mtr_capa.meter_rate_max) + rc = -rte_mtr_error_set(error, EINVAL, + RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL, + "PIR + EIR exceeds max rate"); + + if (profile->trtcm_rfc4115.cbs > NIX_BPF_BURST_MAX) + rc = -rte_mtr_error_set(error, EINVAL, + RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL, + "CBS exceeds max meter burst size"); + + if (profile->trtcm_rfc4115.ebs > NIX_BPF_BURST_MAX) + rc = -rte_mtr_error_set(error, EINVAL, + RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL, + "PBS exceeds max meter burst size"); + break; + + default: + rc = -rte_mtr_error_set(error, EINVAL, + RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL, + "alg is invalid"); + break; + } + + return rc; +} + static int cn10k_nix_mtr_capabilities_get(struct rte_eth_dev *dev, struct rte_mtr_capabilities *capa, @@ -52,8 +152,46 @@ cn10k_nix_mtr_capabilities_get(struct rte_eth_dev *dev, return 0; } +static int +cn10k_nix_mtr_profile_add(struct rte_eth_dev *eth_dev, uint32_t profile_id, + struct rte_mtr_meter_profile *profile, + struct rte_mtr_error *error) +{ + struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev); + struct cnxk_mtr_profiles *fmps = &dev->mtr_profiles; + struct cnxk_mtr_profile_node *fmp; + int ret; + + /* Check input params. */ + ret = nix_mtr_profile_validate(dev, profile_id, profile, error); + if (ret) + return ret; + + fmp = nix_mtr_profile_find(dev, profile_id); + if (fmp) { + return -rte_mtr_error_set(error, EEXIST, + RTE_MTR_ERROR_TYPE_METER_PROFILE_ID, + NULL, "Profile already exist"); + } + + fmp = plt_zmalloc(sizeof(struct cnxk_mtr_profile_node), ROC_ALIGN); + if (fmp == NULL) + return -rte_mtr_error_set(error, ENOMEM, + RTE_MTR_ERROR_TYPE_UNSPECIFIED, NULL, + "Meter profile memory " + "alloc failed."); + + fmp->id = profile_id; + fmp->profile = *profile; + + TAILQ_INSERT_TAIL(fmps, fmp, next); + + return 0; +} + const struct rte_mtr_ops nix_mtr_ops = { .capabilities_get = cn10k_nix_mtr_capabilities_get, + .meter_profile_add = cn10k_nix_mtr_profile_add, }; int diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c index 7152dcd002..e952aa5ec5 100644 --- a/drivers/net/cnxk/cnxk_ethdev.c +++ b/drivers/net/cnxk/cnxk_ethdev.c @@ -504,6 +504,14 @@ nix_free_queue_mem(struct cnxk_eth_dev *dev) dev->sqs = NULL; } +static int +nix_ingress_policer_setup(struct cnxk_eth_dev *dev) +{ + TAILQ_INIT(&dev->mtr_profiles); + + return 0; +} + static int nix_rss_default_setup(struct cnxk_eth_dev *dev) { @@ -901,6 +909,12 @@ cnxk_nix_configure(struct rte_eth_dev *eth_dev) goto free_nix_lf; } + rc = nix_ingress_policer_setup(dev); + if (rc) { + plt_err("Failed to setup ingress policer rc=%d", rc); + goto free_nix_lf; + } + rc = roc_nix_tm_hierarchy_enable(nix, ROC_NIX_TM_DEFAULT, false); if (rc) { plt_err("Failed to enable default tm hierarchy, rc=%d", rc); diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h index 27920c84f2..2b9b5beb83 100644 --- a/drivers/net/cnxk/cnxk_ethdev.h +++ b/drivers/net/cnxk/cnxk_ethdev.h @@ -13,6 +13,7 @@ #include #include #include +#include #include #include "roc_api.h" @@ -144,6 +145,15 @@ struct cnxk_timesync_info { uint64_t *tx_tstamp; } __plt_cache_aligned; +struct cnxk_mtr_profile_node { + TAILQ_ENTRY(cnxk_mtr_profile_node) next; + struct rte_mtr_meter_profile profile; /**< Profile detail. */ + uint32_t ref_cnt; /**< Use count. */ + uint32_t id; /**< Profile id. */ +}; + +TAILQ_HEAD(cnxk_mtr_profiles, cnxk_mtr_profile_node); + struct cnxk_eth_dev { /* ROC NIX */ struct roc_nix nix; @@ -211,6 +221,9 @@ struct cnxk_eth_dev { double clk_freq_mult; uint64_t clk_delta; + /* Ingress policer */ + struct cnxk_mtr_profiles mtr_profiles; + /* Rx burst for cleanup(Only Primary) */ eth_rx_burst_t rx_pkt_burst_no_offload; -- 2.25.1