From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A98F3A0032; Fri, 1 Oct 2021 15:41:56 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 60734411DB; Fri, 1 Oct 2021 15:41:03 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id A7C68411D6 for ; Fri, 1 Oct 2021 15:41:01 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 1917jVUH004455 for ; Fri, 1 Oct 2021 06:41:00 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=h0r1o2McMhA5PUxp/Qfh+jSIOtCl574A6nIwcQlzzW0=; b=IOQrStzf5Vl1c131Y6iIwf0EXNmpXRdeuPgTtaGBBcAiCtOQJbKLDbKcylHrhKWEnLeG 2cimRspe9Bj22cNoAB4Q6JVVC4VTHRmzWPVE13zS3qOoXc1lOqKluQGkyltk/QvOrwy9 w8KgpXY4MpvzndYn8wM/h+749pgkXvGbbBpr+uiZACSO7eE0AMel0sGX0dERgtZHMnXQ umHx5EC9kypKe8j81bvNGpuM17dmGYPASckRY9g0LGVd8HPGTN4k+4j/xDU1J8DmMsv7 OPQzZERkewtuRI9pmyq7TNTbCKr5a98tkndb9l007shCDHNcdEdxcDrwXYZbFCOYkUBV nw== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com with ESMTP id 3bdx7g13gr-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 01 Oct 2021 06:41:00 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Fri, 1 Oct 2021 06:40:59 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Fri, 1 Oct 2021 06:40:59 -0700 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 4256D3F7043; Fri, 1 Oct 2021 06:40:57 -0700 (PDT) From: Nithin Dabilpuram To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao CC: , Kommula Shiva Shankar Date: Fri, 1 Oct 2021 19:10:06 +0530 Message-ID: <20211001134022.22700-13-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20211001134022.22700-1-ndabilpuram@marvell.com> References: <20210902021505.17607-1-ndabilpuram@marvell.com> <20211001134022.22700-1-ndabilpuram@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-GUID: mWOEA4rBLstJF5xm_Ha-J89xeRN32HOU X-Proofpoint-ORIG-GUID: mWOEA4rBLstJF5xm_Ha-J89xeRN32HOU X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475 definitions=2021-10-01_02,2021-10-01_02,2020-04-07_01 Subject: [dpdk-dev] [PATCH v3 12/28] common/cnxk: add CQ enable support in NIX Tx path X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Kommula Shiva Shankar This patch provides applications to add CQ support in Tx path. This enables packet completion events on CQ for requested packets. Signed-off-by: Kommula Shiva Shankar --- drivers/common/cnxk/roc_nix.h | 2 ++ drivers/common/cnxk/roc_nix_queue.c | 4 ++++ 2 files changed, 6 insertions(+) diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h index 4fcce49..b06895a 100644 --- a/drivers/common/cnxk/roc_nix.h +++ b/drivers/common/cnxk/roc_nix.h @@ -194,7 +194,9 @@ struct roc_nix_sq { enum roc_nix_sq_max_sqe_sz max_sqe_sz; uint32_t nb_desc; uint16_t qid; + uint16_t cqid; bool sso_ena; + bool cq_ena; /* End of Input parameters */ uint16_t sqes_per_sqb_log2; struct roc_nix *roc_nix; diff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c index a8a713a..cba1294 100644 --- a/drivers/common/cnxk/roc_nix_queue.c +++ b/drivers/common/cnxk/roc_nix_queue.c @@ -661,6 +661,8 @@ sq_cn9k_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum, aq->sq.sqe_stype = NIX_STYPE_STF; aq->sq.ena = 1; aq->sq.sso_ena = !!sq->sso_ena; + aq->sq.cq_ena = !!sq->cq_ena; + aq->sq.cq = sq->cqid; if (aq->sq.max_sqe_size == NIX_MAXSQESZ_W8) aq->sq.sqe_stype = NIX_STYPE_STP; aq->sq.sqb_aura = roc_npa_aura_handle_to_aura(sq->aura_handle); @@ -759,6 +761,8 @@ sq_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum, aq->sq.sqe_stype = NIX_STYPE_STF; aq->sq.ena = 1; aq->sq.sso_ena = !!sq->sso_ena; + aq->sq.cq_ena = !!sq->cq_ena; + aq->sq.cq = sq->cqid; if (aq->sq.max_sqe_size == NIX_MAXSQESZ_W8) aq->sq.sqe_stype = NIX_STYPE_STP; aq->sq.sqb_aura = roc_npa_aura_handle_to_aura(sq->aura_handle); -- 2.8.4