From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 69087A034F; Mon, 11 Oct 2021 17:51:43 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 69FE441166; Mon, 11 Oct 2021 17:51:22 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 88E1F41164 for ; Mon, 11 Oct 2021 17:51:20 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 19BE6eNe030296; Mon, 11 Oct 2021 08:51:17 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=NUJYu3EX0HP3/gquf+TjgHfdBlOD9TdqzFW2aONxlpw=; b=ekbJjGPuHoRvPo2MV4dfxGI7jX4B4p7EBc12LeSeSwubvEkFqkbV1WLuZVxLF8PkesgW o7SZ5Qu2pvdXyNBTQ+frm5R4PCZusQuoj5y+zw83np5ioTWqpNh9hu1FaO0phrI1nfN/ 6uAI1wvopNByXbGRdp7Yha7c6SpnJ/5crnCnEmHCDdqGrvHqscuNMYpWdQhO+nh1KT7E fR6CdXnIMc4gAYLFT9IeOW551a/EbEPGPRNwX7Uu7M40vyNEFHE/5HVKmxyfRLovwG50 UFyhp+KaN6al4XTA6qU6z+2O/wBi8jQU0AIbERAWVOS8u4vXB8uHstfD0YYZfiwcO0L9 PQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com with ESMTP id 3bmpqt0gh7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 11 Oct 2021 08:51:17 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 11 Oct 2021 08:51:15 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Mon, 11 Oct 2021 08:51:15 -0700 Received: from localhost.localdomain (unknown [10.28.34.25]) by maili.marvell.com (Postfix) with ESMTP id 04A603F7079; Mon, 11 Oct 2021 08:51:13 -0700 (PDT) From: To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Ray Kinsella CC: Date: Mon, 11 Oct 2021 21:20:34 +0530 Message-ID: <20211011155057.302142-7-skori@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211011155057.302142-1-skori@marvell.com> References: <20210930090844.1059326-1-skori@marvell.com> <20211011155057.302142-1-skori@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: X1Svf7mBHmc0NnOzI4TezLNuemeSboMo X-Proofpoint-GUID: X1Svf7mBHmc0NnOzI4TezLNuemeSboMo X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-10-11_05,2021-10-11_01,2020-04-07_01 Subject: [dpdk-dev] [PATCH v4 06/28] common/cnxk: support RoC API to configure bandwidth profile X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Sunil Kumar Kori Implement RoC API to configure HW bandwidth profile for CN10K platform. Signed-off-by: Sunil Kumar Kori --- v4: - Rebase support on dpdk-next-net-mrvl branch - Handled meter action during flow destroy - Handled meter cleanup during port shutdown v3: - Rebase support on latest DPDK - Handled multilevel chaining for tree hierarchy - Fix naming convention v2: - Rebase support on latest DPDK - Handled multilevel chaining for linear hierarchy - Review comments incorporated drivers/common/cnxk/hw/nix.h | 49 ++++++ drivers/common/cnxk/roc_nix.h | 63 ++++++++ drivers/common/cnxk/roc_nix_bpf.c | 239 ++++++++++++++++++++++++++++++ drivers/common/cnxk/version.map | 1 + 4 files changed, 352 insertions(+) diff --git a/drivers/common/cnxk/hw/nix.h b/drivers/common/cnxk/hw/nix.h index 7685b7dc1b..b9e65c942f 100644 --- a/drivers/common/cnxk/hw/nix.h +++ b/drivers/common/cnxk/hw/nix.h @@ -2113,6 +2113,55 @@ struct nix_lso_format { #define NIX_RPM_MAX_HW_FRS 16380UL #define NIX_MIN_HW_FRS 60UL +/** NIX policer rate limits */ +#define NIX_BPF_MAX_RATE_DIV_EXP 12 +#define NIX_BPF_MAX_RATE_EXPONENT 0xf +#define NIX_BPF_MAX_RATE_MANTISSA 0xff + +#define NIX_BPF_RATE_CONST 2000000ULL + +/* NIX rate calculation in Bits/Sec + * PIR_ADD = ((256 + NIX_*_PIR[RATE_MANTISSA]) + * << NIX_*_PIR[RATE_EXPONENT]) / 256 + * PIR = (2E6 * PIR_ADD / (1 << NIX_*_PIR[RATE_DIVIDER_EXPONENT])) + * + * CIR_ADD = ((256 + NIX_*_CIR[RATE_MANTISSA]) + * << NIX_*_CIR[RATE_EXPONENT]) / 256 + * CIR = (2E6 * CIR_ADD / (CCLK_TICKS << NIX_*_CIR[RATE_DIVIDER_EXPONENT])) + */ +#define NIX_BPF_RATE(exponent, mantissa, div_exp) \ + ((NIX_BPF_RATE_CONST * ((256 + (mantissa)) << (exponent))) / \ + (((1ull << (div_exp)) * 256))) + +/* Meter rate limits in Bits/Sec */ +#define NIX_BPF_RATE_MIN NIX_BPF_RATE(0, 0, NIX_BPF_MAX_RATE_DIV_EXP) +#define NIX_BPF_RATE_MAX \ + NIX_BPF_RATE(NIX_BPF_MAX_RATE_EXPONENT, NIX_BPF_MAX_RATE_MANTISSA, 0) + +#define NIX_BPF_DEFAULT_ADJUST_MANTISSA 511 +#define NIX_BPF_DEFAULT_ADJUST_EXPONENT 0 + +/** NIX burst limits */ +#define NIX_BPF_MAX_BURST_EXPONENT 0xf +#define NIX_BPF_MAX_BURST_MANTISSA 0xff + +/* NIX burst calculation + * PIR_BURST = ((256 + NIX_*_PIR[BURST_MANTISSA]) + * << (NIX_*_PIR[BURST_EXPONENT] + 1)) + * / 256 + * + * CIR_BURST = ((256 + NIX_*_CIR[BURST_MANTISSA]) + * << (NIX_*_CIR[BURST_EXPONENT] + 1)) + * / 256 + */ +#define NIX_BPF_BURST(exponent, mantissa) \ + (((256 + (mantissa)) << ((exponent) + 1)) / 256) + +/** Meter burst limits */ +#define NIX_BPF_BURST_MIN NIX_BPF_BURST(0, 0) +#define NIX_BPF_BURST_MAX \ + NIX_BPF_BURST(NIX_BPF_MAX_BURST_EXPONENT, NIX_BPF_MAX_BURST_MANTISSA) + /* NIX rate limits */ #define NIX_TM_MAX_RATE_DIV_EXP 12 #define NIX_TM_MAX_RATE_EXPONENT 0xf diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h index a5642337b2..c2cc823516 100644 --- a/drivers/common/cnxk/roc_nix.h +++ b/drivers/common/cnxk/roc_nix.h @@ -39,6 +39,65 @@ enum roc_nix_bpf_level_flag { ROC_NIX_BPF_LEVEL_F_TOP = BIT(2), }; +enum roc_nix_bpf_color { + ROC_NIX_BPF_COLOR_GREEN, + ROC_NIX_BPF_COLOR_YELLOW, + ROC_NIX_BPF_COLOR_RED, + ROC_NIX_BPF_COLOR_MAX +}; + +enum roc_nix_bpf_algo { + ROC_NIX_BPF_ALGO_NONE, + ROC_NIX_BPF_ALGO_2698, + ROC_NIX_BPF_ALGO_4115, + ROC_NIX_BPF_ALGO_2697 +}; + +enum roc_nix_bpf_lmode { ROC_NIX_BPF_LMODE_BYTE, ROC_NIX_BPF_LMODE_PACKET }; + +enum roc_nix_bpf_action { + ROC_NIX_BPF_ACTION_PASS, + ROC_NIX_BPF_ACTION_DROP, + ROC_NIX_BPF_ACTION_RED +}; + +struct roc_nix_bpf_cfg { + enum roc_nix_bpf_algo alg; + enum roc_nix_bpf_lmode lmode; + enum roc_nix_bpf_color icolor; + enum roc_nix_bpf_pc_mode pc_mode; + bool tnl_ena; + union { + /* Valid when *alg* is set to ROC_NIX_BPF_ALGO_2697. */ + struct { + uint64_t cir; + uint64_t cbs; + uint64_t ebs; + } algo2697; + + /* Valid when *alg* is set to ROC_NIX_BPF_ALGO_2698. */ + struct { + uint64_t cir; + uint64_t pir; + uint64_t cbs; + uint64_t pbs; + } algo2698; + + /* Valid when *alg* is set to ROC_NIX_BPF_ALGO_4115. */ + struct { + uint64_t cir; + uint64_t eir; + uint64_t cbs; + uint64_t ebs; + } algo4115; + }; + + enum roc_nix_bpf_action action[ROC_NIX_BPF_COLOR_MAX]; + + /* Reserved for future config*/ + uint32_t rsvd[3]; +}; + struct roc_nix_bpf_objs { uint16_t level; uint16_t count; @@ -539,6 +598,10 @@ int __roc_api roc_nix_bpf_free(struct roc_nix *roc_nix, int __roc_api roc_nix_bpf_free_all(struct roc_nix *roc_nix); +int __roc_api roc_nix_bpf_config(struct roc_nix *roc_nix, uint16_t id, + enum roc_nix_bpf_level_flag lvl_flag, + struct roc_nix_bpf_cfg *cfg); + uint8_t __roc_api roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag); diff --git a/drivers/common/cnxk/roc_nix_bpf.c b/drivers/common/cnxk/roc_nix_bpf.c index 41d31bc6cd..aa5829ee42 100644 --- a/drivers/common/cnxk/roc_nix_bpf.c +++ b/drivers/common/cnxk/roc_nix_bpf.c @@ -26,6 +26,105 @@ get_mbox(struct roc_nix *roc_nix) return dev->mbox; } +static inline uint64_t +meter_rate_to_nix(uint64_t value, uint64_t *exponent_p, uint64_t *mantissa_p, + uint64_t *div_exp_p) +{ + uint64_t div_exp, exponent, mantissa; + + /* Boundary checks */ + if (value < NIX_BPF_RATE_MIN || value > NIX_BPF_RATE_MAX) + return 0; + + if (value <= NIX_BPF_RATE(0, 0, 0)) { + /* Calculate rate div_exp and mantissa using + * the following formula: + * + * value = (2E6 * (256 + mantissa) + * / ((1 << div_exp) * 256)) + */ + div_exp = 0; + exponent = 0; + mantissa = NIX_BPF_MAX_RATE_MANTISSA; + + while (value < (NIX_BPF_RATE_CONST / (1 << div_exp))) + div_exp += 1; + + while (value < ((NIX_BPF_RATE_CONST * (256 + mantissa)) / + ((1 << div_exp) * 256))) + mantissa -= 1; + } else { + /* Calculate rate exponent and mantissa using + * the following formula: + * + * value = (2E6 * ((256 + mantissa) << exponent)) / 256 + * + */ + div_exp = 0; + exponent = NIX_BPF_MAX_RATE_EXPONENT; + mantissa = NIX_BPF_MAX_RATE_MANTISSA; + + while (value < (NIX_BPF_RATE_CONST * (1 << exponent))) + exponent -= 1; + + while (value < + ((NIX_BPF_RATE_CONST * ((256 + mantissa) << exponent)) / + 256)) + mantissa -= 1; + } + + if (div_exp > NIX_BPF_MAX_RATE_DIV_EXP || + exponent > NIX_BPF_MAX_RATE_EXPONENT || + mantissa > NIX_BPF_MAX_RATE_MANTISSA) + return 0; + + if (div_exp_p) + *div_exp_p = div_exp; + if (exponent_p) + *exponent_p = exponent; + if (mantissa_p) + *mantissa_p = mantissa; + + /* Calculate real rate value */ + return NIX_BPF_RATE(exponent, mantissa, div_exp); +} + +static inline uint64_t +meter_burst_to_nix(uint64_t value, uint64_t *exponent_p, uint64_t *mantissa_p) +{ + uint64_t exponent, mantissa; + + if (value < NIX_BPF_BURST_MIN || value > NIX_BPF_BURST_MAX) + return 0; + + /* Calculate burst exponent and mantissa using + * the following formula: + * + * value = (((256 + mantissa) << (exponent + 1) + / 256) + * + */ + exponent = NIX_BPF_MAX_BURST_EXPONENT; + mantissa = NIX_BPF_MAX_BURST_MANTISSA; + + while (value < (1ull << (exponent + 1))) + exponent -= 1; + + while (value < ((256 + mantissa) << (exponent + 1)) / 256) + mantissa -= 1; + + if (exponent > NIX_BPF_MAX_BURST_EXPONENT || + mantissa > NIX_BPF_MAX_BURST_MANTISSA) + return 0; + + if (exponent_p) + *exponent_p = exponent; + if (mantissa_p) + *mantissa_p = mantissa; + + return NIX_BPF_BURST(exponent, mantissa); +} + uint8_t roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag level_f) { @@ -210,3 +309,143 @@ roc_nix_bpf_free_all(struct roc_nix *roc_nix) req->free_all = true; return mbox_process(mbox); } + +int +roc_nix_bpf_config(struct roc_nix *roc_nix, uint16_t id, + enum roc_nix_bpf_level_flag lvl_flag, + struct roc_nix_bpf_cfg *cfg) +{ + uint64_t exponent_p = 0, mantissa_p = 0, div_exp_p = 0; + struct mbox *mbox = get_mbox(roc_nix); + struct nix_cn10k_aq_enq_req *aq; + uint8_t level_idx; + + if (roc_model_is_cn9k()) + return NIX_ERR_HW_NOTSUP; + + if (!cfg) + return NIX_ERR_PARAM; + + level_idx = roc_nix_bpf_level_to_idx(lvl_flag); + if (level_idx == ROC_NIX_BPF_LEVEL_IDX_INVALID) + return NIX_ERR_PARAM; + + aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox); + if (aq == NULL) + return -ENOSPC; + aq->qidx = (sw_to_hw_lvl_map[level_idx] << 14) | id; + aq->ctype = NIX_AQ_CTYPE_BAND_PROF; + aq->op = NIX_AQ_INSTOP_WRITE; + + aq->prof.adjust_exponent = NIX_BPF_DEFAULT_ADJUST_EXPONENT; + aq->prof.adjust_mantissa = NIX_BPF_DEFAULT_ADJUST_MANTISSA; + if (cfg->lmode == ROC_NIX_BPF_LMODE_BYTE) + aq->prof.adjust_mantissa = NIX_BPF_DEFAULT_ADJUST_MANTISSA / 2; + + aq->prof_mask.adjust_exponent = ~(aq->prof_mask.adjust_exponent); + aq->prof_mask.adjust_mantissa = ~(aq->prof_mask.adjust_mantissa); + + switch (cfg->alg) { + case ROC_NIX_BPF_ALGO_2697: + meter_rate_to_nix(cfg->algo2697.cir, &exponent_p, &mantissa_p, + &div_exp_p); + aq->prof.cir_mantissa = mantissa_p; + aq->prof.cir_exponent = exponent_p; + + meter_burst_to_nix(cfg->algo2697.cbs, &exponent_p, &mantissa_p); + aq->prof.cbs_mantissa = mantissa_p; + aq->prof.cbs_exponent = exponent_p; + + meter_burst_to_nix(cfg->algo2697.ebs, &exponent_p, &mantissa_p); + aq->prof.pebs_mantissa = mantissa_p; + aq->prof.pebs_exponent = exponent_p; + + aq->prof_mask.cir_mantissa = ~(aq->prof_mask.cir_mantissa); + aq->prof_mask.cbs_mantissa = ~(aq->prof_mask.cbs_mantissa); + aq->prof_mask.pebs_mantissa = ~(aq->prof_mask.pebs_mantissa); + aq->prof_mask.cir_exponent = ~(aq->prof_mask.cir_exponent); + aq->prof_mask.cbs_exponent = ~(aq->prof_mask.cbs_exponent); + aq->prof_mask.pebs_exponent = ~(aq->prof_mask.pebs_exponent); + break; + + case ROC_NIX_BPF_ALGO_2698: + meter_rate_to_nix(cfg->algo2698.cir, &exponent_p, &mantissa_p, + &div_exp_p); + aq->prof.cir_mantissa = mantissa_p; + aq->prof.cir_exponent = exponent_p; + + meter_rate_to_nix(cfg->algo2698.pir, &exponent_p, &mantissa_p, + &div_exp_p); + aq->prof.peir_mantissa = mantissa_p; + aq->prof.peir_exponent = exponent_p; + + meter_burst_to_nix(cfg->algo2698.cbs, &exponent_p, &mantissa_p); + aq->prof.cbs_mantissa = mantissa_p; + aq->prof.cbs_exponent = exponent_p; + + meter_burst_to_nix(cfg->algo2698.pbs, &exponent_p, &mantissa_p); + aq->prof.pebs_mantissa = mantissa_p; + aq->prof.pebs_exponent = exponent_p; + + aq->prof_mask.cir_mantissa = ~(aq->prof_mask.cir_mantissa); + aq->prof_mask.peir_mantissa = ~(aq->prof_mask.peir_mantissa); + aq->prof_mask.cbs_mantissa = ~(aq->prof_mask.cbs_mantissa); + aq->prof_mask.pebs_mantissa = ~(aq->prof_mask.pebs_mantissa); + aq->prof_mask.cir_exponent = ~(aq->prof_mask.cir_exponent); + aq->prof_mask.peir_exponent = ~(aq->prof_mask.peir_exponent); + aq->prof_mask.cbs_exponent = ~(aq->prof_mask.cbs_exponent); + aq->prof_mask.pebs_exponent = ~(aq->prof_mask.pebs_exponent); + break; + + case ROC_NIX_BPF_ALGO_4115: + meter_rate_to_nix(cfg->algo4115.cir, &exponent_p, &mantissa_p, + &div_exp_p); + aq->prof.cir_mantissa = mantissa_p; + aq->prof.cir_exponent = exponent_p; + + meter_rate_to_nix(cfg->algo4115.eir, &exponent_p, &mantissa_p, + &div_exp_p); + aq->prof.peir_mantissa = mantissa_p; + aq->prof.peir_exponent = exponent_p; + + meter_burst_to_nix(cfg->algo4115.cbs, &exponent_p, &mantissa_p); + aq->prof.cbs_mantissa = mantissa_p; + aq->prof.cbs_exponent = exponent_p; + + meter_burst_to_nix(cfg->algo4115.ebs, &exponent_p, &mantissa_p); + aq->prof.pebs_mantissa = mantissa_p; + aq->prof.pebs_exponent = exponent_p; + + aq->prof_mask.cir_mantissa = ~(aq->prof_mask.cir_mantissa); + aq->prof_mask.peir_mantissa = ~(aq->prof_mask.peir_mantissa); + aq->prof_mask.cbs_mantissa = ~(aq->prof_mask.cbs_mantissa); + aq->prof_mask.pebs_mantissa = ~(aq->prof_mask.pebs_mantissa); + + aq->prof_mask.cir_exponent = ~(aq->prof_mask.cir_exponent); + aq->prof_mask.peir_exponent = ~(aq->prof_mask.peir_exponent); + aq->prof_mask.cbs_exponent = ~(aq->prof_mask.cbs_exponent); + aq->prof_mask.pebs_exponent = ~(aq->prof_mask.pebs_exponent); + break; + + default: + return NIX_ERR_PARAM; + } + + aq->prof.lmode = cfg->lmode; + aq->prof.icolor = cfg->icolor; + aq->prof.pc_mode = cfg->pc_mode; + aq->prof.tnl_ena = cfg->tnl_ena; + aq->prof.gc_action = cfg->action[ROC_NIX_BPF_COLOR_GREEN]; + aq->prof.yc_action = cfg->action[ROC_NIX_BPF_COLOR_YELLOW]; + aq->prof.rc_action = cfg->action[ROC_NIX_BPF_COLOR_RED]; + + aq->prof_mask.lmode = ~(aq->prof_mask.lmode); + aq->prof_mask.icolor = ~(aq->prof_mask.icolor); + aq->prof_mask.pc_mode = ~(aq->prof_mask.pc_mode); + aq->prof_mask.tnl_ena = ~(aq->prof_mask.tnl_ena); + aq->prof_mask.gc_action = ~(aq->prof_mask.gc_action); + aq->prof_mask.yc_action = ~(aq->prof_mask.yc_action); + aq->prof_mask.rc_action = ~(aq->prof_mask.rc_action); + + return mbox_process(mbox); +} diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map index 3d474f8a96..f34fd3b4a4 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -83,6 +83,7 @@ INTERNAL { roc_se_auth_key_set; roc_se_ciph_key_set; roc_nix_bpf_alloc; + roc_nix_bpf_config; roc_nix_bpf_count_get; roc_nix_bpf_free; roc_nix_bpf_free_all; -- 2.25.1