From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 91C45A0C47; Tue, 12 Oct 2021 09:06:31 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 49E33410E1; Tue, 12 Oct 2021 09:06:27 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id C82A140150 for ; Tue, 12 Oct 2021 09:06:25 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 19C4UoTt024140; Tue, 12 Oct 2021 00:06:22 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=+so5DZD2h0na8fqbH4KFtzodTBi1hkzl478m0BUcyT8=; b=a6pQQAniOOeaNZ05gyupRMCBHsmo+RlQ5Gb9GOR8Iw+DSerz9z7Bxm0/D9Q643CV3wvn d8y7aDTEj6JmkFWQWTBL61QY9/l2pJ9/UjdvuKo3ZK/C/QA+Ova9hzbYn9rkgXjNpcfi CWTjR3rFQzhIHlcEw2alSM14NCLT/pKQiegfPD6UUaxwP3W6TFUh6DxIMq7Svn2l3GD3 sP+twlkpM3wPpoVjlvxkUK47T7GeKsLZq4yZSrLme0shi8spaM8y1a1PWCLPbxta+nnk /FxnWRTaXmTIeyQHdp9tsmjRHjnCn8gHIhvFc3NV3yGDFEV3XDHS0/8Cer1yMj0wBzqh Nw== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com with ESMTP id 3bn3d58jny-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Tue, 12 Oct 2021 00:06:22 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Tue, 12 Oct 2021 00:06:21 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Tue, 12 Oct 2021 00:06:20 -0700 Received: from localhost.localdomain (unknown [10.28.34.25]) by maili.marvell.com (Postfix) with ESMTP id 73DCF3F707E; Tue, 12 Oct 2021 00:06:19 -0700 (PDT) From: To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Ray Kinsella CC: Date: Tue, 12 Oct 2021 12:35:46 +0530 Message-ID: <20211012070612.352164-3-skori@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211012070612.352164-1-skori@marvell.com> References: <20211011155057.302142-2-skori@marvell.com> <20211012070612.352164-1-skori@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: cLLlXYNefW-4EL-SCo3Zl8rNRW3P6E76 X-Proofpoint-GUID: cLLlXYNefW-4EL-SCo3Zl8rNRW3P6E76 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-10-12_01,2021-10-11_01,2020-04-07_01 Subject: [dpdk-dev] [PATCH v5 02/28] common/cnxk: support RoC API to get level to index X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Sunil Kumar Kori CN10K platform supports policer up to 3 level of hierarchy. Implement RoC API to get corresponding index for given level. Signed-off-by: Sunil Kumar Kori --- v5: - Fix checkpatch errors - Fix patch apply errors v4: - Rebase support on dpdk-next-net-mrvl branch - Handled meter action during flow destroy - Handled meter cleanup during port shutdown v3: - Rebase support on latest DPDK - Handled multilevel chaining for tree hierarchy - Fix naming convention v2: - Rebase support on latest DPDK - Handled multilevel chaining for linear hierarchy - Review comments incorporated drivers/common/cnxk/meson.build | 1 + drivers/common/cnxk/roc_nix.h | 12 ++++++++++++ drivers/common/cnxk/roc_nix_bpf.c | 22 ++++++++++++++++++++++ drivers/common/cnxk/roc_nix_priv.h | 1 + drivers/common/cnxk/roc_utils.c | 3 +++ drivers/common/cnxk/version.map | 1 + 6 files changed, 40 insertions(+) create mode 100644 drivers/common/cnxk/roc_nix_bpf.c diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build index 97db5f087b..32d3ad5087 100644 --- a/drivers/common/cnxk/meson.build +++ b/drivers/common/cnxk/meson.build @@ -25,6 +25,7 @@ sources = files( 'roc_mbox.c', 'roc_model.c', 'roc_nix.c', + 'roc_nix_bpf.c', 'roc_nix_debug.c', 'roc_nix_fc.c', 'roc_nix_irq.c', diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h index b06895a565..bf4fd2f208 100644 --- a/drivers/common/cnxk/roc_nix.h +++ b/drivers/common/cnxk/roc_nix.h @@ -6,6 +6,8 @@ #define _ROC_NIX_H_ /* Constants */ +#define ROC_NIX_BPF_LEVEL_IDX_INVALID 0xFF + enum roc_nix_rss_reta_sz { ROC_NIX_RSS_RETA_SZ_64 = 64, ROC_NIX_RSS_RETA_SZ_128 = 128, @@ -29,6 +31,12 @@ enum roc_nix_vlan_type { ROC_NIX_VLAN_TYPE_OUTER = 0x02, }; +enum roc_nix_bpf_level_flag { + ROC_NIX_BPF_LEVEL_F_LEAF = BIT(0), + ROC_NIX_BPF_LEVEL_F_MID = BIT(1), + ROC_NIX_BPF_LEVEL_F_TOP = BIT(2), +}; + struct roc_nix_vlan_config { uint32_t type; union { @@ -508,6 +516,10 @@ int __roc_api roc_nix_tm_prepare_rate_limited_tree(struct roc_nix *roc_nix); bool __roc_api roc_nix_tm_is_user_hierarchy_enabled(struct roc_nix *nix); int __roc_api roc_nix_tm_tree_type_get(struct roc_nix *nix); +/* Ingress Policer API */ +uint8_t __roc_api +roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag); + /* MAC */ int __roc_api roc_nix_mac_rxtx_start_stop(struct roc_nix *roc_nix, bool start); int __roc_api roc_nix_mac_link_event_start_stop(struct roc_nix *roc_nix, diff --git a/drivers/common/cnxk/roc_nix_bpf.c b/drivers/common/cnxk/roc_nix_bpf.c new file mode 100644 index 0000000000..b588cc16e4 --- /dev/null +++ b/drivers/common/cnxk/roc_nix_bpf.c @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell. + */ + +#include "roc_api.h" +#include "roc_priv.h" + +uint8_t +roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag level_f) +{ + uint8_t idx; + + if (level_f & ROC_NIX_BPF_LEVEL_F_LEAF) + idx = 0; + else if (level_f & ROC_NIX_BPF_LEVEL_F_MID) + idx = 1; + else if (level_f & ROC_NIX_BPF_LEVEL_F_TOP) + idx = 2; + else + idx = ROC_NIX_BPF_LEVEL_IDX_INVALID; + return idx; +} diff --git a/drivers/common/cnxk/roc_nix_priv.h b/drivers/common/cnxk/roc_nix_priv.h index 7653c5a328..02b1be852d 100644 --- a/drivers/common/cnxk/roc_nix_priv.h +++ b/drivers/common/cnxk/roc_nix_priv.h @@ -187,6 +187,7 @@ enum nix_err_status { NIX_ERR_INVALID_RANGE, NIX_ERR_INTERNAL, NIX_ERR_OP_NOTSUP, + NIX_ERR_HW_NOTSUP, NIX_ERR_QUEUE_INVALID_RANGE, NIX_ERR_AQ_READ_FAILED, NIX_ERR_AQ_WRITE_FAILED, diff --git a/drivers/common/cnxk/roc_utils.c b/drivers/common/cnxk/roc_utils.c index 751486f503..f1b5ef3b70 100644 --- a/drivers/common/cnxk/roc_utils.c +++ b/drivers/common/cnxk/roc_utils.c @@ -34,6 +34,9 @@ roc_error_msg_get(int errorcode) case NIX_ERR_OP_NOTSUP: err_msg = "Operation not supported"; break; + case NIX_ERR_HW_NOTSUP: + err_msg = "Hardware does not support"; + break; case NIX_ERR_QUEUE_INVALID_RANGE: err_msg = "Invalid Queue range"; break; diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map index ccf8ec157e..c84c229938 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -82,6 +82,7 @@ INTERNAL { roc_model; roc_se_auth_key_set; roc_se_ciph_key_set; + roc_nix_bpf_level_to_idx; roc_nix_cq_dump; roc_nix_cq_fini; roc_nix_cq_init; -- 2.25.1