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CAT:NONE; SFS:(4636009)(36840700001)(46966006)(36756003)(36860700001)(4326008)(86362001)(426003)(6666004)(2616005)(54906003)(5660300002)(316002)(336012)(356005)(7696005)(6916009)(6286002)(1076003)(8676002)(47076005)(82310400003)(55016002)(83380400001)(8936002)(26005)(70206006)(70586007)(508600001)(186003)(7636003)(2906002)(15650500001)(16526019); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Oct 2021 10:49:50.4418 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 09e56af5-a454-4fa8-15a2-08d98d6e043d X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT031.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR12MB2774 Subject: [dpdk-dev] [PATCH v4 5/5] net/mlx5: update modify field action X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Update immediate value/pointer source operand support for modify field RTE Flow action: - source operand data can be presented by byte buffer (instead of former uint64_t) or by pointer - no host byte ordering is assumed anymore for immediate data buffer (not uint64_t anymore) - no immediate value offset is expected Signed-off-by: Viacheslav Ovsiienko --- drivers/net/mlx5/mlx5_flow_dv.c | 123 +++++++++++--------------------- 1 file changed, 42 insertions(+), 81 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index c6370cd1d6..d13e0d14e9 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -1391,7 +1391,7 @@ flow_dv_convert_action_modify_ipv6_dscp static int mlx5_flow_item_field_width(struct mlx5_priv *priv, - enum rte_flow_field_id field) + enum rte_flow_field_id field, int inherit) { switch (field) { case RTE_FLOW_FIELD_START: @@ -1442,7 +1442,8 @@ mlx5_flow_item_field_width(struct mlx5_priv *priv, return __builtin_popcount(priv->sh->dv_meta_mask); case RTE_FLOW_FIELD_POINTER: case RTE_FLOW_FIELD_VALUE: - return 64; + MLX5_ASSERT(inherit >= 0); + return inherit < 0 ? 0 : inherit; default: MLX5_ASSERT(false); } @@ -1452,17 +1453,14 @@ mlx5_flow_item_field_width(struct mlx5_priv *priv, static void mlx5_flow_field_id_to_modify_info (const struct rte_flow_action_modify_data *data, - struct field_modify_info *info, - uint32_t *mask, uint32_t *value, - uint32_t width, uint32_t dst_width, - uint32_t *shift, struct rte_eth_dev *dev, - const struct rte_flow_attr *attr, - struct rte_flow_error *error) + struct field_modify_info *info, uint32_t *mask, + uint32_t width, uint32_t *shift, struct rte_eth_dev *dev, + const struct rte_flow_attr *attr, struct rte_flow_error *error) { struct mlx5_priv *priv = dev->data->dev_private; uint32_t idx = 0; uint32_t off = 0; - uint64_t val = 0; + switch (data->field) { case RTE_FLOW_FIELD_START: /* not supported yet */ @@ -1472,7 +1470,7 @@ mlx5_flow_field_id_to_modify_info off = data->offset > 16 ? data->offset - 16 : 0; if (mask) { if (data->offset < 16) { - info[idx] = (struct field_modify_info){2, 0, + info[idx] = (struct field_modify_info){2, 4, MLX5_MODI_OUT_DMAC_15_0}; if (width < 16) { mask[idx] = rte_cpu_to_be_16(0xffff >> @@ -1486,15 +1484,15 @@ mlx5_flow_field_id_to_modify_info break; ++idx; } - info[idx] = (struct field_modify_info){4, 4 * idx, + info[idx] = (struct field_modify_info){4, 0, MLX5_MODI_OUT_DMAC_47_16}; mask[idx] = rte_cpu_to_be_32((0xffffffff >> (32 - width)) << off); } else { if (data->offset < 16) - info[idx++] = (struct field_modify_info){2, 0, + info[idx++] = (struct field_modify_info){2, 4, MLX5_MODI_OUT_DMAC_15_0}; - info[idx] = (struct field_modify_info){4, off, + info[idx] = (struct field_modify_info){4, 0, MLX5_MODI_OUT_DMAC_47_16}; } break; @@ -1502,7 +1500,7 @@ mlx5_flow_field_id_to_modify_info off = data->offset > 16 ? data->offset - 16 : 0; if (mask) { if (data->offset < 16) { - info[idx] = (struct field_modify_info){2, 0, + info[idx] = (struct field_modify_info){2, 4, MLX5_MODI_OUT_SMAC_15_0}; if (width < 16) { mask[idx] = rte_cpu_to_be_16(0xffff >> @@ -1516,15 +1514,15 @@ mlx5_flow_field_id_to_modify_info break; ++idx; } - info[idx] = (struct field_modify_info){4, 4 * idx, + info[idx] = (struct field_modify_info){4, 0, MLX5_MODI_OUT_SMAC_47_16}; mask[idx] = rte_cpu_to_be_32((0xffffffff >> (32 - width)) << off); } else { if (data->offset < 16) - info[idx++] = (struct field_modify_info){2, 0, + info[idx++] = (struct field_modify_info){2, 4, MLX5_MODI_OUT_SMAC_15_0}; - info[idx] = (struct field_modify_info){4, off, + info[idx] = (struct field_modify_info){4, 0, MLX5_MODI_OUT_SMAC_47_16}; } break; @@ -1584,8 +1582,7 @@ mlx5_flow_field_id_to_modify_info case RTE_FLOW_FIELD_IPV6_SRC: if (mask) { if (data->offset < 32) { - info[idx] = (struct field_modify_info){4, - 4 * idx, + info[idx] = (struct field_modify_info){4, 12, MLX5_MODI_OUT_SIPV6_31_0}; if (width < 32) { mask[idx] = @@ -1601,8 +1598,7 @@ mlx5_flow_field_id_to_modify_info ++idx; } if (data->offset < 64) { - info[idx] = (struct field_modify_info){4, - 4 * idx, + info[idx] = (struct field_modify_info){4, 8, MLX5_MODI_OUT_SIPV6_63_32}; if (width < 32) { mask[idx] = @@ -1618,8 +1614,7 @@ mlx5_flow_field_id_to_modify_info ++idx; } if (data->offset < 96) { - info[idx] = (struct field_modify_info){4, - 4 * idx, + info[idx] = (struct field_modify_info){4, 4, MLX5_MODI_OUT_SIPV6_95_64}; if (width < 32) { mask[idx] = @@ -1634,19 +1629,19 @@ mlx5_flow_field_id_to_modify_info break; ++idx; } - info[idx] = (struct field_modify_info){4, 4 * idx, + info[idx] = (struct field_modify_info){4, 0, MLX5_MODI_OUT_SIPV6_127_96}; mask[idx] = rte_cpu_to_be_32(0xffffffff >> (32 - width)); } else { if (data->offset < 32) - info[idx++] = (struct field_modify_info){4, 0, + info[idx++] = (struct field_modify_info){4, 12, MLX5_MODI_OUT_SIPV6_31_0}; if (data->offset < 64) - info[idx++] = (struct field_modify_info){4, 0, + info[idx++] = (struct field_modify_info){4, 8, MLX5_MODI_OUT_SIPV6_63_32}; if (data->offset < 96) - info[idx++] = (struct field_modify_info){4, 0, + info[idx++] = (struct field_modify_info){4, 4, MLX5_MODI_OUT_SIPV6_95_64}; if (data->offset < 128) info[idx++] = (struct field_modify_info){4, 0, @@ -1656,8 +1651,7 @@ mlx5_flow_field_id_to_modify_info case RTE_FLOW_FIELD_IPV6_DST: if (mask) { if (data->offset < 32) { - info[idx] = (struct field_modify_info){4, - 4 * idx, + info[idx] = (struct field_modify_info){4, 12, MLX5_MODI_OUT_DIPV6_31_0}; if (width < 32) { mask[idx] = @@ -1673,8 +1667,7 @@ mlx5_flow_field_id_to_modify_info ++idx; } if (data->offset < 64) { - info[idx] = (struct field_modify_info){4, - 4 * idx, + info[idx] = (struct field_modify_info){4, 8, MLX5_MODI_OUT_DIPV6_63_32}; if (width < 32) { mask[idx] = @@ -1690,8 +1683,7 @@ mlx5_flow_field_id_to_modify_info ++idx; } if (data->offset < 96) { - info[idx] = (struct field_modify_info){4, - 4 * idx, + info[idx] = (struct field_modify_info){4, 4, MLX5_MODI_OUT_DIPV6_95_64}; if (width < 32) { mask[idx] = @@ -1706,19 +1698,19 @@ mlx5_flow_field_id_to_modify_info break; ++idx; } - info[idx] = (struct field_modify_info){4, 4 * idx, + info[idx] = (struct field_modify_info){4, 0, MLX5_MODI_OUT_DIPV6_127_96}; mask[idx] = rte_cpu_to_be_32(0xffffffff >> (32 - width)); } else { if (data->offset < 32) - info[idx++] = (struct field_modify_info){4, 0, + info[idx++] = (struct field_modify_info){4, 12, MLX5_MODI_OUT_DIPV6_31_0}; if (data->offset < 64) - info[idx++] = (struct field_modify_info){4, 0, + info[idx++] = (struct field_modify_info){4, 8, MLX5_MODI_OUT_DIPV6_63_32}; if (data->offset < 96) - info[idx++] = (struct field_modify_info){4, 0, + info[idx++] = (struct field_modify_info){4, 4, MLX5_MODI_OUT_DIPV6_95_64}; if (data->offset < 128) info[idx++] = (struct field_modify_info){4, 0, @@ -1838,35 +1830,6 @@ mlx5_flow_field_id_to_modify_info break; case RTE_FLOW_FIELD_POINTER: case RTE_FLOW_FIELD_VALUE: - if (data->field == RTE_FLOW_FIELD_POINTER) - memcpy(&val, (void *)(uintptr_t)data->value, - sizeof(uint64_t)); - else - val = data->value; - for (idx = 0; idx < MLX5_ACT_MAX_MOD_FIELDS; idx++) { - if (mask[idx]) { - if (dst_width == 48) { - /*special case for MAC addresses */ - value[idx] = rte_cpu_to_be_16(val); - val >>= 16; - dst_width -= 16; - } else if (dst_width > 16) { - value[idx] = rte_cpu_to_be_32(val); - val >>= 32; - } else if (dst_width > 8) { - value[idx] = rte_cpu_to_be_16(val); - val >>= 16; - } else { - value[idx] = (uint8_t)val; - val >>= 8; - } - if (*shift) - value[idx] <<= *shift; - if (!val) - break; - } - } - break; default: MLX5_ASSERT(false); break; @@ -1907,33 +1870,31 @@ flow_dv_convert_action_modify_field struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = { {0, 0, 0} }; uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0}; - uint32_t value[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0}; uint32_t type; uint32_t shift = 0; - uint32_t dst_width = mlx5_flow_item_field_width(priv, conf->dst.field); + uint32_t dst_width; + dst_width = mlx5_flow_item_field_width(priv, conf->dst.field, -1); if (conf->src.field == RTE_FLOW_FIELD_POINTER || conf->src.field == RTE_FLOW_FIELD_VALUE) { type = MLX5_MODIFICATION_TYPE_SET; /** For SET fill the destination field (field) first. */ mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask, - value, conf->width, dst_width, - &shift, dev, attr, error); - /** Then copy immediate value from source as per mask. */ - mlx5_flow_field_id_to_modify_info(&conf->src, dcopy, mask, - value, conf->width, dst_width, - &shift, dev, attr, error); - item.spec = &value; + conf->width, &shift, dev, + attr, error); + item.spec = conf->src.field == RTE_FLOW_FIELD_POINTER ? + (void *)(uintptr_t)conf->src.pvalue : + (void *)(uintptr_t)&conf->src.value; } else { type = MLX5_MODIFICATION_TYPE_COPY; /** For COPY fill the destination field (dcopy) without mask. */ mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL, - value, conf->width, dst_width, - &shift, dev, attr, error); + conf->width, &shift, dev, + attr, error); /** Then construct the source field (field) with mask. */ mlx5_flow_field_id_to_modify_info(&conf->src, field, mask, - value, conf->width, dst_width, - &shift, dev, attr, error); + conf->width, &shift, + dev, attr, error); } item.mask = &mask; return flow_dv_convert_modify_action(&item, @@ -4874,9 +4835,9 @@ flow_dv_validate_action_modify_field(struct rte_eth_dev *dev, const struct rte_flow_action_modify_field *action_modify_field = action->conf; uint32_t dst_width = mlx5_flow_item_field_width(priv, - action_modify_field->dst.field); + action_modify_field->dst.field, -1); uint32_t src_width = mlx5_flow_item_field_width(priv, - action_modify_field->src.field); + action_modify_field->src.field, dst_width); ret = flow_dv_validate_action_modify_hdr(action_flags, action, error); if (ret) -- 2.18.1