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CAT:NONE; SFS:(4636009)(36840700001)(46966006)(16526019)(508600001)(36756003)(6916009)(36860700001)(8936002)(6286002)(186003)(26005)(83380400001)(6666004)(55016002)(8676002)(82310400003)(2906002)(5660300002)(70586007)(47076005)(86362001)(107886003)(7636003)(356005)(316002)(70206006)(1076003)(336012)(54906003)(4326008)(7696005)(2616005)(426003); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Oct 2021 15:54:50.5613 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5942bb72-04bb-4a60-e244-08d98d989fe3 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT047.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB3859 Subject: [dpdk-dev] [PATCH 3/5] crypto/mlx5: use OS agnostic functions for UMEM operations X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" use the functions mlx5_os_umem_reg, mlx5_os_umem_dereg mlx5_os_get_umem_id instead of the glue functions to support UMEM operations on all OSs. Signed-off-by: Tal Shnaiderman Acked-by: Matan Azrad --- drivers/crypto/mlx5/mlx5_crypto.c | 8 ++++---- drivers/crypto/mlx5/mlx5_crypto.h | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/crypto/mlx5/mlx5_crypto.c b/drivers/crypto/mlx5/mlx5_crypto.c index 791bec03f9..11cbc78586 100644 --- a/drivers/crypto/mlx5/mlx5_crypto.c +++ b/drivers/crypto/mlx5/mlx5_crypto.c @@ -272,7 +272,7 @@ mlx5_crypto_qp_release(struct mlx5_crypto_qp *qp) if (qp->qp_obj != NULL) claim_zero(mlx5_devx_cmd_destroy(qp->qp_obj)); if (qp->umem_obj != NULL) - claim_zero(mlx5_glue->devx_umem_dereg(qp->umem_obj)); + claim_zero(mlx5_os_umem_dereg(qp->umem_obj)); if (qp->umem_buf != NULL) rte_free(qp->umem_buf); mlx5_mr_btree_free(&qp->mr_ctrl.cache_bh); @@ -671,7 +671,7 @@ mlx5_crypto_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id, rte_errno = ENOMEM; goto error; } - qp->umem_obj = mlx5_glue->devx_umem_reg(priv->cdev->ctx, + qp->umem_obj = mlx5_os_umem_reg(priv->cdev->ctx, (void *)(uintptr_t)qp->umem_buf, umem_size, IBV_ACCESS_LOCAL_WRITE); @@ -693,9 +693,9 @@ mlx5_crypto_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id, attr.rq_size = 0; attr.sq_size = RTE_BIT32(log_nb_desc); attr.dbr_umem_valid = 1; - attr.wq_umem_id = qp->umem_obj->umem_id; + attr.wq_umem_id = mlx5_os_get_umem_id(qp->umem_obj); attr.wq_umem_offset = 0; - attr.dbr_umem_id = qp->umem_obj->umem_id; + attr.dbr_umem_id = mlx5_os_get_umem_id(qp->umem_obj); attr.ts_format = mlx5_ts_format_conv(priv->cdev->config.hca_attr.qp_ts_format); attr.dbr_address = RTE_BIT64(log_nb_desc) * priv->wqe_set_size; diff --git a/drivers/crypto/mlx5/mlx5_crypto.h b/drivers/crypto/mlx5/mlx5_crypto.h index 09acc85a56..ef0f383b52 100644 --- a/drivers/crypto/mlx5/mlx5_crypto.h +++ b/drivers/crypto/mlx5/mlx5_crypto.h @@ -42,7 +42,7 @@ struct mlx5_crypto_qp { struct mlx5_devx_cq cq_obj; struct mlx5_devx_obj *qp_obj; struct rte_cryptodev_stats stats; - struct mlx5dv_devx_umem *umem_obj; + void *umem_obj; void *umem_buf; volatile uint32_t *db_rec; struct rte_crypto_op **ops; -- 2.16.1.windows.4