From: Tal Shnaiderman <talshn@nvidia.com>
To: <dev@dpdk.org>
Cc: <thomas@monjalon.net>, <matan@nvidia.com>, <rasland@nvidia.com>,
<asafp@nvidia.com>, <gakhil@marvell.com>,
<declan.doherty@intel.com>, <viacheslavo@nvidia.com>,
<eilong@nvidia.com>
Subject: [dpdk-dev] [PATCH v2 3/6] crypto/mlx5: use OS agnostic functions for UMEM operations
Date: Sun, 17 Oct 2021 12:41:29 +0300 [thread overview]
Message-ID: <20211017094133.18988-4-talshn@nvidia.com> (raw)
In-Reply-To: <20211017094133.18988-1-talshn@nvidia.com>
use the functions mlx5_os_umem_reg, mlx5_os_umem_dereg
mlx5_os_get_umem_id instead of the glue functions to support
UMEM operations on all OSs.
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
drivers/crypto/mlx5/mlx5_crypto.c | 8 ++++----
drivers/crypto/mlx5/mlx5_crypto.h | 2 +-
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/crypto/mlx5/mlx5_crypto.c b/drivers/crypto/mlx5/mlx5_crypto.c
index 791bec03f9..11cbc78586 100644
--- a/drivers/crypto/mlx5/mlx5_crypto.c
+++ b/drivers/crypto/mlx5/mlx5_crypto.c
@@ -272,7 +272,7 @@ mlx5_crypto_qp_release(struct mlx5_crypto_qp *qp)
if (qp->qp_obj != NULL)
claim_zero(mlx5_devx_cmd_destroy(qp->qp_obj));
if (qp->umem_obj != NULL)
- claim_zero(mlx5_glue->devx_umem_dereg(qp->umem_obj));
+ claim_zero(mlx5_os_umem_dereg(qp->umem_obj));
if (qp->umem_buf != NULL)
rte_free(qp->umem_buf);
mlx5_mr_btree_free(&qp->mr_ctrl.cache_bh);
@@ -671,7 +671,7 @@ mlx5_crypto_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
rte_errno = ENOMEM;
goto error;
}
- qp->umem_obj = mlx5_glue->devx_umem_reg(priv->cdev->ctx,
+ qp->umem_obj = mlx5_os_umem_reg(priv->cdev->ctx,
(void *)(uintptr_t)qp->umem_buf,
umem_size,
IBV_ACCESS_LOCAL_WRITE);
@@ -693,9 +693,9 @@ mlx5_crypto_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
attr.rq_size = 0;
attr.sq_size = RTE_BIT32(log_nb_desc);
attr.dbr_umem_valid = 1;
- attr.wq_umem_id = qp->umem_obj->umem_id;
+ attr.wq_umem_id = mlx5_os_get_umem_id(qp->umem_obj);
attr.wq_umem_offset = 0;
- attr.dbr_umem_id = qp->umem_obj->umem_id;
+ attr.dbr_umem_id = mlx5_os_get_umem_id(qp->umem_obj);
attr.ts_format =
mlx5_ts_format_conv(priv->cdev->config.hca_attr.qp_ts_format);
attr.dbr_address = RTE_BIT64(log_nb_desc) * priv->wqe_set_size;
diff --git a/drivers/crypto/mlx5/mlx5_crypto.h b/drivers/crypto/mlx5/mlx5_crypto.h
index 09acc85a56..ef0f383b52 100644
--- a/drivers/crypto/mlx5/mlx5_crypto.h
+++ b/drivers/crypto/mlx5/mlx5_crypto.h
@@ -42,7 +42,7 @@ struct mlx5_crypto_qp {
struct mlx5_devx_cq cq_obj;
struct mlx5_devx_obj *qp_obj;
struct rte_cryptodev_stats stats;
- struct mlx5dv_devx_umem *umem_obj;
+ void *umem_obj;
void *umem_buf;
volatile uint32_t *db_rec;
struct rte_crypto_op **ops;
--
2.16.1.windows.4
next prev parent reply other threads:[~2021-10-17 9:42 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-17 9:41 [dpdk-dev] [PATCH v2 0/6] Support MLX5 crypto driver on Windows Tal Shnaiderman
2021-10-17 9:41 ` [dpdk-dev] [PATCH v2 1/6] common/mlx5: add DV enums to Windows defs file Tal Shnaiderman
2021-10-25 8:46 ` [dpdk-dev] [PATCH v3 0/5] Support MLX5 crypto driver on Windows Tal Shnaiderman
2021-10-25 8:46 ` [dpdk-dev] [PATCH v3 1/5] common/mlx5: add DV enums to Windows defs file Tal Shnaiderman
2021-10-25 8:46 ` [dpdk-dev] [PATCH v3 2/5] crypto/mlx5: modify unix pthread code Tal Shnaiderman
2021-10-25 8:46 ` [dpdk-dev] [PATCH v3 3/5] crypto/mlx5: fix size of UMR WQE Tal Shnaiderman
2021-10-25 8:46 ` [dpdk-dev] [PATCH v3 4/5] build: check Windows support per driver Tal Shnaiderman
2021-10-25 8:46 ` [dpdk-dev] [PATCH v3 5/5] crypto/mlx5: support on Windows Tal Shnaiderman
2021-10-27 12:04 ` [dpdk-dev] [EXT] " Akhil Goyal
2021-10-27 13:33 ` Tal Shnaiderman
2021-10-31 14:06 ` Tal Shnaiderman
2021-10-31 19:08 ` Akhil Goyal
2021-10-17 9:41 ` [dpdk-dev] [PATCH v2 2/6] crypto/mlx5: replace UNIX functions with EAL functions Tal Shnaiderman
2021-10-17 9:41 ` Tal Shnaiderman [this message]
2021-10-17 9:41 ` [dpdk-dev] [PATCH v2 4/6] crypto/mlx5: fix size of UMR WQE Tal Shnaiderman
2021-10-17 9:41 ` [dpdk-dev] [PATCH v2 5/6] build: check Windows support per driver Tal Shnaiderman
2021-10-17 9:41 ` [dpdk-dev] [PATCH v2 5/6] build: have Windows support checked " Tal Shnaiderman
2021-10-17 9:41 ` [dpdk-dev] [PATCH v2 6/6] crypto/mlx5: support on Windows Tal Shnaiderman
2021-10-17 10:13 ` [dpdk-dev] [PATCH v2 0/6] Support MLX5 crypto driver " Matan Azrad
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20211017094133.18988-4-talshn@nvidia.com \
--to=talshn@nvidia.com \
--cc=asafp@nvidia.com \
--cc=declan.doherty@intel.com \
--cc=dev@dpdk.org \
--cc=eilong@nvidia.com \
--cc=gakhil@marvell.com \
--cc=matan@nvidia.com \
--cc=rasland@nvidia.com \
--cc=thomas@monjalon.net \
--cc=viacheslavo@nvidia.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).