From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id DAF54A0C45; Tue, 19 Oct 2021 03:53:56 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id ADDE140142; Tue, 19 Oct 2021 03:53:56 +0200 (CEST) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by mails.dpdk.org (Postfix) with ESMTP id 3CB054003E; Tue, 19 Oct 2021 03:53:55 +0200 (CEST) X-IronPort-AV: E=McAfee;i="6200,9189,10141"; a="225866014" X-IronPort-AV: E=Sophos;i="5.85,383,1624345200"; d="scan'208";a="225866014" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2021 18:53:54 -0700 X-IronPort-AV: E=Sophos;i="5.85,383,1624345200"; d="scan'208";a="550558790" Received: from shwdenpg235.ccr.corp.intel.com ([10.253.106.22]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2021 18:53:52 -0700 From: Alvin Zhang To: qi.z.zhang@intel.com Cc: dev@dpdk.org, Alvin Zhang , stable@dpdk.org Date: Tue, 19 Oct 2021 09:53:48 +0800 Message-Id: <20211019015348.13456-1-alvinx.zhang@intel.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20211012083932.1428-1-alvinx.zhang@intel.com> References: <20211012083932.1428-1-alvinx.zhang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v2] net/i40e: fix IPv6 fragment RSS offload type in flow X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" To keep flow format uniform with ice, this patch adds support for this RSS rule: flow create 0 ingress pattern eth / ipv6 / ipv6_frag_ext / end \ actions rss types ipv6-frag end queues end queues end / end Fixes: ef4c16fd9148 ("net/i40e: refactor RSS flow") Cc: stable@dpdk.org Signed-off-by: Alvin Zhang --- v2: Update the flow pattern, the previous is "eth / ipv6_frag_ext", now is "eth / ipv6 / ipv6_frag_ext" --- doc/guides/nics/features/i40e.ini | 1 + drivers/net/i40e/i40e_hash.c | 13 ++++++++++++- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/doc/guides/nics/features/i40e.ini b/doc/guides/nics/features/i40e.ini index ccfc5f1..e3a575f 100644 --- a/doc/guides/nics/features/i40e.ini +++ b/doc/guides/nics/features/i40e.ini @@ -61,6 +61,7 @@ gtpc = Y gtpu = Y ipv4 = Y ipv6 = Y +ipv6_frag_ext = P l2tpv3oip = Y mpls = Y nvgre = Y diff --git a/drivers/net/i40e/i40e_hash.c b/drivers/net/i40e/i40e_hash.c index 6579b1a..5da3d18 100644 --- a/drivers/net/i40e/i40e_hash.c +++ b/drivers/net/i40e/i40e_hash.c @@ -28,6 +28,7 @@ #define I40E_HASH_HDR_ETH 0x01ULL #define I40E_HASH_HDR_IPV4 0x10ULL #define I40E_HASH_HDR_IPV6 0x20ULL +#define I40E_HASH_HDR_IPV6_FRAG 0x40ULL #define I40E_HASH_HDR_TCP 0x100ULL #define I40E_HASH_HDR_UDP 0x200ULL #define I40E_HASH_HDR_SCTP 0x400ULL @@ -54,6 +55,8 @@ /* IPv6 */ #define I40E_PHINT_IPV6 (I40E_HASH_HDR_ETH | I40E_HASH_HDR_IPV6) +#define I40E_PHINT_IPV6_FRAG (I40E_PHINT_IPV6 | \ + I40E_HASH_HDR_IPV6_FRAG) #define I40E_PHINT_IPV6_TCP (I40E_PHINT_IPV6 | I40E_HASH_HDR_TCP) #define I40E_PHINT_IPV6_UDP (I40E_PHINT_IPV6 | I40E_HASH_HDR_UDP) #define I40E_PHINT_IPV6_SCTP (I40E_PHINT_IPV6 | I40E_HASH_HDR_SCTP) @@ -158,6 +161,9 @@ struct i40e_hash_map_rss_inset { BIT_ULL(RTE_FLOW_ITEM_TYPE_L2TPV3OIP) |\ BIT_ULL(RTE_FLOW_ITEM_TYPE_AH)) +#define I40E_HASH_IPV6_NEXT_ALLOW (I40E_HASH_IP_NEXT_ALLOW | \ + BIT_ULL(RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT)) + #define I40E_HASH_UDP_NEXT_ALLOW (BIT_ULL(RTE_FLOW_ITEM_TYPE_GTPU) | \ BIT_ULL(RTE_FLOW_ITEM_TYPE_GTPC)) @@ -168,7 +174,7 @@ struct i40e_hash_map_rss_inset { [RTE_FLOW_ITEM_TYPE_VOID] = I40E_HASH_VOID_NEXT_ALLOW, [RTE_FLOW_ITEM_TYPE_ETH] = I40E_HASH_ETH_NEXT_ALLOW, [RTE_FLOW_ITEM_TYPE_IPV4] = I40E_HASH_IP_NEXT_ALLOW, - [RTE_FLOW_ITEM_TYPE_IPV6] = I40E_HASH_IP_NEXT_ALLOW, + [RTE_FLOW_ITEM_TYPE_IPV6] = I40E_HASH_IPV6_NEXT_ALLOW, [RTE_FLOW_ITEM_TYPE_UDP] = I40E_HASH_UDP_NEXT_ALLOW, [RTE_FLOW_ITEM_TYPE_GTPU] = I40E_HASH_GTPU_NEXT_ALLOW, }; @@ -177,6 +183,7 @@ struct i40e_hash_map_rss_inset { [RTE_FLOW_ITEM_TYPE_ETH] = I40E_HASH_HDR_ETH, [RTE_FLOW_ITEM_TYPE_IPV4] = I40E_HASH_HDR_IPV4, [RTE_FLOW_ITEM_TYPE_IPV6] = I40E_HASH_HDR_IPV6, + [RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT] = I40E_HASH_HDR_IPV6_FRAG, [RTE_FLOW_ITEM_TYPE_TCP] = I40E_HASH_HDR_TCP, [RTE_FLOW_ITEM_TYPE_UDP] = I40E_HASH_HDR_UDP, [RTE_FLOW_ITEM_TYPE_SCTP] = I40E_HASH_HDR_SCTP, @@ -270,6 +277,10 @@ struct i40e_hash_match_pattern { I40E_HASH_IPV6_L23_RSS_MASK, I40E_FILTER_PCTYPE_NONF_IPV6_OTHER), + I40E_HASH_MAP_PATTERN(I40E_PHINT_IPV6_FRAG, + ETH_RSS_FRAG_IPV6 | I40E_HASH_L23_RSS_MASK, + I40E_FILTER_PCTYPE_FRAG_IPV6), + I40E_HASH_MAP_PATTERN(I40E_PHINT_IPV6_TCP, ETH_RSS_NONFRAG_IPV6_TCP | I40E_HASH_IPV6_L234_RSS_MASK, -- 1.8.3.1