From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 27FA5A0547; Tue, 19 Oct 2021 20:35:57 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D84E140142; Tue, 19 Oct 2021 20:35:56 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id F20054003E for ; Tue, 19 Oct 2021 20:35:55 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 19JGSaIs025397; Tue, 19 Oct 2021 11:35:52 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=7wbywKFxSZnfJYByySM7JxMui7Y6piFzJg3j1qLH+Oc=; b=M89KtNr7nXfDSImLBvyODXnuiDALKEomNspvQwaqNvOklf0ePnoKZ8khycaUTVZcJn1q meiBpgwL8m3Ozvo+3Ssp+17qZyDl4M+YDz4cATY1BwQOrOJnwl4Ql9blwa2ChlfungXm z1l4ZEWra7RqMO99KfApYrWUJroCM7Ta7TTxfBVP/o6bnckEC2fqiDjD+AqVTSgnDaYy 2JTshgIclyPaAh3arI3SCpKIeSKE9NSzeMdnLnqgzo/d56qDezI6OLVbvMVWcDzzNYd1 NoFqdKIuRC6dBBccVPP893XnfTLjVdZeksGe+GWlAQkItP5vpXlibKknIS7bp6G21b+z Lg== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com with ESMTP id 3bt1jtrk94-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Tue, 19 Oct 2021 11:35:52 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Tue, 19 Oct 2021 11:35:51 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Tue, 19 Oct 2021 11:35:51 -0700 Received: from localhost.localdomain (unknown [10.29.52.211]) by maili.marvell.com (Postfix) with ESMTP id 1ABDB3F7043; Tue, 19 Oct 2021 11:35:47 -0700 (PDT) From: Harman Kalra To: CC: , , , , Harman Kalra Date: Wed, 20 Oct 2021 00:05:35 +0530 Message-ID: <20211019183543.132084-1-hkalra@marvell.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210826145726.102081-1-hkalra@marvell.com> References: <20210826145726.102081-1-hkalra@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-GUID: -hwJxlnmhbUEO6EYJlCc6GaFPSFrId5m X-Proofpoint-ORIG-GUID: -hwJxlnmhbUEO6EYJlCc6GaFPSFrId5m X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-10-19_02,2021-10-19_01,2020-04-07_01 Subject: [dpdk-dev] [PATCH v4 0/7] make rte_intr_handle internal X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Moving struct rte_intr_handle as an internal structure to avoid any ABI breakages in future. Since this structure defines some static arrays and changing respective macros breaks the ABI. Eg: Currently RTE_MAX_RXTX_INTR_VEC_ID imposes a limit of maximum 512 MSI-X interrupts that can be defined for a PCI device, while PCI specification allows maximum 2048 MSI-X interrupts that can be used. If some PCI device requires more than 512 vectors, either change the RTE_MAX_RXTX_INTR_VEC_ID limit or dynamically allocate based on PCI device MSI-X size on probe time. Either way its an ABI breakage. Change already included in 21.11 ABI improvement spreadsheet (item 42): https://urldefense.proofpoint.com/v2/url?u=https-3A__docs.google.com_s preadsheets_d_1betlC000ua5SsSiJIcC54mCCCJnW6voH5Dqv9UxeyfE_edit-23gid- 3D0&d=DwICaQ&c=nKjWec2b6R0mOyPaz7xtfQ&r=5ESHPj7V-7JdkxT_Z_SU6RrS37ys4U XudBQ_rrS5LRo&m=7dl3OmXU7QHMmWYB6V1hYJtq1cUkjfhXUwze2Si_48c&s=lh6DEGhR Bg1shODpAy3RQk-H-0uQx5icRfUBf9dtCp4&e= This series makes struct rte_intr_handle totally opaque to the outside world by wrapping it inside a .c file and providing get set wrapper APIs to read or manipulate its fields.. Any changes to be made to any of the fields should be done via these get set APIs. Introduced a new eal_common_interrupts.c where all these APIs are defined and also hides struct rte_intr_handle definition. Details on each patch of the series: Patch 1: malloc: introduce malloc is ready API This patch introduces a new API which tells if DPDK memory subsystem is initialized and rte_malloc* APIs are ready to be used. If rte_malloc* are setup, memory for interrupt instance is allocated using rte_malloc else using traditional heap APIs. Patch 2: eal/interrupts: implement get set APIs This patch provides prototypes and implementation of all the new get set APIs. Alloc APIs are implemented to allocate memory for interrupt handle instance. Currently most of the drivers defines interrupt handle instance as static but now it cant be static as size of rte_intr_handle is unknown to all the drivers. Drivers are expected to allocate interrupt instances during initialization and free these instances during cleanup phase. This patch also rearranges the headers related to interrupt framework. Epoll related definitions prototypes are moved into a new header i.e. rte_epoll.h and APIs defined in rte_eal_interrupts.h which were driver specific are moved to rte_interrupts.h (as anyways it was accessible and used outside DPDK library. Later in the series rte_eal_interrupts.h is removed. Patch 3: eal/interrupts: avoid direct access to interrupt handle Modifying the interrupt framework for linux and freebsd to use these get set alloc APIs as per requirement and avoid accessing the fields directly. Patch 4: test/interrupt: apply get set interrupt handle APIs Updating interrupt test suite to use interrupt handle APIs. Patch 5: drivers: remove direct access to interrupt handle fields Modifying all the drivers and libraries which are currently directly accessing the interrupt handle fields. Drivers are expected to allocated the interrupt instance, use get set APIs with the allocated interrupt handle and free it on cleanup. Patch 6: eal/interrupts: make interrupt handle structure opaque In this patch rte_eal_interrupt.h is removed, struct rte_intr_handle definition is moved to c file to make it completely opaque. As part of interrupt handle allocation, array like efds and elist(which are currently static) are dynamically allocated with default size (RTE_MAX_RXTX_INTR_VEC_ID). Later these arrays can be reallocated as per device requirement using new API rte_intr_handle_event_list_update(). Eg, on PCI device probing MSIX size can be queried and these arrays can be reallocated accordingly. Patch 7: eal/alarm: introduce alarm fini routine Introducing alarm fini routine, as the memory allocated for alarm interrupt instance can be freed in alarm fini. Testing performed: 1. Validated the series by running interrupts and alarm test suite. 2. Validate l3fwd power functionality with octeontx2 and i40e intel cards, where interrupts are expected on packet arrival. v1: * Fixed freebsd compilation failure * Fixed seg fault in case of memif v2: * Merged the prototype and implementation patch to 1. * Restricting allocation of single interrupt instance. * Removed base APIs, as they were exposing internally allocated memory information. * Fixed some memory leak issues. * Marked some library specific APIs as internal. v3: * Removed flag from instance alloc API, rather auto detect if memory should be allocated using glibc malloc APIs or rte_malloc* * Added APIs for get/set windows handle. * Defined macros for repeated checks. v4: * Rectified some typo in the APIs documentation. * Better names for some internal variables. Harman Kalra (7): malloc: introduce malloc is ready API eal/interrupts: implement get set APIs eal/interrupts: avoid direct access to interrupt handle test/interrupt: apply get set interrupt handle APIs drivers: remove direct access to interrupt handle eal/interrupts: make interrupt handle structure opaque eal/alarm: introduce alarm fini routine MAINTAINERS | 1 + app/test/test_interrupts.c | 162 +++-- drivers/baseband/acc100/rte_acc100_pmd.c | 18 +- .../fpga_5gnr_fec/rte_fpga_5gnr_fec.c | 21 +- drivers/baseband/fpga_lte_fec/fpga_lte_fec.c | 21 +- drivers/bus/auxiliary/auxiliary_common.c | 2 + drivers/bus/auxiliary/linux/auxiliary.c | 9 + drivers/bus/auxiliary/rte_bus_auxiliary.h | 2 +- drivers/bus/dpaa/dpaa_bus.c | 26 +- drivers/bus/dpaa/rte_dpaa_bus.h | 2 +- drivers/bus/fslmc/fslmc_bus.c | 15 +- drivers/bus/fslmc/fslmc_vfio.c | 32 +- drivers/bus/fslmc/portal/dpaa2_hw_dpio.c | 19 +- drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 2 +- drivers/bus/fslmc/rte_fslmc.h | 2 +- drivers/bus/ifpga/ifpga_bus.c | 14 +- drivers/bus/ifpga/rte_bus_ifpga.h | 2 +- drivers/bus/pci/bsd/pci.c | 21 +- drivers/bus/pci/linux/pci.c | 4 +- drivers/bus/pci/linux/pci_uio.c | 73 +- drivers/bus/pci/linux/pci_vfio.c | 115 +++- drivers/bus/pci/pci_common.c | 27 +- drivers/bus/pci/pci_common_uio.c | 21 +- drivers/bus/pci/rte_bus_pci.h | 4 +- drivers/bus/vmbus/linux/vmbus_bus.c | 5 + drivers/bus/vmbus/linux/vmbus_uio.c | 37 +- drivers/bus/vmbus/rte_bus_vmbus.h | 2 +- drivers/bus/vmbus/vmbus_common_uio.c | 24 +- drivers/common/cnxk/roc_cpt.c | 8 +- drivers/common/cnxk/roc_dev.c | 14 +- drivers/common/cnxk/roc_irq.c | 108 +-- drivers/common/cnxk/roc_nix_inl_dev_irq.c | 8 +- drivers/common/cnxk/roc_nix_irq.c | 36 +- drivers/common/cnxk/roc_npa.c | 2 +- drivers/common/cnxk/roc_platform.h | 49 +- drivers/common/cnxk/roc_sso.c | 4 +- drivers/common/cnxk/roc_tim.c | 4 +- drivers/common/octeontx2/otx2_dev.c | 14 +- drivers/common/octeontx2/otx2_irq.c | 117 ++-- .../octeontx2/otx2_cryptodev_hw_access.c | 4 +- drivers/event/octeontx2/otx2_evdev_irq.c | 12 +- drivers/mempool/octeontx2/otx2_mempool.c | 2 +- drivers/net/atlantic/atl_ethdev.c | 20 +- drivers/net/avp/avp_ethdev.c | 8 +- drivers/net/axgbe/axgbe_ethdev.c | 12 +- drivers/net/axgbe/axgbe_mdio.c | 6 +- drivers/net/bnx2x/bnx2x_ethdev.c | 10 +- drivers/net/bnxt/bnxt_ethdev.c | 33 +- drivers/net/bnxt/bnxt_irq.c | 4 +- drivers/net/dpaa/dpaa_ethdev.c | 47 +- drivers/net/dpaa2/dpaa2_ethdev.c | 10 +- drivers/net/e1000/em_ethdev.c | 23 +- drivers/net/e1000/igb_ethdev.c | 79 +-- drivers/net/ena/ena_ethdev.c | 35 +- drivers/net/enic/enic_main.c | 26 +- drivers/net/failsafe/failsafe.c | 22 +- drivers/net/failsafe/failsafe_intr.c | 43 +- drivers/net/failsafe/failsafe_ops.c | 21 +- drivers/net/failsafe/failsafe_private.h | 2 +- drivers/net/fm10k/fm10k_ethdev.c | 32 +- drivers/net/hinic/hinic_pmd_ethdev.c | 10 +- drivers/net/hns3/hns3_ethdev.c | 57 +- drivers/net/hns3/hns3_ethdev_vf.c | 64 +- drivers/net/hns3/hns3_rxtx.c | 2 +- drivers/net/i40e/i40e_ethdev.c | 53 +- drivers/net/iavf/iavf_ethdev.c | 42 +- drivers/net/iavf/iavf_vchnl.c | 4 +- drivers/net/ice/ice_dcf.c | 10 +- drivers/net/ice/ice_dcf_ethdev.c | 21 +- drivers/net/ice/ice_ethdev.c | 49 +- drivers/net/igc/igc_ethdev.c | 45 +- drivers/net/ionic/ionic_ethdev.c | 17 +- drivers/net/ixgbe/ixgbe_ethdev.c | 66 +- drivers/net/memif/memif_socket.c | 108 ++- drivers/net/memif/memif_socket.h | 4 +- drivers/net/memif/rte_eth_memif.c | 59 +- drivers/net/memif/rte_eth_memif.h | 2 +- drivers/net/mlx4/mlx4.c | 18 +- drivers/net/mlx4/mlx4.h | 2 +- drivers/net/mlx4/mlx4_intr.c | 47 +- drivers/net/mlx5/linux/mlx5_os.c | 51 +- drivers/net/mlx5/linux/mlx5_socket.c | 24 +- drivers/net/mlx5/mlx5.h | 6 +- drivers/net/mlx5/mlx5_rxq.c | 42 +- drivers/net/mlx5/mlx5_trigger.c | 4 +- drivers/net/mlx5/mlx5_txpp.c | 25 +- drivers/net/netvsc/hn_ethdev.c | 4 +- drivers/net/nfp/nfp_common.c | 34 +- drivers/net/nfp/nfp_ethdev.c | 13 +- drivers/net/nfp/nfp_ethdev_vf.c | 13 +- drivers/net/ngbe/ngbe_ethdev.c | 29 +- drivers/net/octeontx2/otx2_ethdev_irq.c | 35 +- drivers/net/qede/qede_ethdev.c | 16 +- drivers/net/sfc/sfc_intr.c | 30 +- drivers/net/tap/rte_eth_tap.c | 35 +- drivers/net/tap/rte_eth_tap.h | 2 +- drivers/net/tap/tap_intr.c | 32 +- drivers/net/thunderx/nicvf_ethdev.c | 11 + drivers/net/thunderx/nicvf_struct.h | 2 +- drivers/net/txgbe/txgbe_ethdev.c | 34 +- drivers/net/txgbe/txgbe_ethdev_vf.c | 33 +- drivers/net/vhost/rte_eth_vhost.c | 75 +- drivers/net/virtio/virtio_ethdev.c | 21 +- .../net/virtio/virtio_user/virtio_user_dev.c | 47 +- drivers/net/vmxnet3/vmxnet3_ethdev.c | 43 +- drivers/raw/ifpga/ifpga_rawdev.c | 61 +- drivers/raw/ntb/ntb.c | 9 +- .../regex/octeontx2/otx2_regexdev_hw_access.c | 4 +- drivers/vdpa/ifc/ifcvf_vdpa.c | 5 +- drivers/vdpa/mlx5/mlx5_vdpa.c | 9 + drivers/vdpa/mlx5/mlx5_vdpa.h | 4 +- drivers/vdpa/mlx5/mlx5_vdpa_event.c | 22 +- drivers/vdpa/mlx5/mlx5_vdpa_virtq.c | 44 +- lib/bbdev/rte_bbdev.c | 4 +- lib/eal/common/eal_common_interrupts.c | 585 ++++++++++++++++ lib/eal/common/eal_private.h | 11 + lib/eal/common/malloc_heap.c | 19 +- lib/eal/common/malloc_heap.h | 3 + lib/eal/common/meson.build | 1 + lib/eal/freebsd/eal.c | 1 + lib/eal/freebsd/eal_alarm.c | 52 +- lib/eal/freebsd/eal_interrupts.c | 92 ++- lib/eal/include/meson.build | 2 +- lib/eal/include/rte_eal_interrupts.h | 269 -------- lib/eal/include/rte_eal_trace.h | 24 +- lib/eal/include/rte_epoll.h | 118 ++++ lib/eal/include/rte_interrupts.h | 648 +++++++++++++++++- lib/eal/linux/eal.c | 1 + lib/eal/linux/eal_alarm.c | 37 +- lib/eal/linux/eal_dev.c | 63 +- lib/eal/linux/eal_interrupts.c | 287 +++++--- lib/eal/version.map | 47 +- lib/ethdev/ethdev_pci.h | 2 +- lib/ethdev/rte_ethdev.c | 14 +- 134 files changed, 3568 insertions(+), 1709 deletions(-) create mode 100644 lib/eal/common/eal_common_interrupts.c delete mode 100644 lib/eal/include/rte_eal_interrupts.h create mode 100644 lib/eal/include/rte_epoll.h -- 2.18.0