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dpdk.org; dkim=none (message not signed) header.d=none;dpdk.org; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by BN8NAM11FT012.mail.protection.outlook.com (10.13.177.55) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4608.15 via Frontend Transport; Tue, 19 Oct 2021 20:56:27 +0000 Received: from nvidia.com (172.20.187.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Tue, 19 Oct 2021 20:56:22 +0000 From: To: CC: Matan Azrad , Thomas Monjalon , Michael Baum , Date: Tue, 19 Oct 2021 23:55:45 +0300 Message-ID: <20211019205602.3188203-2-michaelba@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211019205602.3188203-1-michaelba@nvidia.com> References: <20211006220350.2357487-1-michaelba@nvidia.com> <20211019205602.3188203-1-michaelba@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [172.20.187.6] X-ClientProxiedBy: HQMAIL101.nvidia.com (172.20.187.10) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 3812ea0d-674c-40ad-cd19-08d99342ebfa X-MS-TrafficTypeDiagnostic: BL0PR12MB4865: X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:5516; 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CAT:NONE; SFS:(4636009)(36840700001)(46966006)(5660300002)(36860700001)(47076005)(8676002)(4326008)(186003)(16526019)(70586007)(70206006)(83380400001)(6286002)(2906002)(7696005)(336012)(26005)(2876002)(8936002)(82310400003)(316002)(2616005)(55016002)(426003)(86362001)(54906003)(1076003)(36756003)(356005)(6916009)(7636003)(508600001)(6666004); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Oct 2021 20:56:27.9266 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3812ea0d-674c-40ad-cd19-08d99342ebfa X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT012.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL0PR12MB4865 Subject: [dpdk-dev] [PATCH v3 01/18] net/mlx5/windows: fix miss callback register for mem event X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Michael Baum In device initialization, the driver registers to free hugepages events. When husepage is released, this callback frees all its related MRs. In Windows initialization, this callback is not registered what may cause to use invalid memory. This patch adds memory event callback registration in Windows initialization. Fixes: 980826dc6f0f ("net/mlx5: probe on Windows") Cc: stable@dpdk.org Signed-off-by: Michael Baum Acked-by: Matan Azrad --- drivers/net/mlx5/windows/mlx5_os.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/net/mlx5/windows/mlx5_os.c b/drivers/net/mlx5/windows/mlx5_os.c index 149253d174..459414d5c2 100644 --- a/drivers/net/mlx5/windows/mlx5_os.c +++ b/drivers/net/mlx5/windows/mlx5_os.c @@ -122,8 +122,21 @@ mlx5_init_shared_data(void) static int mlx5_init_once(void) { + struct mlx5_shared_data *sd; + if (mlx5_init_shared_data()) return -rte_errno; + sd = mlx5_shared_data; + rte_spinlock_lock(&sd->lock); + MLX5_ASSERT(sd); + if (!sd->init_done) { + LIST_INIT(&sd->mem_event_cb_list); + rte_rwlock_init(&sd->mem_event_rwlock); + rte_mem_event_callback_register("MLX5_MEM_EVENT_CB", + mlx5_mr_mem_event_cb, NULL); + sd->init_done = true; + } + rte_spinlock_unlock(&sd->lock); return 0; } -- 2.25.1