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CAT:NONE; SFS:(4636009)(46966006)(36840700001)(7696005)(4326008)(36860700001)(54906003)(110136005)(7636003)(316002)(336012)(86362001)(426003)(70206006)(82310400003)(70586007)(5660300002)(2616005)(6666004)(8676002)(186003)(6286002)(16526019)(356005)(26005)(508600001)(55016002)(47076005)(1076003)(2906002)(36756003)(8936002); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2021 10:42:12.2737 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1989cbb7-5f9b-4c96-165f-08d9947f7109 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT058.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB4661 Subject: [dpdk-dev] [PATCH v13 3/7] app/testpmd: dump device capability and Rx domain info X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Dump device capability and Rx domain ID if shared Rx queue is supported by device. Signed-off-by: Xueming Li Acked-by: Andrew Rybchenko Acked-by: Xiaoyun Li Acked-by: Ajit Khaparde --- app/test-pmd/config.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/app/test-pmd/config.c b/app/test-pmd/config.c index 23aa334cda0..db36ca41b94 100644 --- a/app/test-pmd/config.c +++ b/app/test-pmd/config.c @@ -644,6 +644,29 @@ device_infos_display(const char *identifier) rte_devargs_reset(&da); } +static void +print_dev_capabilities(uint64_t capabilities) +{ + uint64_t single_capa; + int begin; + int end; + int bit; + + if (capabilities == 0) + return; + + begin = __builtin_ctzll(capabilities); + end = sizeof(capabilities) * CHAR_BIT - __builtin_clzll(capabilities); + + single_capa = 1ULL << begin; + for (bit = begin; bit < end; bit++) { + if (capabilities & single_capa) + printf(" %s", + rte_eth_dev_capability_name(single_capa)); + single_capa <<= 1; + } +} + void port_infos_display(portid_t port_id) { @@ -795,6 +818,9 @@ port_infos_display(portid_t port_id) printf("Max segment number per MTU/TSO: %hu\n", dev_info.tx_desc_lim.nb_mtu_seg_max); + printf("Device capabilities: 0x%"PRIx64"(", dev_info.dev_capa); + print_dev_capabilities(dev_info.dev_capa); + printf(" )\n"); /* Show switch info only if valid switch domain and port id is set */ if (dev_info.switch_info.domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) { @@ -805,6 +831,9 @@ port_infos_display(portid_t port_id) dev_info.switch_info.domain_id); printf("Switch Port Id: %u\n", dev_info.switch_info.port_id); + if ((dev_info.dev_capa & RTE_ETH_DEV_CAPA_RXQ_SHARE) != 0) + printf("Switch Rx domain: %u\n", + dev_info.switch_info.rx_domain); } } -- 2.33.0