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CAT:NONE; SFS:(4636009)(36840700001)(46966006)(83380400001)(7696005)(54906003)(186003)(55016002)(16526019)(36756003)(2616005)(8676002)(107886003)(4326008)(508600001)(36906005)(26005)(316002)(1076003)(82310400003)(356005)(86362001)(70206006)(336012)(426003)(36860700001)(8936002)(47076005)(5660300002)(7636003)(6286002)(6916009)(70586007)(2906002); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Oct 2021 09:12:40.2709 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f4bde297-6d49-49e7-58ec-08d9953c193e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT005.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR12MB1922 Subject: [dpdk-dev] [PATCH v4 5/8] net/mlx5: supports flow item of normal Tx queue X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Extends txq flow pattern to support both hairpin and regular txq. Signed-off-by: Xueming Li Acked-by: Viacheslav Ovsiienko --- drivers/net/mlx5/mlx5_flow_dv.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index 5b964153860..e505cdbb0f7 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -10818,22 +10818,22 @@ flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev, void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters); struct mlx5_txq_ctrl *txq; - uint32_t queue; - + uint32_t queue, mask; queue_m = (const void *)item->mask; - if (!queue_m) - return; queue_v = (const void *)item->spec; if (!queue_v) return; txq = mlx5_txq_get(dev, queue_v->queue); if (!txq) return; - queue = txq->obj->sq->id; - MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue); - MLX5_SET(fte_match_set_misc, misc_v, source_sqn, - queue & queue_m->queue); + if (txq->type == MLX5_TXQ_TYPE_HAIRPIN) + queue = txq->obj->sq->id; + else + queue = txq->obj->sq_obj.sq->id; + mask = queue_m == NULL ? UINT32_MAX : queue_m->queue; + MLX5_SET(fte_match_set_misc, misc_m, source_sqn, mask); + MLX5_SET(fte_match_set_misc, misc_v, source_sqn, queue & mask); mlx5_txq_release(dev, queue_v->queue); } -- 2.33.0