From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 00DF8A0C45; Mon, 25 Oct 2021 05:55:44 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 87C9B407FF; Mon, 25 Oct 2021 05:55:44 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 9395E4003E for ; Mon, 25 Oct 2021 05:55:43 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 19P0E5Dc015522 for ; Sun, 24 Oct 2021 20:55:42 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=fJ9Rpp8Okt3AlnTtX2jxtRUyd5Viuges4Kq0tI7H7ko=; b=hTJemj5Dwqf5mVcPLkV4FkIPOqCbGCbjldJkERv2cLV5YXdgaqBUzOa9KT1Tq5Ysd6Ir f42zWnkSXwSzEOAjIrhaoIlFuHaleMjABBM57RniOF+bU/K60+pgWvfit9MJ+wYUHxWs UMk740BRL+EA7Or/MPW/HuZ5xjtGtbwQzuORDuhhOiC7KAch0a7R0kdAQ2jwEwld9CgF CAxU56Arh4w3R/zuXWL/amwnw3d8z6sZ+UQhsjapP6XbA6uLDMZa3lSDf5ygSBqwGHvN qGd2f+0h5W4GguCnHi2Id3YQ+hMdxiEr9iqcg/UW1NXQ7SkHntH3fq0OYQE3uxkaqoAc Mg== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com with ESMTP id 3bwhv1rg24-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Sun, 24 Oct 2021 20:55:42 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Sun, 24 Oct 2021 20:55:40 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Sun, 24 Oct 2021 20:55:40 -0700 Received: from cavium-kiran.marvell.com (unknown [10.28.34.15]) by maili.marvell.com (Postfix) with ESMTP id 7D01B3F70BA; Sun, 24 Oct 2021 20:55:39 -0700 (PDT) From: To: Jerin Jacob , Nithin Dabilpuram CC: , Kiran Kumar K Date: Mon, 25 Oct 2021 09:25:25 +0530 Message-ID: <20211025035526.3169168-1-kirankumark@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: 7j6uw7hPwq-D0fI4s4sujyXq5OlMYAMV X-Proofpoint-GUID: 7j6uw7hPwq-D0fI4s4sujyXq5OlMYAMV X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-10-25_01,2021-10-25_01,2020-04-07_01 Subject: [dpdk-dev] [PATCH 1/2] common/octeontx2: sync mbox with AF X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Kiran Kumar K Sync mbox with AF, And bump up the version. Signed-off-by: Kiran Kumar K --- drivers/common/octeontx2/otx2_mbox.h | 30 ++++++++++++++++++---------- 1 file changed, 20 insertions(+), 10 deletions(-) diff --git a/drivers/common/octeontx2/otx2_mbox.h b/drivers/common/octeontx2/otx2_mbox.h index b435694db7..25b521a7fa 100644 --- a/drivers/common/octeontx2/otx2_mbox.h +++ b/drivers/common/octeontx2/otx2_mbox.h @@ -90,7 +90,7 @@ struct mbox_msghdr { #define OTX2_MBOX_RSP_SIG (0xbeef) /* Signature, for validating corrupted msgs */ uint16_t __otx2_io sig; -#define OTX2_MBOX_VERSION (0x000a) +#define OTX2_MBOX_VERSION (0x000b) /* Version of msg's structure for this ID */ uint16_t __otx2_io ver; /* Offset of next msg within mailbox region */ @@ -356,6 +356,7 @@ struct ready_msg_rsp { }; enum npc_pkind_type { + NPC_RX_CUSTOM_PRE_L2_PKIND = 55ULL, NPC_RX_VLAN_EXDSA_PKIND = 56ULL, NPC_RX_CHLEN24B_PKIND, NPC_RX_CPT_HDR_PKIND, @@ -373,18 +374,27 @@ enum npc_pkind_type { /* Struct to set pkind */ struct npc_set_pkind { struct mbox_msghdr hdr; -#define OTX2_PRIV_FLAGS_DEFAULT BIT_ULL(0) -#define OTX2_PRIV_FLAGS_EDSA BIT_ULL(1) -#define OTX2_PRIV_FLAGS_HIGIG BIT_ULL(2) -#define OTX2_PRIV_FLAGS_FDSA BIT_ULL(3) -#define OTX2_PRIV_FLAGS_EXDSA BIT_ULL(4) -#define OTX2_PRIV_FLAGS_VLAN_EXDSA BIT_ULL(5) -#define OTX2_PRIV_FLAGS_CUSTOM BIT_ULL(63) +#define OTX2_PRIV_FLAGS_DEFAULT BIT_ULL(0) +#define OTX2_PRIV_FLAGS_EDSA BIT_ULL(1) +#define OTX2_PRIV_FLAGS_HIGIG BIT_ULL(2) +#define OTX2_PRIV_FLAGS_FDSA BIT_ULL(3) +#define OTX2_PRIV_FLAGS_EXDSA BIT_ULL(4) +#define OTX2_PRIV_FLAGS_VLAN_EXDSA BIT_ULL(5) +#define OTX2_PRIV_FLAGS_CUSTOM BIT_ULL(63) uint64_t __otx2_io mode; -#define PKIND_TX BIT_ULL(0) -#define PKIND_RX BIT_ULL(1) +#define PKIND_TX BIT_ULL(0) +#define PKIND_RX BIT_ULL(1) uint8_t __otx2_io dir; uint8_t __otx2_io pkind; /* valid only in case custom flag */ + uint8_t __otx2_io var_len_off; + /* Offset of custom header length field. + * Valid only for pkind NPC_RX_CUSTOM_PRE_L2_PKIND + */ + uint8_t __otx2_io var_len_off_mask; /* Mask for length with in offset */ + uint8_t __otx2_io shift_dir; + /* Shift direction to get length of the + * header at var_len_off + */ }; /* Structure for requesting resource provisioning. -- 2.25.1