From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9CF4CA0C47; Tue, 26 Oct 2021 06:13:27 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 153FD40A4B; Tue, 26 Oct 2021 06:13:27 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id D61324003E for ; Tue, 26 Oct 2021 06:13:24 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 19PLKxk2012626; Mon, 25 Oct 2021 21:13:24 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=Fd084egjB+iuMAObW2F8Dl6rpYZXLIVOgUuvCEPmNcM=; b=WfFMd3EBGmbM2kLxN5RYfEBKvi501aDbUEOmdhWuMb8u6pIMhm27n+rU3ZEYDyn2MhsK KoONP/SUQHZClD5YwQaJ7ROIi33HTPRGQBJiOVMIEYw4kY0rPXxWqkgWQ47SoBCRnzfY 5UlS+yqwu4CS6ZpMbncKA4WKBaTPay1dm8Cbw9iBw7jQ+kzGkHXwihQoBNj1yNNBUheL NJfGrlN7KYgUoQ4t0bvC7mxTJZuT8ulf3mtRUdVsPtCGAKBO/InZkCbTGm8EngJloFs2 gw8DfYCIBzvl8l4kkU62T6hNd25Dp5kfeENQD+9Anj+HqzAn/AIwY95sVmj8WqhiDL9B PQ== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 3bx4dx196y-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 25 Oct 2021 21:13:23 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 25 Oct 2021 21:13:21 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Mon, 25 Oct 2021 21:13:21 -0700 Received: from rchintakuntla-lnx3.caveonetworks.com (unknown [10.111.140.81]) by maili.marvell.com (Postfix) with ESMTP id CFDA53F708F; Mon, 25 Oct 2021 21:13:21 -0700 (PDT) From: Radha Mohan Chintakuntla To: , , , , , , , CC: , Radha Mohan Chintakuntla Date: Mon, 25 Oct 2021 21:12:58 -0700 Message-ID: <20211026041300.28924-2-radhac@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211026041300.28924-1-radhac@marvell.com> References: <20211026041300.28924-1-radhac@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-GUID: FDFYxveDF_BJWknFxnvr9LA8m2SBp6Sr X-Proofpoint-ORIG-GUID: FDFYxveDF_BJWknFxnvr9LA8m2SBp6Sr X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-10-25_08,2021-10-25_02,2020-04-07_01 Subject: [dpdk-dev] [PATCH 2/4] dma/cnxk: create and initialize dmadev on pci probe X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch creates and initializes a dmadev device on pci probe. Signed-off-by: Radha Mohan Chintakuntla --- MAINTAINERS | 7 +- doc/guides/dmadevs/cnxk.rst | 53 +++++++++++++++ doc/guides/dmadevs/index.rst | 1 + drivers/dma/cnxk/cnxk_dmadev.c | 119 +++++++++++++++++++++++++++++++++ drivers/dma/cnxk/cnxk_dmadev.h | 11 +++ drivers/dma/cnxk/meson.build | 7 ++ drivers/dma/meson.build | 1 + 7 files changed, 198 insertions(+), 1 deletion(-) create mode 100644 doc/guides/dmadevs/cnxk.rst create mode 100644 drivers/dma/cnxk/cnxk_dmadev.c create mode 100644 drivers/dma/cnxk/cnxk_dmadev.h create mode 100644 drivers/dma/cnxk/meson.build diff --git a/MAINTAINERS b/MAINTAINERS index be2c9b6815..cdc2d98a6b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1186,7 +1186,6 @@ F: drivers/compress/zlib/ F: doc/guides/compressdevs/zlib.rst F: doc/guides/compressdevs/features/zlib.ini - DMAdev Drivers -------------- @@ -1202,6 +1201,12 @@ M: Conor Walsh F: drivers/dma/ioat/ F: doc/guides/dmadevs/ioat.rst +Marvell CNXK DPI DMA +M: Radha Mohan Chintakuntla +M: Veerasenareddy Burru +F: drivers/dma/cnxk/ +F: doc/guides/dmadevs/cnxk.rst + RegEx Drivers ------------- diff --git a/doc/guides/dmadevs/cnxk.rst b/doc/guides/dmadevs/cnxk.rst new file mode 100644 index 0000000000..8ae7c1f8cd --- /dev/null +++ b/doc/guides/dmadevs/cnxk.rst @@ -0,0 +1,53 @@ +.. SPDX-License-Identifier: BSD-3-Clause + Copyright(c) 2021 Marvell International Ltd. + +.. include:: + +CNXK DMA Device Driver +====================== + +The ``cnxk`` dmadev driver provides a poll-mode driver (PMD) for Marvell DPI DMA +Hardware Accelerator block found in OCTEONTX2 and OCTEONTX3 family of SoCs. Each +DMA queue is exposed as a VF function when SRIOV is enabled. + +The block supports following modes of DMA transfers + +#. Internal - DMA within SoC DRAM to DRAM + +#. Inbound - Host DRAM to SoC DRAM when SoC is in PCIe Endpoint + +#. Outbound - SoC DRAM to Host DRAM when SoC is in PCIe Endpoint + +Device Setup +------------- +The ``dpdk-devbind.py`` script, included with DPDK, can be used to show the +presence of supported hardware. Running ``dpdk-devbind.py --status-dev dma`` +will show all the CNXK DMA devices. + +Devices using VFIO drivers +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +The HW devices to be used will need to be bound to a user-space IO driver for use. +The ``dpdk-devbind.py`` script can be used to view the state of the devices +and to bind them to a suitable DPDK-supported driver, such as ``vfio-pci``. +For example:: + + $ dpdk-devbind.py -b vfio-pci 0000:05:00.1 + +Device Probing and Initialization +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +To use the devices from an application, the dmadev API can be used. +CNXK DMA device configuration requirements: + +* Only one ``vchan`` is supported per device. +* CNXK DMA devices do not support silent mode. + +Once configured, the device can then be made ready for use by calling the + ``rte_dma_start()`` API. + +Performing Data Copies +~~~~~~~~~~~~~~~~~~~~~~~ + +Refer to the :ref:`Enqueue / Dequeue APIs ` section of the dmadev library +documentation for details on operation enqueue and submission API usage. diff --git a/doc/guides/dmadevs/index.rst b/doc/guides/dmadevs/index.rst index 20476039a5..227fa00c68 100644 --- a/doc/guides/dmadevs/index.rst +++ b/doc/guides/dmadevs/index.rst @@ -11,5 +11,6 @@ an application through DMA API. :maxdepth: 2 :numbered: + cnxk idxd ioat diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c new file mode 100644 index 0000000000..620766743d --- /dev/null +++ b/drivers/dma/cnxk/cnxk_dmadev.c @@ -0,0 +1,119 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright (C) 2021 Marvell International Ltd. + */ + +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +static int +cnxk_dmadev_probe(struct rte_pci_driver *pci_drv __rte_unused, + struct rte_pci_device *pci_dev) +{ + struct cnxk_dpi_vf_s *dpivf = NULL; + char name[RTE_DEV_NAME_MAX_LEN]; + struct rte_dma_dev *dmadev; + struct roc_dpi *rdpi = NULL; + int rc; + + if (!pci_dev->mem_resource[0].addr) + return -ENODEV; + + rc = roc_plt_init(); + if (rc) { + plt_err("Failed to initialize platform model, rc=%d", rc); + return rc; + } + memset(name, 0, sizeof(name)); + rte_pci_device_name(&pci_dev->addr, name, sizeof(name)); + + dmadev = rte_dma_pmd_allocate(name, pci_dev->device.numa_node, + sizeof(*dpivf)); + if (dmadev == NULL) { + plt_err("dma device allocation failed for %s", name); + return -ENOMEM; + } + + dpivf = dmadev->data->dev_private; + + dmadev->device = &pci_dev->device; + dmadev->fp_obj->dev_private = dpivf; + + rdpi = &dpivf->rdpi; + + rdpi->pci_dev = pci_dev; + rc = roc_dpi_dev_init(rdpi); + if (rc < 0) + goto err_out_free; + + return 0; + +err_out_free: + if (dmadev) + rte_dma_pmd_release(name); + + return rc; +} + +static int +cnxk_dmadev_remove(struct rte_pci_device *pci_dev) +{ + char name[RTE_DEV_NAME_MAX_LEN]; + struct rte_dma_dev *dmadev; + struct cnxk_dpi_vf_s *dpivf; + int dev_id; + + memset(name, 0, sizeof(name)); + rte_pci_device_name(&pci_dev->addr, name, sizeof(name)); + + dev_id = rte_dma_get_dev_id_by_name(name); + if (dev_id < 0) { + plt_err("Invalid device ID"); + return -EINVAL; + } + + dmadev = &rte_dma_devices[dev_id]; + if (!dmadev) { + plt_err("dmadev with name %s not found\n", name); + return -ENODEV; + } + + dpivf = dmadev->fp_obj->dev_private; + roc_dpi_queue_stop(&dpivf->rdpi); + roc_dpi_dev_fini(&dpivf->rdpi); + + return rte_dma_pmd_release(name); +} + +static const struct rte_pci_id cnxk_dma_pci_map[] = { + { + RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, + PCI_DEVID_CNXK_DPI_VF) + }, + { + .vendor_id = 0, + }, +}; + +static struct rte_pci_driver cnxk_dmadev = { + .id_table = cnxk_dma_pci_map, + .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_NEED_IOVA_AS_VA, + .probe = cnxk_dmadev_probe, + .remove = cnxk_dmadev_remove, +}; + +RTE_PMD_REGISTER_PCI(cnxk_dmadev_pci_driver, cnxk_dmadev); +RTE_PMD_REGISTER_PCI_TABLE(cnxk_dmadev_pci_driver, cnxk_dma_pci_map); +RTE_PMD_REGISTER_KMOD_DEP(cnxk_dmadev_pci_driver, "vfio-pci"); diff --git a/drivers/dma/cnxk/cnxk_dmadev.h b/drivers/dma/cnxk/cnxk_dmadev.h new file mode 100644 index 0000000000..9e0bb7b2ce --- /dev/null +++ b/drivers/dma/cnxk/cnxk_dmadev.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell International Ltd. + */ +#ifndef _CNXK_DMADEV_H_ +#define _CNXK_DMADEV_H_ + +struct cnxk_dpi_vf_s { + struct roc_dpi rdpi; +}; + +#endif diff --git a/drivers/dma/cnxk/meson.build b/drivers/dma/cnxk/meson.build new file mode 100644 index 0000000000..9489d6e6dc --- /dev/null +++ b/drivers/dma/cnxk/meson.build @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(C) 2021 Marvell International Ltd. +# + +deps += ['bus_pci', 'common_cnxk', 'dmadev'] +sources = files('cnxk_dmadev.c') +headers = files('cnxk_dmadev.h') diff --git a/drivers/dma/meson.build b/drivers/dma/meson.build index a69418ce9b..c562c8b429 100644 --- a/drivers/dma/meson.build +++ b/drivers/dma/meson.build @@ -2,6 +2,7 @@ # Copyright 2021 HiSilicon Limited drivers = [ + 'cnxk', 'idxd', 'ioat', 'skeleton', -- 2.17.1