From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B80DCA0547; Fri, 29 Oct 2021 00:16:00 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D6B494111A; Fri, 29 Oct 2021 00:15:57 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id BCF0641104 for ; Fri, 29 Oct 2021 00:15:56 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 19SIi5YG027066 for ; Thu, 28 Oct 2021 15:15:55 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=lyAL94UwsqqGUm9r3dVn+h2dZZdNFxuLzY/Qtm1WdYs=; b=T12cXyvj1/8ZA8CAmR39gjYYtMPePxHOJsp/KOC4ejSMjun2fk3eEgrgXEoX9UjWRZdp M5y3E7edbwXHpGpMO76fYW0GGAhKdYB5JV5rzPXCCBtrescLJ2e7V4Chy+LAQRrnnFuS seGfMFfyFMd03wVUCyHHQielYNF70yRg/fNgNlsQlcoAPr0MVnQA5ljGkLJC2Y0T2fQM SCNefh/A0GuVNIl6q0Zc0/oekcdinNk3+PQX1QIUxq38Z6dJXKikOxmxFUIUWNnDXFoQ 4CCllKIZuqBCHbNAuIkKREq/kaqPxS0o++oNtkVa4wmWDuj+C0/HOjnY99UQeZmecmCV gQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com with ESMTP id 3byrpg3e5s-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Thu, 28 Oct 2021 15:15:55 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 28 Oct 2021 15:15:54 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Thu, 28 Oct 2021 15:15:54 -0700 Received: from localhost.localdomain (unknown [10.28.34.39]) by maili.marvell.com (Postfix) with ESMTP id C2BA93F70C0; Thu, 28 Oct 2021 15:15:52 -0700 (PDT) From: Volodymyr Fialko To: , Ashwin Sekhar T K , Pavan Nikhilesh CC: , Volodymyr Fialko Date: Fri, 29 Oct 2021 00:14:46 +0200 Message-ID: <20211028221446.2455303-4-vfialko@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211028221446.2455303-1-vfialko@marvell.com> References: <20211028221446.2455303-1-vfialko@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: tZpG0T_uvy5OolC7B8EpuiDWO08LSN4n X-Proofpoint-GUID: tZpG0T_uvy5OolC7B8EpuiDWO08LSN4n X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-10-28_06,2021-10-26_01,2020-04-07_01 Subject: [dpdk-dev] [PATCH 3/3] mempool/cnxk: parse max pools during npa initialization X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Register callback for max_pools argument parsing Signed-off-by: Volodymyr Fialko Reviewed-by: Jerin Jacob --- drivers/mempool/cnxk/cnxk_mempool.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/mempool/cnxk/cnxk_mempool.c b/drivers/mempool/cnxk/cnxk_mempool.c index 828bf3fc36..beefb90048 100644 --- a/drivers/mempool/cnxk/cnxk_mempool.c +++ b/drivers/mempool/cnxk/cnxk_mempool.c @@ -65,6 +65,13 @@ parse_max_pools(struct rte_devargs *devargs) return max_pools; } +static int +cnxk_mempool_plt_parse_devargs(struct rte_pci_device *pci_dev) +{ + roc_idev_npa_maxpools_set(parse_max_pools(pci_dev->device.devargs)); + return 0; +} + static inline char * npa_dev_to_name(struct rte_pci_device *pci_dev, char *name) { @@ -92,7 +99,6 @@ npa_init(struct rte_pci_device *pci_dev) dev = mz->addr; dev->pci_dev = pci_dev; - roc_idev_npa_maxpools_set(parse_max_pools(pci_dev->device.devargs)); rc = roc_npa_dev_init(dev); if (rc) goto mz_free; @@ -188,3 +194,8 @@ RTE_PMD_REGISTER_PCI_TABLE(mempool_cnxk, npa_pci_map); RTE_PMD_REGISTER_KMOD_DEP(mempool_cnxk, "vfio-pci"); RTE_PMD_REGISTER_PARAM_STRING(mempool_cnxk, CNXK_NPA_MAX_POOLS_PARAM "=<128-1048576>"); + +RTE_INIT(cnxk_mempool_parse_devargs) +{ + roc_npa_lf_init_cb_register(cnxk_mempool_plt_parse_devargs); +} -- 2.25.1