From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D6F06A0C4D; Tue, 2 Nov 2021 00:14:04 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8AD2A41145; Tue, 2 Nov 2021 00:13:21 +0100 (CET) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by mails.dpdk.org (Postfix) with ESMTP id C635341125 for ; Tue, 2 Nov 2021 00:13:18 +0100 (CET) X-IronPort-AV: E=McAfee;i="6200,9189,10155"; a="211195510" X-IronPort-AV: E=Sophos;i="5.87,201,1631602800"; d="scan'208";a="211195510" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Nov 2021 16:13:18 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,201,1631602800"; d="scan'208";a="500254054" Received: from silpixa00400272.ir.intel.com (HELO silpixa00400272.ger.corp.intel.com) ([10.237.223.111]) by orsmga008.jf.intel.com with ESMTP; 01 Nov 2021 16:13:17 -0700 From: Kai Ji To: dev@dpdk.org Cc: Kai Ji Date: Mon, 1 Nov 2021 23:12:55 +0000 Message-Id: <20211101231257.7629-6-kai.ji@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211101231257.7629-1-kai.ji@intel.com> References: <20211026172518.20183-1-kai.ji@intel.com> <20211101231257.7629-1-kai.ji@intel.com> Subject: [dpdk-dev] [dpdk-dev v2 5/7] crypto/qat: qat driver datapath rework X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch introduce op_build_request func in qat enqueue op burst. Add-in qat_dequeue_process_response in qat dequeue op burst. Enable session build request op based on crypto operation Signed-off-by: Kai Ji Acked-by: Fan Zhang --- drivers/common/qat/meson.build | 4 +- drivers/common/qat/qat_qp.c | 60 +++++--------------- drivers/common/qat/qat_qp.h | 32 +++++++---- drivers/compress/qat/qat_comp_pmd.c | 12 +++- drivers/crypto/qat/dev/qat_crypto_pmd_gen2.c | 4 +- drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c | 4 +- drivers/crypto/qat/dev/qat_sym_pmd_gen1.c | 2 +- drivers/crypto/qat/qat_asym_refactor.c | 4 +- drivers/crypto/qat/qat_asym_refactor.h | 2 +- drivers/crypto/qat/qat_sym_hw_dp.c | 2 +- drivers/crypto/qat/qat_sym_refactor.c | 51 +---------------- drivers/crypto/qat/qat_sym_refactor.h | 2 +- 12 files changed, 57 insertions(+), 122 deletions(-) diff --git a/drivers/common/qat/meson.build b/drivers/common/qat/meson.build index ce9959d103..b7b18b6c0f 100644 --- a/drivers/common/qat/meson.build +++ b/drivers/common/qat/meson.build @@ -70,8 +70,8 @@ if qat_compress endif if qat_crypto - foreach f: ['qat_sym_pmd.c', 'qat_sym.c', 'qat_sym_session.c', - 'qat_sym_hw_dp.c', 'qat_asym_pmd.c', 'qat_asym.c', 'qat_crypto.c', + foreach f: ['qat_sym_refactor.c', 'qat_sym_session.c', + 'qat_sym_hw_dp.c', 'qat_asym_refactor.c', 'qat_crypto.c', 'dev/qat_sym_pmd_gen1.c', 'dev/qat_asym_pmd_gen1.c', 'dev/qat_crypto_pmd_gen2.c', diff --git a/drivers/common/qat/qat_qp.c b/drivers/common/qat/qat_qp.c index 0fda890075..82adda0698 100644 --- a/drivers/common/qat/qat_qp.c +++ b/drivers/common/qat/qat_qp.c @@ -15,8 +15,8 @@ #include "qat_logs.h" #include "qat_device.h" #include "qat_qp.h" -#include "qat_sym.h" -#include "qat_asym.h" +#include "qat_sym_refactor.h" +#include "qat_asym_refactor.h" #include "qat_comp.h" #define QAT_CQ_MAX_DEQ_RETRIES 10 @@ -550,23 +550,8 @@ adf_modulo(uint32_t data, uint32_t modulo_mask) } uint16_t -refactor_qat_enqueue_op_burst(__rte_unused void *qp, - __rte_unused qat_op_build_request_t op_build_request, - __rte_unused void **ops, __rte_unused uint16_t nb_ops) -{ - return 0; -} - -uint16_t -refactor_qat_dequeue_op_burst(__rte_unused void *qp, __rte_unused void **ops, - __rte_unused qat_op_dequeue_t qat_dequeue_process_response, - __rte_unused uint16_t nb_ops) -{ - return 0; -} - -uint16_t -qat_enqueue_op_burst(void *qp, void **ops, uint16_t nb_ops) +qat_enqueue_op_burst(void *qp, qat_op_build_request_t op_build_request, + void **ops, uint16_t nb_ops) { register struct qat_queue *queue; struct qat_qp *tmp_qp = (struct qat_qp *)qp; @@ -616,29 +601,18 @@ qat_enqueue_op_burst(void *qp, void **ops, uint16_t nb_ops) } } -#ifdef BUILD_QAT_SYM +#ifdef RTE_LIB_SECURITY if (tmp_qp->service_type == QAT_SERVICE_SYMMETRIC) qat_sym_preprocess_requests(ops, nb_ops_possible); #endif + memset(tmp_qp->opaque, 0xff, sizeof(tmp_qp->opaque)); + while (nb_ops_sent != nb_ops_possible) { - if (tmp_qp->service_type == QAT_SERVICE_SYMMETRIC) { -#ifdef BUILD_QAT_SYM - ret = qat_sym_build_request(*ops, base_addr + tail, - tmp_qp->op_cookies[tail >> queue->trailz], - tmp_qp->qat_dev_gen); -#endif - } else if (tmp_qp->service_type == QAT_SERVICE_COMPRESSION) { - ret = qat_comp_build_request(*ops, base_addr + tail, - tmp_qp->op_cookies[tail >> queue->trailz], - tmp_qp->qat_dev_gen); - } else if (tmp_qp->service_type == QAT_SERVICE_ASYMMETRIC) { -#ifdef BUILD_QAT_ASYM - ret = qat_asym_build_request(*ops, base_addr + tail, + ret = op_build_request(*ops, base_addr + tail, tmp_qp->op_cookies[tail >> queue->trailz], - tmp_qp->qat_dev_gen); -#endif - } + tmp_qp->opaque, tmp_qp->qat_dev_gen); + if (ret != 0) { tmp_qp->stats.enqueue_err_count++; /* This message cannot be enqueued */ @@ -833,7 +807,8 @@ qat_enqueue_comp_op_burst(void *qp, void **ops, uint16_t nb_ops) } uint16_t -qat_dequeue_op_burst(void *qp, void **ops, uint16_t nb_ops) +qat_dequeue_op_burst(void *qp, void **ops, + qat_op_dequeue_t qat_dequeue_process_response, uint16_t nb_ops) { struct qat_queue *rx_queue; struct qat_qp *tmp_qp = (struct qat_qp *)qp; @@ -851,19 +826,10 @@ qat_dequeue_op_burst(void *qp, void **ops, uint16_t nb_ops) nb_fw_responses = 1; - if (tmp_qp->service_type == QAT_SERVICE_SYMMETRIC) - qat_sym_process_response(ops, resp_msg, - tmp_qp->op_cookies[head >> rx_queue->trailz]); - else if (tmp_qp->service_type == QAT_SERVICE_COMPRESSION) - nb_fw_responses = qat_comp_process_response( + nb_fw_responses = qat_dequeue_process_response( ops, resp_msg, tmp_qp->op_cookies[head >> rx_queue->trailz], &tmp_qp->stats.dequeue_err_count); -#ifdef BUILD_QAT_ASYM - else if (tmp_qp->service_type == QAT_SERVICE_ASYMMETRIC) - qat_asym_process_response(ops, resp_msg, - tmp_qp->op_cookies[head >> rx_queue->trailz]); -#endif head = adf_modulo(head + rx_queue->msg_size, rx_queue->modulo_mask); diff --git a/drivers/common/qat/qat_qp.h b/drivers/common/qat/qat_qp.h index b1350cdaf4..b1829e122b 100644 --- a/drivers/common/qat/qat_qp.h +++ b/drivers/common/qat/qat_qp.h @@ -14,6 +14,24 @@ struct qat_pci_device; +/* Default qp configuration for GEN4 devices */ +#define QAT_GEN4_QP_DEFCON (QAT_SERVICE_SYMMETRIC | \ + QAT_SERVICE_SYMMETRIC << 8 | \ + QAT_SERVICE_SYMMETRIC << 16 | \ + QAT_SERVICE_SYMMETRIC << 24) + +/* QAT GEN 4 specific macros */ +#define QAT_GEN4_BUNDLE_NUM 4 +#define QAT_GEN4_QPS_PER_BUNDLE_NUM 1 + +/* Queue pair setup error codes */ +#define QAT_NOMEM 1 +#define QAT_QP_INVALID_DESC_NO 2 +#define QAT_QP_BUSY 3 +#define QAT_PCI_NO_RESOURCE 4 + +#define ADF_ARB_RINGSRVARBEN_OFFSET 0x19C + /** * Structure associated with each queue. */ @@ -124,21 +142,15 @@ struct qat_qp_config { }; uint16_t -refactor_qat_enqueue_op_burst(void *qp, qat_op_build_request_t op_build_request, +qat_enqueue_op_burst(void *qp, qat_op_build_request_t op_build_request, void **ops, uint16_t nb_ops); -uint16_t -refactor_qat_dequeue_op_burst(void *qp, void **ops, - qat_op_dequeue_t qat_dequeue_process_response, uint16_t nb_ops); - -uint16_t -qat_enqueue_op_burst(void *qp, void **ops, uint16_t nb_ops); - uint16_t qat_enqueue_comp_op_burst(void *qp, void **ops, uint16_t nb_ops); uint16_t -qat_dequeue_op_burst(void *qp, void **ops, uint16_t nb_ops); +qat_dequeue_op_burst(void *qp, void **ops, + qat_op_dequeue_t qat_dequeue_process_response, uint16_t nb_ops); int qat_qp_release(enum qat_device_gen qat_dev_gen, struct qat_qp **qp_addr); @@ -150,7 +162,7 @@ qat_qp_setup(struct qat_pci_device *qat_dev, int qat_qps_per_service(struct qat_pci_device *qat_dev, - enum qat_service_type service); + enum qat_service_type service); const struct qat_qp_hw_data * qat_qp_get_hw_data(struct qat_pci_device *qat_dev, diff --git a/drivers/compress/qat/qat_comp_pmd.c b/drivers/compress/qat/qat_comp_pmd.c index 9b24d46e97..2f17f8825e 100644 --- a/drivers/compress/qat/qat_comp_pmd.c +++ b/drivers/compress/qat/qat_comp_pmd.c @@ -616,11 +616,18 @@ static struct rte_compressdev_ops compress_qat_dummy_ops = { .private_xform_free = qat_comp_private_xform_free }; +static uint16_t +qat_comp_dequeue_burst(void *qp, struct rte_comp_op **ops, uint16_t nb_ops) +{ + return qat_dequeue_op_burst(qp, (void **)ops, qat_comp_process_response, + nb_ops); +} + static uint16_t qat_comp_pmd_dequeue_first_op_burst(void *qp, struct rte_comp_op **ops, uint16_t nb_ops) { - uint16_t ret = qat_dequeue_op_burst(qp, (void **)ops, nb_ops); + uint16_t ret = qat_comp_dequeue_burst(qp, ops, nb_ops); struct qat_qp *tmp_qp = (struct qat_qp *)qp; if (ret) { @@ -638,8 +645,7 @@ qat_comp_pmd_dequeue_first_op_burst(void *qp, struct rte_comp_op **ops, } else { tmp_qp->qat_dev->comp_dev->compressdev->dequeue_burst = - (compressdev_dequeue_pkt_burst_t) - qat_dequeue_op_burst; + qat_comp_dequeue_burst; } } return ret; diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gen2.c b/drivers/crypto/qat/dev/qat_crypto_pmd_gen2.c index 72609703f9..86c124f6c8 100644 --- a/drivers/crypto/qat/dev/qat_crypto_pmd_gen2.c +++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gen2.c @@ -5,8 +5,8 @@ #include #include #include "qat_sym_session.h" -#include "qat_sym.h" -#include "qat_asym.h" +#include "qat_sym_refactor.h" +#include "qat_asym_refactor.h" #include "qat_crypto.h" #include "qat_crypto_pmd_gens.h" diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c b/drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c index 167c95abcf..108e07ee7f 100644 --- a/drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c +++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c @@ -5,8 +5,8 @@ #include #include #include "qat_sym_session.h" -#include "qat_sym.h" -#include "qat_asym.h" +#include "qat_sym_refactor.h" +#include "qat_asym_refactor.h" #include "qat_crypto.h" #include "qat_crypto_pmd_gens.h" diff --git a/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c b/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c index b044c7b2d3..abd36c7f1c 100644 --- a/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c +++ b/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c @@ -13,7 +13,7 @@ #include "icp_qat_fw_la.h" #include "qat_sym_session.h" -#include "qat_sym.h" +#include "qat_sym_refactor.h" #include "qat_sym_session.h" #include "qat_crypto.h" #include "qat_crypto_pmd_gens.h" diff --git a/drivers/crypto/qat/qat_asym_refactor.c b/drivers/crypto/qat/qat_asym_refactor.c index 8e789920cb..3a9b1d4054 100644 --- a/drivers/crypto/qat/qat_asym_refactor.c +++ b/drivers/crypto/qat/qat_asym_refactor.c @@ -5,7 +5,7 @@ #include -#include +#include #include "icp_qat_fw_pke.h" #include "icp_qat_fw.h" @@ -14,7 +14,7 @@ #include "qat_device.h" #include "qat_logs.h" -#include "qat_asym.h" +#include "qat_asym_refactor.h" uint8_t qat_asym_driver_id; diff --git a/drivers/crypto/qat/qat_asym_refactor.h b/drivers/crypto/qat/qat_asym_refactor.h index 9ecabdbe8f..6d3d991bc7 100644 --- a/drivers/crypto/qat/qat_asym_refactor.h +++ b/drivers/crypto/qat/qat_asym_refactor.h @@ -5,7 +5,7 @@ #ifndef _QAT_ASYM_H_ #define _QAT_ASYM_H_ -#include +#include #include #include "icp_qat_fw_pke.h" #include "qat_device.h" diff --git a/drivers/crypto/qat/qat_sym_hw_dp.c b/drivers/crypto/qat/qat_sym_hw_dp.c index 94589458d0..af75ac2011 100644 --- a/drivers/crypto/qat/qat_sym_hw_dp.c +++ b/drivers/crypto/qat/qat_sym_hw_dp.c @@ -8,7 +8,7 @@ #include "icp_qat_fw.h" #include "icp_qat_fw_la.h" -#include "qat_sym.h" +#include "qat_sym_refactor.h" #include "qat_sym_pmd.h" #include "qat_sym_session.h" #include "qat_qp.h" diff --git a/drivers/crypto/qat/qat_sym_refactor.c b/drivers/crypto/qat/qat_sym_refactor.c index 0412902e70..82f078ff1e 100644 --- a/drivers/crypto/qat/qat_sym_refactor.c +++ b/drivers/crypto/qat/qat_sym_refactor.c @@ -10,7 +10,7 @@ #include #include -#include "qat_sym.h" +#include "qat_sym_refactor.h" #include "qat_crypto.h" #include "qat_qp.h" @@ -354,55 +354,6 @@ qat_sym_dev_destroy(struct qat_pci_device *qat_pci_dev) return 0; } -int -qat_sym_configure_dp_ctx(struct rte_cryptodev *dev, uint16_t qp_id, - struct rte_crypto_raw_dp_ctx *raw_dp_ctx, - enum rte_crypto_op_sess_type sess_type, - union rte_cryptodev_session_ctx session_ctx, uint8_t is_update) -{ - struct qat_cryptodev_private *internals = dev->data->dev_private; - enum qat_device_gen qat_dev_gen = internals->qat_dev->qat_dev_gen; - struct qat_crypto_gen_dev_ops *gen_dev_ops = - &qat_sym_gen_dev_ops[qat_dev_gen]; - struct qat_qp *qp; - struct qat_sym_session *ctx; - struct qat_sym_dp_ctx *dp_ctx; - - if (!gen_dev_ops->set_raw_dp_ctx) { - QAT_LOG(ERR, "Device GEN %u does not support raw data path", - qat_dev_gen); - return -ENOTSUP; - } - - qp = dev->data->queue_pairs[qp_id]; - dp_ctx = (struct qat_sym_dp_ctx *)raw_dp_ctx->drv_ctx_data; - - if (!is_update) { - memset(raw_dp_ctx, 0, sizeof(*raw_dp_ctx) + - sizeof(struct qat_sym_dp_ctx)); - raw_dp_ctx->qp_data = dev->data->queue_pairs[qp_id]; - dp_ctx->tail = qp->tx_q.tail; - dp_ctx->head = qp->rx_q.head; - dp_ctx->cached_enqueue = dp_ctx->cached_dequeue = 0; - } - - if (sess_type != RTE_CRYPTO_OP_WITH_SESSION) - return -EINVAL; - - ctx = (struct qat_sym_session *)get_sym_session_private_data( - session_ctx.crypto_sess, qat_sym_driver_id); - - dp_ctx->session = ctx; - - return gen_dev_ops->set_raw_dp_ctx(raw_dp_ctx, ctx); -} - -int -qat_sym_get_dp_ctx_size(struct rte_cryptodev *dev __rte_unused) -{ - return sizeof(struct qat_sym_dp_ctx); -} - static struct cryptodev_driver qat_crypto_drv; RTE_PMD_REGISTER_CRYPTO_DRIVER(qat_crypto_drv, cryptodev_qat_sym_driver, diff --git a/drivers/crypto/qat/qat_sym_refactor.h b/drivers/crypto/qat/qat_sym_refactor.h index d4bfe8f364..44feca8251 100644 --- a/drivers/crypto/qat/qat_sym_refactor.h +++ b/drivers/crypto/qat/qat_sym_refactor.h @@ -5,7 +5,7 @@ #ifndef _QAT_SYM_H_ #define _QAT_SYM_H_ -#include +#include #ifdef RTE_LIB_SECURITY #include #endif -- 2.17.1