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From: Nithin Dabilpuram <ndabilpuram@marvell.com>
To: <jerinj@marvell.com>, Nithin Dabilpuram <ndabilpuram@marvell.com>,
	"Kiran Kumar K" <kirankumark@marvell.com>,
	Sunil Kumar Kori <skori@marvell.com>,
	Satha Rao <skoteshwar@marvell.com>, Ray Kinsella <mdr@ashroe.eu>
Cc: <dev@dpdk.org>
Subject: [dpdk-dev] [PATCH 6/9] common/cnxk: support changing drop re flag after lf alloc
Date: Tue, 2 Nov 2021 21:24:17 +0530	[thread overview]
Message-ID: <20211102155421.486-6-ndabilpuram@marvell.com> (raw)
In-Reply-To: <20211102155421.486-1-ndabilpuram@marvell.com>

Add API to toggle drop_re flag after nix_lf_alloc() so that it
can be used to toggle it runtime.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
---
 drivers/common/cnxk/roc_mbox.h     |  1 +
 drivers/common/cnxk/roc_nix.c      |  1 +
 drivers/common/cnxk/roc_nix.h      |  1 +
 drivers/common/cnxk/roc_nix_ops.c  | 39 ++++++++++++++++++++++++++++++++++++++
 drivers/common/cnxk/roc_nix_priv.h |  1 +
 drivers/common/cnxk/version.map    |  1 +
 6 files changed, 44 insertions(+)

diff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h
index bf5495d..a7e7776 100644
--- a/drivers/common/cnxk/roc_mbox.h
+++ b/drivers/common/cnxk/roc_mbox.h
@@ -1075,6 +1075,7 @@ struct nix_rx_cfg {
 	struct mbox_msghdr hdr;
 #define NIX_RX_OL3_VERIFY BIT(0)
 #define NIX_RX_OL4_VERIFY BIT(1)
+#define NIX_RX_DROP_RE	  BIT(2)
 	uint8_t __io len_verify; /* Outer L3/L4 len check */
 #define NIX_RX_CSUM_OL4_VERIFY BIT(0)
 	uint8_t __io csum_verify; /* Outer L4 checksum verification */
diff --git a/drivers/common/cnxk/roc_nix.c b/drivers/common/cnxk/roc_nix.c
index c96b266..151d8c3 100644
--- a/drivers/common/cnxk/roc_nix.c
+++ b/drivers/common/cnxk/roc_nix.c
@@ -173,6 +173,7 @@ roc_nix_lf_alloc(struct roc_nix *roc_nix, uint32_t nb_rxq, uint32_t nb_txq,
 	if (rc)
 		goto fail;
 
+	nix->rx_cfg = rx_cfg;
 	nix->sqb_size = rsp->sqb_size;
 	nix->tx_chan_base = rsp->tx_chan_base;
 	nix->rx_chan_base = rsp->rx_chan_base;
diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index 8f36ce7..82d74de 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -445,6 +445,7 @@ int __roc_api roc_nix_lf_free(struct roc_nix *roc_nix);
 int __roc_api roc_nix_lf_inl_ipsec_cfg(struct roc_nix *roc_nix,
 				       struct roc_nix_ipsec_cfg *cfg, bool enb);
 int __roc_api roc_nix_cpt_ctx_cache_sync(struct roc_nix *roc_nix);
+int __roc_api roc_nix_rx_drop_re_set(struct roc_nix *roc_nix, bool ena);
 
 /* Debug */
 int __roc_api roc_nix_lf_get_reg_count(struct roc_nix *roc_nix);
diff --git a/drivers/common/cnxk/roc_nix_ops.c b/drivers/common/cnxk/roc_nix_ops.c
index 0e28302..04a78cf 100644
--- a/drivers/common/cnxk/roc_nix_ops.c
+++ b/drivers/common/cnxk/roc_nix_ops.c
@@ -450,3 +450,42 @@ roc_nix_eeprom_info_get(struct roc_nix *roc_nix,
 	mbox_memcpy(info->buf, rsp->fwdata.sfp_eeprom.buf, SFP_EEPROM_SIZE);
 	return 0;
 }
+
+int
+roc_nix_rx_drop_re_set(struct roc_nix *roc_nix, bool ena)
+{
+	struct nix *nix = roc_nix_to_nix_priv(roc_nix);
+	struct mbox *mbox = get_mbox(roc_nix);
+	struct nix_rx_cfg *req;
+	int rc = -EIO;
+
+	/* No-op if no change */
+	if (ena == !!(nix->rx_cfg & ROC_NIX_LF_RX_CFG_DROP_RE))
+		return 0;
+
+	req = mbox_alloc_msg_nix_set_rx_cfg(mbox);
+	if (req == NULL)
+		return rc;
+
+	if (ena)
+		req->len_verify |= NIX_RX_DROP_RE;
+	/* Keep other flags intact */
+	if (nix->rx_cfg & ROC_NIX_LF_RX_CFG_LEN_OL3)
+		req->len_verify |= NIX_RX_OL3_VERIFY;
+
+	if (nix->rx_cfg & ROC_NIX_LF_RX_CFG_LEN_OL4)
+		req->len_verify |= NIX_RX_OL4_VERIFY;
+
+	if (nix->rx_cfg & ROC_NIX_LF_RX_CFG_CSUM_OL4)
+		req->csum_verify |= NIX_RX_CSUM_OL4_VERIFY;
+
+	rc = mbox_process(mbox);
+	if (rc)
+		return rc;
+
+	if (ena)
+		nix->rx_cfg |= ROC_NIX_LF_RX_CFG_DROP_RE;
+	else
+		nix->rx_cfg &= ~ROC_NIX_LF_RX_CFG_DROP_RE;
+	return 0;
+}
diff --git a/drivers/common/cnxk/roc_nix_priv.h b/drivers/common/cnxk/roc_nix_priv.h
index 60a00a3..04575af 100644
--- a/drivers/common/cnxk/roc_nix_priv.h
+++ b/drivers/common/cnxk/roc_nix_priv.h
@@ -139,6 +139,7 @@ struct nix {
 	uint16_t msixoff;
 	uint8_t rx_pause;
 	uint8_t tx_pause;
+	uint64_t rx_cfg;
 	struct dev dev;
 	uint16_t cints;
 	uint16_t qints;
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index a90e5fc..a139f0d 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -211,6 +211,7 @@ INTERNAL {
 	roc_nix_rss_key_set;
 	roc_nix_rss_reta_get;
 	roc_nix_rss_reta_set;
+	roc_nix_rx_drop_re_set;
 	roc_nix_rx_queue_intr_disable;
 	roc_nix_rx_queue_intr_enable;
 	roc_nix_sq_dump;
-- 
2.8.4


  parent reply	other threads:[~2021-11-02 15:55 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-02 15:54 [dpdk-dev] [PATCH 1/9] common/cnxk: add code to write CPT CTX through microcode op Nithin Dabilpuram
2021-11-02 15:54 ` [dpdk-dev] [PATCH 2/9] common/cnxk: add CPT CTX sync mailbox API Nithin Dabilpuram
2021-11-02 15:54 ` [dpdk-dev] [PATCH 3/9] common/cnxk: support flow control on LBK Nithin Dabilpuram
2021-11-02 15:54 ` [dpdk-dev] [PATCH 4/9] common/cnxk: enable tm to listen on Rx pause frames Nithin Dabilpuram
2021-11-02 15:54 ` [dpdk-dev] [PATCH 5/9] common/cnxk: enable bp on CPT with inline inbound Nithin Dabilpuram
2021-11-02 15:54 ` Nithin Dabilpuram [this message]
2021-11-02 15:54 ` [dpdk-dev] [PATCH 7/9] net/cnxk: write CPT CTX through microcode op Nithin Dabilpuram
2021-11-02 15:54 ` [dpdk-dev] [PATCH 8/9] net/cnxk: allow fc on lbk and enable tm bp on Rx pause Nithin Dabilpuram
2021-11-02 15:54 ` [dpdk-dev] [PATCH 9/9] event/cnxk: disable drop re on vector enable for cn10k a0 Nithin Dabilpuram
2021-11-03 15:09 ` [dpdk-dev] [PATCH 1/9] common/cnxk: add code to write CPT CTX through microcode op Jerin Jacob

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