From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 38ACDA0C4E; Tue, 2 Nov 2021 16:55:21 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 10B3B426D4; Tue, 2 Nov 2021 16:54:50 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 647E74122E for ; Tue, 2 Nov 2021 16:54:48 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 1A2F87V9023823 for ; Tue, 2 Nov 2021 08:54:47 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=bYVUDdoCb68knBnUBnne2Sgru0RVqiPRQCKl/9TF7Ng=; b=jCkbCxNwlA9NDqXbmSwfJoa6taJCUA7kXGpKxtzl2uGBMN7CZx/Y/a1CPXfBJgJQUFZh 2FMZf0SfUqopB0pEeDJHqjiPxUs7eVHjtwzBvBh63C1UO65qiZ5wCReyolOst+qvNMS+ I9DSqN/WJgfDqDAUFzK20bVePj54sgNovWpaw/fr+rxX/67iyHFyX9EV7xIzy6EpwArb IUdhI8lLPdo6rexpH5D2tzyQ7+vLwxV6eBZQBd+l9PNiDEFMMReZOCBMkJ52wWEzoSTt 9NEsPbYCakiSAb3238+KAU8Mm7Vj8RyN3sNCCiFEq49EWUpJDHMuKie8MwxeBSOMR8TO GQ== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3c2ycvaw6q-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 02 Nov 2021 08:54:47 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Tue, 2 Nov 2021 08:54:45 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Tue, 2 Nov 2021 08:54:45 -0700 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 3EA995B6932; Tue, 2 Nov 2021 08:54:43 -0700 (PDT) From: Nithin Dabilpuram To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao CC: , Srujana Challa Date: Tue, 2 Nov 2021 21:24:18 +0530 Message-ID: <20211102155421.486-7-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20211102155421.486-1-ndabilpuram@marvell.com> References: <20211102155421.486-1-ndabilpuram@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-GUID: 8XSPWq_rexm3Wg_g2x5V8rjMV5Yb-6d5 X-Proofpoint-ORIG-GUID: 8XSPWq_rexm3Wg_g2x5V8rjMV5Yb-6d5 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-11-02_08,2021-11-02_01,2020-04-07_01 Subject: [dpdk-dev] [PATCH 7/9] net/cnxk: write CPT CTX through microcode op X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Srujana Challa Adds support to write CPT CTX through microcode op(SET_CTX/WRITE_SA) for cn10k inline mode. Signed-off-by: Srujana Challa --- drivers/net/cnxk/cn10k_ethdev_sec.c | 59 +++++++++++++++++++++---------------- drivers/net/cnxk/cnxk_ethdev.c | 49 +++++++++++++++++++++++++----- drivers/net/cnxk/cnxk_ethdev.h | 6 ++++ drivers/net/cnxk/cnxk_ethdev_sec.c | 1 + 4 files changed, 83 insertions(+), 32 deletions(-) diff --git a/drivers/net/cnxk/cn10k_ethdev_sec.c b/drivers/net/cnxk/cn10k_ethdev_sec.c index 82dc636..235c168 100644 --- a/drivers/net/cnxk/cn10k_ethdev_sec.c +++ b/drivers/net/cnxk/cn10k_ethdev_sec.c @@ -277,8 +277,8 @@ cn10k_eth_sec_session_create(void *device, roc_nix_inl_dev_lock(); if (inbound) { + struct roc_ot_ipsec_inb_sa *inb_sa, *inb_sa_dptr; struct cn10k_inb_priv_data *inb_priv; - struct roc_ot_ipsec_inb_sa *inb_sa; uintptr_t sa; PLT_STATIC_ASSERT(sizeof(struct cn10k_inb_priv_data) < @@ -307,10 +307,11 @@ cn10k_eth_sec_session_create(void *device, goto mempool_put; } - memset(inb_sa, 0, sizeof(struct roc_ot_ipsec_inb_sa)); + inb_sa_dptr = (struct roc_ot_ipsec_inb_sa *)dev->inb.sa_dptr; + memset(inb_sa_dptr, 0, sizeof(struct roc_ot_ipsec_inb_sa)); /* Fill inbound sa params */ - rc = cnxk_ot_ipsec_inb_sa_fill(inb_sa, ipsec, crypto); + rc = cnxk_ot_ipsec_inb_sa_fill(inb_sa_dptr, ipsec, crypto); if (rc) { plt_err("Failed to init inbound sa, rc=%d", rc); goto mempool_put; @@ -323,7 +324,7 @@ cn10k_eth_sec_session_create(void *device, inb_priv->userdata = conf->userdata; /* Save SA index/SPI in cookie for now */ - inb_sa->w1.s.cookie = rte_cpu_to_be_32(ipsec->spi); + inb_sa_dptr->w1.s.cookie = rte_cpu_to_be_32(ipsec->spi); /* Prepare session priv */ sess_priv.inb_sa = 1; @@ -339,9 +340,15 @@ cn10k_eth_sec_session_create(void *device, TAILQ_INSERT_TAIL(&dev->inb.list, eth_sec, entry); dev->inb.nb_sess++; + /* Sync session in context cache */ + rc = roc_nix_inl_ctx_write(&dev->nix, inb_sa_dptr, eth_sec->sa, + eth_sec->inb, + sizeof(struct roc_ot_ipsec_inb_sa)); + if (rc) + goto mempool_put; } else { + struct roc_ot_ipsec_outb_sa *outb_sa, *outb_sa_dptr; struct cn10k_outb_priv_data *outb_priv; - struct roc_ot_ipsec_outb_sa *outb_sa; struct cnxk_ipsec_outb_rlens *rlens; uint64_t sa_base = dev->outb.sa_base; uint32_t sa_idx; @@ -358,10 +365,11 @@ cn10k_eth_sec_session_create(void *device, outb_priv = roc_nix_inl_ot_ipsec_outb_sa_sw_rsvd(outb_sa); rlens = &outb_priv->rlens; - memset(outb_sa, 0, sizeof(struct roc_ot_ipsec_outb_sa)); + outb_sa_dptr = (struct roc_ot_ipsec_outb_sa *)dev->outb.sa_dptr; + memset(outb_sa_dptr, 0, sizeof(struct roc_ot_ipsec_outb_sa)); /* Fill outbound sa params */ - rc = cnxk_ot_ipsec_outb_sa_fill(outb_sa, ipsec, crypto); + rc = cnxk_ot_ipsec_outb_sa_fill(outb_sa_dptr, ipsec, crypto); if (rc) { plt_err("Failed to init outbound sa, rc=%d", rc); rc |= cnxk_eth_outb_sa_idx_put(dev, sa_idx); @@ -381,8 +389,8 @@ cn10k_eth_sec_session_create(void *device, sess_priv.roundup_byte = rlens->roundup_byte; sess_priv.roundup_len = rlens->roundup_len; sess_priv.partial_len = rlens->partial_len; - sess_priv.mode = outb_sa->w2.s.ipsec_mode; - sess_priv.outer_ip_ver = outb_sa->w2.s.outer_ip_ver; + sess_priv.mode = outb_sa_dptr->w2.s.ipsec_mode; + sess_priv.outer_ip_ver = outb_sa_dptr->w2.s.outer_ip_ver; /* Pointer from eth_sec -> outb_sa */ eth_sec->sa = outb_sa; @@ -392,12 +400,13 @@ cn10k_eth_sec_session_create(void *device, TAILQ_INSERT_TAIL(&dev->outb.list, eth_sec, entry); dev->outb.nb_sess++; + /* Sync session in context cache */ + rc = roc_nix_inl_ctx_write(&dev->nix, outb_sa_dptr, eth_sec->sa, + eth_sec->inb, + sizeof(struct roc_ot_ipsec_outb_sa)); + if (rc) + goto mempool_put; } - - /* Sync session in context cache */ - roc_nix_inl_sa_sync(&dev->nix, eth_sec->sa, eth_sec->inb, - ROC_NIX_INL_SA_OP_RELOAD); - if (inbound && inl_dev) roc_nix_inl_dev_unlock(); @@ -422,10 +431,9 @@ cn10k_eth_sec_session_destroy(void *device, struct rte_security_session *sess) { struct rte_eth_dev *eth_dev = (struct rte_eth_dev *)device; struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev); - struct roc_ot_ipsec_inb_sa *inb_sa; - struct roc_ot_ipsec_outb_sa *outb_sa; struct cnxk_eth_sec_sess *eth_sec; struct rte_mempool *mp; + void *sa_dptr; eth_sec = cnxk_eth_sec_sess_get_by_sess(dev, sess); if (!eth_sec) @@ -435,27 +443,28 @@ cn10k_eth_sec_session_destroy(void *device, struct rte_security_session *sess) roc_nix_inl_dev_lock(); if (eth_sec->inb) { - inb_sa = eth_sec->sa; /* Disable SA */ - inb_sa->w2.s.valid = 0; + sa_dptr = dev->inb.sa_dptr; + roc_nix_inl_inb_sa_init(sa_dptr); + roc_nix_inl_ctx_write(&dev->nix, sa_dptr, eth_sec->sa, + eth_sec->inb, + sizeof(struct roc_ot_ipsec_inb_sa)); TAILQ_REMOVE(&dev->inb.list, eth_sec, entry); dev->inb.nb_sess--; } else { - outb_sa = eth_sec->sa; /* Disable SA */ - outb_sa->w2.s.valid = 0; + sa_dptr = dev->outb.sa_dptr; + roc_nix_inl_outb_sa_init(sa_dptr); + roc_nix_inl_ctx_write(&dev->nix, sa_dptr, eth_sec->sa, + eth_sec->inb, + sizeof(struct roc_ot_ipsec_outb_sa)); /* Release Outbound SA index */ cnxk_eth_outb_sa_idx_put(dev, eth_sec->sa_idx); TAILQ_REMOVE(&dev->outb.list, eth_sec, entry); dev->outb.nb_sess--; } - - /* Sync session in context cache */ - roc_nix_inl_sa_sync(&dev->nix, eth_sec->sa, eth_sec->inb, - ROC_NIX_INL_SA_OP_RELOAD); - if (eth_sec->inl_dev) roc_nix_inl_dev_unlock(); diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c index e9bebfe..5059fca 100644 --- a/drivers/net/cnxk/cnxk_ethdev.c +++ b/drivers/net/cnxk/cnxk_ethdev.c @@ -78,6 +78,17 @@ nix_security_setup(struct cnxk_eth_dev *dev) * Will be overridden when event mode rq's are setup. */ cnxk_nix_inb_mode_set(dev, true); + + /* Allocate memory to be used as dptr for CPT ucode + * WRITE_SA op. + */ + dev->inb.sa_dptr = + plt_zmalloc(ROC_NIX_INL_OT_IPSEC_INB_HW_SZ, 0); + if (!dev->inb.sa_dptr) { + plt_err("Couldn't allocate memory for SA dptr"); + rc = -ENOMEM; + goto cleanup; + } } if (dev->tx_offloads & RTE_ETH_TX_OFFLOAD_SECURITY || @@ -95,14 +106,25 @@ nix_security_setup(struct cnxk_eth_dev *dev) if (rc) { plt_err("Failed to initialize nix inline outb, rc=%d", rc); - goto cleanup; + goto sa_dptr_free; } dev->outb.lf_base = roc_nix_inl_outb_lf_base_get(nix); - /* Skip the rest if RTE_ETH_TX_OFFLOAD_SECURITY is not enabled */ + /* Skip the rest if DEV_TX_OFFLOAD_SECURITY is not enabled */ if (!(dev->tx_offloads & RTE_ETH_TX_OFFLOAD_SECURITY)) - goto done; + return 0; + + /* Allocate memory to be used as dptr for CPT ucode + * WRITE_SA op. + */ + dev->outb.sa_dptr = + plt_zmalloc(ROC_NIX_INL_OT_IPSEC_OUTB_HW_SZ, 0); + if (!dev->outb.sa_dptr) { + plt_err("Couldn't allocate memory for SA dptr"); + rc = -ENOMEM; + goto sa_dptr_free; + } rc = -ENOMEM; /* Allocate a bitmap to alloc and free sa indexes */ @@ -112,7 +134,7 @@ nix_security_setup(struct cnxk_eth_dev *dev) plt_err("Outbound SA bmap alloc failed"); rc |= roc_nix_inl_outb_fini(nix); - goto cleanup; + goto sa_dptr_free; } rc = -EIO; @@ -122,7 +144,7 @@ nix_security_setup(struct cnxk_eth_dev *dev) rc |= roc_nix_inl_outb_fini(nix); plt_free(mem); - goto cleanup; + goto sa_dptr_free; } for (i = 0; i < dev->outb.max_sa; i++) @@ -132,9 +154,13 @@ nix_security_setup(struct cnxk_eth_dev *dev) dev->outb.sa_bmap_mem = mem; dev->outb.sa_bmap = bmap; } - -done: return 0; + +sa_dptr_free: + if (dev->inb.sa_dptr) + plt_free(dev->inb.sa_dptr); + if (dev->outb.sa_dptr) + plt_free(dev->outb.sa_dptr); cleanup: if (dev->rx_offloads & RTE_ETH_RX_OFFLOAD_SECURITY) rc |= roc_nix_inl_inb_fini(nix); @@ -196,6 +222,11 @@ nix_security_release(struct cnxk_eth_dev *dev) if (rc) plt_err("Failed to cleanup nix inline inb, rc=%d", rc); ret |= rc; + + if (dev->inb.sa_dptr) { + plt_free(dev->inb.sa_dptr); + dev->inb.sa_dptr = NULL; + } } /* Cleanup Inline outbound */ @@ -216,6 +247,10 @@ nix_security_release(struct cnxk_eth_dev *dev) plt_free(dev->outb.sa_bmap_mem); dev->outb.sa_bmap = NULL; dev->outb.sa_bmap_mem = NULL; + if (dev->outb.sa_dptr) { + plt_free(dev->outb.sa_dptr); + dev->outb.sa_dptr = NULL; + } } dev->inb.inl_dev = false; diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h index 7e4939f..93879c8 100644 --- a/drivers/net/cnxk/cnxk_ethdev.h +++ b/drivers/net/cnxk/cnxk_ethdev.h @@ -268,6 +268,9 @@ struct cnxk_eth_dev_sec_inb { /* List of sessions */ struct cnxk_eth_sec_sess_list list; + + /* DPTR for WRITE_SA microcode op */ + void *sa_dptr; }; /* Outbound security data */ @@ -298,6 +301,9 @@ struct cnxk_eth_dev_sec_outb { /* List of sessions */ struct cnxk_eth_sec_sess_list list; + + /* DPTR for WRITE_SA microcode op */ + void *sa_dptr; }; struct cnxk_eth_dev { diff --git a/drivers/net/cnxk/cnxk_ethdev_sec.c b/drivers/net/cnxk/cnxk_ethdev_sec.c index ae3e49c..3fef056 100644 --- a/drivers/net/cnxk/cnxk_ethdev_sec.c +++ b/drivers/net/cnxk/cnxk_ethdev_sec.c @@ -277,6 +277,7 @@ cnxk_nix_inl_dev_probe(struct rte_pci_driver *pci_drv, goto free_mem; } + inl_dev->attach_cptlf = true; rc = roc_nix_inl_dev_init(inl_dev); if (rc) { plt_err("Failed to init nix inl device, rc=%d(%s)", rc, -- 2.8.4