From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 94763A0C53; Wed, 3 Nov 2021 09:01:57 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id F199F41181; Wed, 3 Nov 2021 09:01:29 +0100 (CET) Received: from NAM10-BN7-obe.outbound.protection.outlook.com (mail-bn7nam10on2073.outbound.protection.outlook.com [40.107.92.73]) by mails.dpdk.org (Postfix) with ESMTP id A7DBA4114B for ; Wed, 3 Nov 2021 09:01:26 +0100 (CET) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=NfCdbiYeNMgzRq9X62SqsPEVRtctp+nEaG+tpbC5DMnVfV7Sh8/7j7UvyXQFX789+rUfHiC8Jp4r9CZ5yRlb4O2usEE9us4ZT2NpT1kgf1ToM4A8UhnF1pAlAeu70aETAIxRJMMyHD2gXBBl/8sJ8CWM5w4qfZCMxn6bJXf33LB3PHkeQYPTBgqiXlviAW7cIjHbBrFoDQ8FGl7RH72MYSSi5JvHPGbWj+yE09kgtLZjf83LwgGokLseOozyFwEmSaZ/gMbVadXs/NBK28rWvDIi5noYlhxwfXRZSzYtm5yK0/wEWUPH4qOM/KoMt+/CfT1R4UNy3uxNLZGn7qGedA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=MrLxnl9rg7FiB9iDx6T/m9t3mtN4RjkL4hLN2BAHO4c=; b=Wg+nPh8fXWgTlMzH7dYVCgWvsrRolbVQWAlvHNMfBWTLESyYsPuUKL8GsTjzQJa/edTs4TOzZYHxD9/H2L0Uz3EpgkybJoE31aQnUoEKksPlU07H/3sVdUzHk3zKSrvfm9CZkXMy2rTM4a4IplpKD4k/YgbydlGQZL53TQ8Y6ZRQtnDpgEAvaizAUbCbpyNIPh6yKZKttLKgggOotWueoj0xoPsYjHq6IAOC72xyo2nlSnQvx6+lx+LjYMgVTh79bZdFaaMna0G9J1oQmljnlIP11krIh2rh/2apClZ6PTMxgQtvNqpZT8QXfGa3daB32yTm3GqCpE/B63waACwnSg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.112.34) smtp.rcpttodomain=intel.com smtp.mailfrom=nvidia.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=MrLxnl9rg7FiB9iDx6T/m9t3mtN4RjkL4hLN2BAHO4c=; b=cwXnY9eg/bA7vKy6q+bB4IXX4dBOf89uOCfZj7kkQjkZnkyE4QMYItUhx7nZgUrCfB4F0GEUKJAgMcsxUC2neI6N9g4AEydbbSbcRUa4gbVAvegJ974dQw2/JAUvlS1i9USheyvMwpgGefbVYM55HHY78qGxeC9c+SEqKPrJ5rfOX7nyhqJPcvjRoYYuDX6IGVkMLJt5wZqHkpfcTMddM34RuPvIYiu+m5FSIBfNrQN7W85MdvRN68KYoAwJKkWBWlkwvzXMykkUu8N+btUzN9wiU3M9FArgmKleMqfsS8qW3I0j88Op4tK0KgCCJ8feoPstMcG5L3kQd55fdRkyBw== Received: from MWHPR19CA0064.namprd19.prod.outlook.com (2603:10b6:300:94::26) by BL0PR12MB2530.namprd12.prod.outlook.com (2603:10b6:207:43::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4669.10; Wed, 3 Nov 2021 08:01:25 +0000 Received: from CO1NAM11FT027.eop-nam11.prod.protection.outlook.com (2603:10b6:300:94:cafe::60) by MWHPR19CA0064.outlook.office365.com (2603:10b6:300:94::26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4669.11 via Frontend Transport; Wed, 3 Nov 2021 08:01:24 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.112.34) smtp.mailfrom=nvidia.com; intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by CO1NAM11FT027.mail.protection.outlook.com (10.13.174.224) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4669.10 via Frontend Transport; Wed, 3 Nov 2021 08:01:24 +0000 Received: from nvidia.com (172.20.187.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Wed, 3 Nov 2021 08:00:20 +0000 From: Xueming Li To: CC: Viacheslav Ovsiienko , , Lior Margalit , Matan Azrad , David Christensen , Ruifeng Wang , Bruce Richardson , Konstantin Ananyev Date: Wed, 3 Nov 2021 15:58:38 +0800 Message-ID: <20211103075838.1486056-15-xuemingl@nvidia.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211103075838.1486056-1-xuemingl@nvidia.com> References: <20210727034204.20649-1-xuemingl@nvidia.com> <20211103075838.1486056-1-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [172.20.187.6] X-ClientProxiedBy: HQMAIL101.nvidia.com (172.20.187.10) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: c1290b31-4b1a-4012-584b-08d99ea021af X-MS-TrafficTypeDiagnostic: BL0PR12MB2530: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:312; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: vkbI3mQLsLoLEt98X44T5NJl/Ku0Nb75M3gRKtOKPu6nc6sdcAQu00OPqgCnJZ1Ori2xdqhf5BcDyAylLVQhI4rYdmd50GDMwYX4ZqqF2N+/bEDZwb+3aQ2BjdP6I5P4bhTUvgOaSlT+dm9SBYNxCHImVwZn2aX9vm9qgqEs1pd9lMWxA8ziuR08udWoC4yzpWX9CklJsV80/vYvTQ8qeUcRQoaVmuu7yUh0+UJhtmaCpA8py5AZdsWofuauKHhQxscP3gsRzrpxDfrQlqrdXO0kpTFM5AZBKDYv0L6qR2+DkYsxwU12psAQkthZKjqGAybcFAThm3//A+Wd5xvqaD+TPLn1JRZv6YxWiytJrAPoZJqLifr4MHsUsbTIdB1dq3yv+KSCEA7mp/HtpVIa3cbxD6bpiXXVH6s1Kb4wQiSv9d+zCF+g51q2TaCeBUxtpGhN2FKqH5F2McR3zgC+hwtjLZGaOfqJ1+Q1QXXpsXboDzwrJHqXtz2gDzlSxJoG0Gl0hxLM4O5kYp5Nw+d6OBuOOQOBD9HmefIeVvnP4oYEdh+KbtJ+Yp4o/AnHj56amobteaTAhrKOXZHH2mfACiwM/duPpMT2Afeno/b3vlRNoACRsf9C13WknImFGBWPnXsA0HlAx0xTQKZHLHEnjqffBwFUUf7xMX0qVYxs1j+sI2mjCAnAS3Tc9SnyAQzzrjts/0nAMZWl3n05tSDA6g== X-Forefront-Antispam-Report: CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE; SFS:(4636009)(36840700001)(46966006)(36756003)(7696005)(55016002)(70586007)(2616005)(26005)(7636003)(83380400001)(36860700001)(8936002)(336012)(1076003)(2906002)(47076005)(36906005)(70206006)(54906003)(82310400003)(426003)(316002)(4326008)(6286002)(6666004)(356005)(16526019)(186003)(508600001)(8676002)(86362001)(6916009)(5660300002); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Nov 2021 08:01:24.5591 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c1290b31-4b1a-4012-584b-08d99ea021af X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT027.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL0PR12MB2530 Subject: [dpdk-dev] [PATCH v3 14/14] net/mlx5: add shared Rx queue port datapath support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Viacheslav Ovsiienko When receive packet, mlx5 PMD saves mbuf port number from RxQ data. To support shared RxQ, save port number into RQ context as user index. Received packet resolve port number from CQE user index which derived from RQ context. Legacy Verbs API doesn't support RQ user index setting, still read from RxQ port number. Signed-off-by: Xueming Li Signed-off-by: Viacheslav Ovsiienko --- drivers/net/mlx5/mlx5_devx.c | 1 + drivers/net/mlx5/mlx5_rx.c | 1 + drivers/net/mlx5/mlx5_rxq.c | 3 ++- drivers/net/mlx5/mlx5_rxtx_vec_altivec.h | 6 ++++++ drivers/net/mlx5/mlx5_rxtx_vec_neon.h | 12 +++++++++++- drivers/net/mlx5/mlx5_rxtx_vec_sse.h | 8 +++++++- 6 files changed, 28 insertions(+), 3 deletions(-) diff --git a/drivers/net/mlx5/mlx5_devx.c b/drivers/net/mlx5/mlx5_devx.c index d3d189ab7f2..a9f9f4af700 100644 --- a/drivers/net/mlx5/mlx5_devx.c +++ b/drivers/net/mlx5/mlx5_devx.c @@ -277,6 +277,7 @@ mlx5_rxq_create_devx_rq_resources(struct mlx5_rxq_priv *rxq) MLX5_WQ_END_PAD_MODE_NONE; rq_attr.wq_attr.pd = cdev->pdn; rq_attr.counter_set_id = priv->counter_set_id; + rq_attr.user_index = rte_cpu_to_be_16(priv->dev_data->port_id); if (rxq_data->shared) /* Create RMP based RQ. */ rxq->devx_rq.rmp = &rxq_ctrl->obj->devx_rmp; /* Create RQ using DevX API. */ diff --git a/drivers/net/mlx5/mlx5_rx.c b/drivers/net/mlx5/mlx5_rx.c index 1ffa1b95b88..4d85f64accd 100644 --- a/drivers/net/mlx5/mlx5_rx.c +++ b/drivers/net/mlx5/mlx5_rx.c @@ -709,6 +709,7 @@ rxq_cq_to_mbuf(struct mlx5_rxq_data *rxq, struct rte_mbuf *pkt, { /* Update packet information. */ pkt->packet_type = rxq_cq_to_pkt_type(rxq, cqe, mcqe); + pkt->port = unlikely(rxq->shared) ? cqe->user_index_low : rxq->port_id; if (rxq->rss_hash) { uint32_t rss_hash_res = 0; diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index 0f1f4660bc7..6c715c0803e 100644 --- a/drivers/net/mlx5/mlx5_rxq.c +++ b/drivers/net/mlx5/mlx5_rxq.c @@ -186,7 +186,8 @@ rxq_alloc_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl) mbuf_init->data_off = RTE_PKTMBUF_HEADROOM; rte_mbuf_refcnt_set(mbuf_init, 1); mbuf_init->nb_segs = 1; - mbuf_init->port = rxq->port_id; + /* For shared queues port is provided in CQE */ + mbuf_init->port = rxq->shared ? 0 : rxq->port_id; if (priv->flags & RTE_PKTMBUF_POOL_F_PINNED_EXT_BUF) mbuf_init->ol_flags = RTE_MBUF_F_EXTERNAL; /* diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h index 1d00c1c43d1..423e229508c 100644 --- a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h +++ b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h @@ -1189,6 +1189,12 @@ rxq_cq_process_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq, /* D.5 fill in mbuf - rearm_data and packet_type. */ rxq_cq_to_ptype_oflags_v(rxq, cqes, opcode, &pkts[pos]); + if (unlikely(rxq->shared)) { + pkts[pos]->port = cq[pos].user_index_low; + pkts[pos + p1]->port = cq[pos + p1].user_index_low; + pkts[pos + p2]->port = cq[pos + p2].user_index_low; + pkts[pos + p3]->port = cq[pos + p3].user_index_low; + } if (rxq->hw_timestamp) { int offset = rxq->timestamp_offset; if (rxq->rt_timestamp) { diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h index aa36df29a09..b1d16baa619 100644 --- a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h +++ b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h @@ -787,7 +787,17 @@ rxq_cq_process_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq, /* C.4 fill in mbuf - rearm_data and packet_type. */ rxq_cq_to_ptype_oflags_v(rxq, ptype_info, flow_tag, opcode, &elts[pos]); - if (rxq->hw_timestamp) { + if (unlikely(rxq->shared)) { + elts[pos]->port = container_of(p0, struct mlx5_cqe, + pkt_info)->user_index_low; + elts[pos + 1]->port = container_of(p1, struct mlx5_cqe, + pkt_info)->user_index_low; + elts[pos + 2]->port = container_of(p2, struct mlx5_cqe, + pkt_info)->user_index_low; + elts[pos + 3]->port = container_of(p3, struct mlx5_cqe, + pkt_info)->user_index_low; + } + if (unlikely(rxq->hw_timestamp)) { int offset = rxq->timestamp_offset; if (rxq->rt_timestamp) { struct mlx5_dev_ctx_shared *sh = rxq->sh; diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h index b0fc29d7b9e..f3d838389e2 100644 --- a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h +++ b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h @@ -736,7 +736,13 @@ rxq_cq_process_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq, *err |= _mm_cvtsi128_si64(opcode); /* D.5 fill in mbuf - rearm_data and packet_type. */ rxq_cq_to_ptype_oflags_v(rxq, cqes, opcode, &pkts[pos]); - if (rxq->hw_timestamp) { + if (unlikely(rxq->shared)) { + pkts[pos]->port = cq[pos].user_index_low; + pkts[pos + p1]->port = cq[pos + p1].user_index_low; + pkts[pos + p2]->port = cq[pos + p2].user_index_low; + pkts[pos + p3]->port = cq[pos + p3].user_index_low; + } + if (unlikely(rxq->hw_timestamp)) { int offset = rxq->timestamp_offset; if (rxq->rt_timestamp) { struct mlx5_dev_ctx_shared *sh = rxq->sh; -- 2.33.0