From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 286B3A0C47; Wed, 3 Nov 2021 19:02:25 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1F14C41136; Wed, 3 Nov 2021 19:02:07 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 5B5FB40E5A for ; Wed, 3 Nov 2021 19:02:03 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 1A3BtEXd012721; Wed, 3 Nov 2021 11:02:02 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=KZunfL2xi4sFaXntgQzjt5QiK16cbRK2pTNYi77J2uc=; b=kPOZCfyuG4KnvHPp2SgA34D0Tzxap0uQdFetKrpGHWXnGkomdKtUwCuGiLe6tj48h8Yv b/P7Vz0JOEk0cjrbJhhLA6IJ/Qn7CZ9SBK9qUuB3nEiLxhxuyNloSggHhzBza7mTM9SP NWlAFOyEqbTvXrOThgUvcNEKk/M8y/kBegEXEB3gXM1eoB8FdG+2BxX+VPdfz5E1F4n0 jKVdVD/T4kLmyzjCTnCzNHjAzvX4NWyVoAhk2V/KdnC8QanpXCt9K4eavF3lRrrYqE4J nk1AIsHNo+mRElcs/ZchluCPhH1wq5fqU+4zNtR4IkuN3b8K/k3MVIB/HTpFNCoUooCr Eg== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3c3dd8cxnj-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 03 Nov 2021 11:02:02 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Wed, 3 Nov 2021 11:02:00 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Wed, 3 Nov 2021 11:02:00 -0700 Received: from rchintakuntla-lnx3.caveonetworks.com (unknown [10.111.140.81]) by maili.marvell.com (Postfix) with ESMTP id 3E11D5B695B; Wed, 3 Nov 2021 11:02:00 -0700 (PDT) From: Radha Mohan Chintakuntla To: , , , , , , , CC: , Radha Mohan Chintakuntla Date: Wed, 3 Nov 2021 11:01:49 -0700 Message-ID: <20211103180150.10416-4-radhac@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211103180150.10416-1-radhac@marvell.com> References: <20211102034019.28900-1-radhac@marvell.com> <20211103180150.10416-1-radhac@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-ORIG-GUID: _4ZyRU3VvrvJPUoA6F3GlMI-VwI-YhtZ X-Proofpoint-GUID: _4ZyRU3VvrvJPUoA6F3GlMI-VwI-YhtZ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-11-03_06,2021-11-03_01,2020-04-07_01 Subject: [dpdk-dev] [PATCH v3 4/5] dma/cnxk: add copy_sg function X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add the copy_sg function that will do the multiple DMA transfers of different sizes and different source/destination as well. Signed-off-by: Radha Mohan Chintakuntla --- drivers/dma/cnxk/cnxk_dmadev.c | 69 +++++++++++++++++++++++++++++++++- 1 file changed, 68 insertions(+), 1 deletion(-) diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c index 1738129fa1..360e92f7ce 100644 --- a/drivers/dma/cnxk/cnxk_dmadev.c +++ b/drivers/dma/cnxk/cnxk_dmadev.c @@ -29,7 +29,8 @@ cnxk_dmadev_info_get(const struct rte_dma_dev *dev, dev_info->nb_vchans = 1; dev_info->dev_capa = RTE_DMA_CAPA_MEM_TO_MEM | RTE_DMA_CAPA_MEM_TO_DEV | RTE_DMA_CAPA_DEV_TO_MEM | - RTE_DMA_CAPA_DEV_TO_DEV | RTE_DMA_CAPA_OPS_COPY; + RTE_DMA_CAPA_DEV_TO_DEV | RTE_DMA_CAPA_OPS_COPY | + RTE_DMA_CAPA_OPS_COPY_SG; dev_info->max_desc = DPI_MAX_DESC; dev_info->min_desc = 1; dev_info->max_sges = DPI_MAX_POINTER; @@ -277,6 +278,71 @@ cnxk_dmadev_copy(void *dev_private, uint16_t vchan, rte_iova_t src, return dpivf->desc_idx++; } +static int +cnxk_dmadev_copy_sg(void *dev_private, uint16_t vchan, + const struct rte_dma_sge *src, + const struct rte_dma_sge *dst, + uint16_t nb_src, uint16_t nb_dst, uint64_t flags) +{ + struct cnxk_dpi_vf_s *dpivf = dev_private; + union dpi_instr_hdr_s *header = &dpivf->conf.hdr; + const struct rte_dma_sge *fptr, *lptr; + struct cnxk_dpi_compl_s *comp_ptr; + int num_words = 0; + int i, rc; + + RTE_SET_USED(vchan); + + comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail]; + comp_ptr->cdata = DPI_REQ_CDATA; + header->s.ptr = (uint64_t)comp_ptr; + STRM_INC(dpivf->conf.c_desc); + + /* + * For inbound case, src pointers are last pointers. + * For all other cases, src pointers are first pointers. + */ + if (header->s.xtype == DPI_XTYPE_INBOUND) { + header->s.nfst = nb_dst & 0xf; + header->s.nlst = nb_src & 0xf; + fptr = &dst[0]; + lptr = &src[0]; + } else { + header->s.nfst = nb_src & 0xf; + header->s.nlst = nb_dst & 0xf; + fptr = &src[0]; + lptr = &dst[0]; + } + + dpivf->cmd[0] = header->u[0]; + dpivf->cmd[1] = header->u[1]; + dpivf->cmd[2] = header->u[2]; + num_words += 4; + for (i = 0; i < header->s.nfst; i++) { + dpivf->cmd[num_words++] = (uint64_t)fptr->length; + dpivf->cmd[num_words++] = fptr->addr; + fptr++; + } + + for (i = 0; i < header->s.nlst; i++) { + dpivf->cmd[num_words++] = (uint64_t)lptr->length; + dpivf->cmd[num_words++] = lptr->addr; + lptr++; + } + + rc = __dpi_queue_write(&dpivf->rdpi, dpivf->cmd, num_words); + if (!rc) { + if (flags & RTE_DMA_OP_FLAG_SUBMIT) { + rte_wmb(); + plt_write64(num_words, + dpivf->rdpi.rbase + DPI_VDMA_DBELL); + } + dpivf->num_words += num_words; + } + + return dpivf->desc_idx++; +} + static uint16_t cnxk_dmadev_completed(void *dev_private, uint16_t vchan, const uint16_t nb_cpls, uint16_t *last_idx, bool *has_error) @@ -378,6 +444,7 @@ cnxk_dmadev_probe(struct rte_pci_driver *pci_drv __rte_unused, dmadev->dev_ops = &cnxk_dmadev_ops; dmadev->fp_obj->copy = cnxk_dmadev_copy; + dmadev->fp_obj->copy_sg = cnxk_dmadev_copy_sg; dmadev->fp_obj->submit = cnxk_dmadev_submit; dmadev->fp_obj->completed = cnxk_dmadev_completed; dmadev->fp_obj->completed_status = cnxk_dmadev_completed_status; -- 2.17.1