[PATCH] common/mlx5: decrease log level for hlist creation

[PATCH] common/mlx5: decrease log level for hlist creation

[David Marchand]

Initialising mlx5 devices in OVS, I get the following logs:
2021-11-16T20:08:37Z|00021|dpdk|INFO|EAL: Probe PCI driver: mlx5_pci
(15b3:101d) device: 0000:3b:00.0 (socket 0)
2021-11-16T20:08:37Z|00022|dpdk|INFO|common_mlx5: RTE_MEM is selected.
2021-11-16T20:08:38Z|00023|dpdk|WARN|mlx5_pci: Size 0xFFFF is not power
of 2, will be aligned to 0x10000.

Those logs just make no sense for a final user and were raised to WARN
level recently.
Lower them back to DEBUG.

Fixes: 961b6774c451 ("common/mlx5: add per-lcore cache to hash list utility")

Signed-off-by: David Marchand <david.marchand@redhat.com>
---
 drivers/common/mlx5/mlx5_common_utils.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/common/mlx5/mlx5_common_utils.c b/drivers/common/mlx5/mlx5_common_utils.c
index 775fabd478..c83333b4b4 100644
--- a/drivers/common/mlx5/mlx5_common_utils.c
+++ b/drivers/common/mlx5/mlx5_common_utils.c
@@ -406,7 +406,7 @@ mlx5_hlist_create(const char *name, uint32_t size, bool direct_key,
 	/* Align to the next power of 2, 32bits integer is enough now. */
 	if (!rte_is_power_of_2(size)) {
 		act_size = rte_align32pow2(size);
-		DRV_LOG(WARNING, "Size 0x%" PRIX32 " is not power of 2, will "
+		DRV_LOG(DEBUG, "Size 0x%" PRIX32 " is not power of 2, will "
 			"be aligned to 0x%" PRIX32 ".", size, act_size);
 	} else {
 		act_size = size;
-- 
2.23.0

Re: [PATCH] common/mlx5: decrease log level for hlist creation

[Stephen Hemminger]

On Tue, 16 Nov 2021 21:33:54 +0100
David Marchand <david.marchand@redhat.com> wrote:

>  		act_size = rte_align32pow2(size);
> -		DRV_LOG(WARNING, "Size 0x%" PRIX32 " is not power of 2, will "
> +		DRV_LOG(DEBUG, "Size 0x%" PRIX32 " is not power of 2, will "
>  			"be aligned to 0x%" PRIX32 ".", size, act_size);

Splitting log message mid sentence is bad practice, why not fix it?

		DRV_LOG(DEBUG,
			"Size %#" PRIX32 " is not power of 2, will be aligned to %#" PRIX32
		         size, act_size);

RE: [PATCH] common/mlx5: decrease log level for hlist creation

[Slava Ovsiienko]

Hi, David

In general, I'm OK with lowering the log level.
But we do not expect the warning " is not power of 2". 
What mlx5_hlist_create() call caused this?

> -----Original Message-----
> From: David Marchand <david.marchand@redhat.com>
> Sent: Tuesday, November 16, 2021 22:34
> To: dev@dpdk.org
> Cc: NBU-Contact-Thomas Monjalon <thomas@monjalon.net>;
> ferruh.yigit@intel.com; Matan Azrad <matan@nvidia.com>; Slava Ovsiienko
> <viacheslavo@nvidia.com>; Suanming Mou <suanmingm@nvidia.com>
> Subject: [PATCH] common/mlx5: decrease log level for hlist creation
> 
> Initialising mlx5 devices in OVS, I get the following logs:
> 2021-11-16T20:08:37Z|00021|dpdk|INFO|EAL: Probe PCI driver: mlx5_pci
> (15b3:101d) device: 0000:3b:00.0 (socket 0)
> 2021-11-16T20:08:37Z|00022|dpdk|INFO|common_mlx5: RTE_MEM is
> selected.
> 2021-11-16T20:08:38Z|00023|dpdk|WARN|mlx5_pci: Size 0xFFFF is not
> power of 2, will be aligned to 0x10000.

Can we remove not too meaningful details  from commit message?
Date/time in messages: 2021-11-16T20:08:38Z|00023| ?

With best regards,
Slava

> 
> Those logs just make no sense for a final user and were raised to WARN level
> recently.
> Lower them back to DEBUG.
> 
> Fixes: 961b6774c451 ("common/mlx5: add per-lcore cache to hash list
> utility")
> 
> Signed-off-by: David Marchand <david.marchand@redhat.com>
> ---
>  drivers/common/mlx5/mlx5_common_utils.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/common/mlx5/mlx5_common_utils.c
> b/drivers/common/mlx5/mlx5_common_utils.c
> index 775fabd478..c83333b4b4 100644
> --- a/drivers/common/mlx5/mlx5_common_utils.c
> +++ b/drivers/common/mlx5/mlx5_common_utils.c
> @@ -406,7 +406,7 @@ mlx5_hlist_create(const char *name, uint32_t size,
> bool direct_key,
>  	/* Align to the next power of 2, 32bits integer is enough now. */
>  	if (!rte_is_power_of_2(size)) {
>  		act_size = rte_align32pow2(size);
> -		DRV_LOG(WARNING, "Size 0x%" PRIX32 " is not power of 2,
> will "
> +		DRV_LOG(DEBUG, "Size 0x%" PRIX32 " is not power of 2, will
> "
>  			"be aligned to 0x%" PRIX32 ".", size, act_size);
>  	} else {
>  		act_size = size;
> --
> 2.23.0

Re: [PATCH] common/mlx5: decrease log level for hlist creation

[David Marchand]

On Wed, Nov 17, 2021 at 1:14 PM Slava Ovsiienko <viacheslavo@nvidia.com> wrote:
>
> Hi, David
>
> In general, I'm OK with lowering the log level.
> But we do not expect the warning " is not power of 2".
> What mlx5_hlist_create() call caused this?

That's something Maxime can see on RHEL8 with CX6 devices.
I remember seeing it too in the (recent) past, probably when working
with our QE.
So far, I did not associate this log presence to functional issues.


Looking at DPDK mailing lists:
http://inbox.dpdk.org/dev/?q=%220xFFFF+is+not+power+of+2%22
http://inbox.dpdk.org/users/?q=%220xFFFF+is+not+power+of+2%22

So we are not the only ones seeing this.

>
> > -----Original Message-----
> > From: David Marchand <david.marchand@redhat.com>
> > Sent: Tuesday, November 16, 2021 22:34
> > To: dev@dpdk.org
> > Cc: NBU-Contact-Thomas Monjalon <thomas@monjalon.net>;
> > ferruh.yigit@intel.com; Matan Azrad <matan@nvidia.com>; Slava Ovsiienko
> > <viacheslavo@nvidia.com>; Suanming Mou <suanmingm@nvidia.com>
> > Subject: [PATCH] common/mlx5: decrease log level for hlist creation
> >
> > Initialising mlx5 devices in OVS, I get the following logs:
> > 2021-11-16T20:08:37Z|00021|dpdk|INFO|EAL: Probe PCI driver: mlx5_pci
> > (15b3:101d) device: 0000:3b:00.0 (socket 0)
> > 2021-11-16T20:08:37Z|00022|dpdk|INFO|common_mlx5: RTE_MEM is
> > selected.
> > 2021-11-16T20:08:38Z|00023|dpdk|WARN|mlx5_pci: Size 0xFFFF is not
> > power of 2, will be aligned to 0x10000.
>
> Can we remove not too meaningful details  from commit message?
> Date/time in messages: 2021-11-16T20:08:38Z|00023| ?

I don't mind.
Logs were coming from OVS unit tests but the same can most likely be
reproduced with testpmd.


-- 
David Marchand

RE: [PATCH] common/mlx5: decrease log level for hlist creation

[Slava Ovsiienko]

Hi, David

I've re-checked the mlx5_hlist_create() call tree.

And it seems all the calls are done with hardcoded  const values for "size" argument,
and all these values are powers-of-2.

We had an issue in the past, but then I was not seeing this warning for a long time
on my setup. 

With best regards,
Slava

> -----Original Message-----
> From: David Marchand <david.marchand@redhat.com>
> Sent: Wednesday, November 17, 2021 15:02
> To: Slava Ovsiienko <viacheslavo@nvidia.com>
> Cc: dev@dpdk.org; NBU-Contact-Thomas Monjalon <thomas@monjalon.net>;
> ferruh.yigit@intel.com; Matan Azrad <matan@nvidia.com>; Suanming Mou
> <suanmingm@nvidia.com>; Maxime Coquelin
> <maxime.coquelin@redhat.com>
> Subject: Re: [PATCH] common/mlx5: decrease log level for hlist creation
> 
> On Wed, Nov 17, 2021 at 1:14 PM Slava Ovsiienko <viacheslavo@nvidia.com>
> wrote:
> >
> > Hi, David
> >
> > In general, I'm OK with lowering the log level.
> > But we do not expect the warning " is not power of 2".
> > What mlx5_hlist_create() call caused this?
> 
> That's something Maxime can see on RHEL8 with CX6 devices.
> I remember seeing it too in the (recent) past, probably when working with our
> QE.
> So far, I did not associate this log presence to functional issues.
> 
> 
> Looking at DPDK mailing lists:
> http://inbox.dpdk.org/dev/?q=%220xFFFF+is+not+power+of+2%22
> http://inbox.dpdk.org/users/?q=%220xFFFF+is+not+power+of+2%22
> 
> So we are not the only ones seeing this.
> 
> >
> > > -----Original Message-----
> > > From: David Marchand <david.marchand@redhat.com>
> > > Sent: Tuesday, November 16, 2021 22:34
> > > To: dev@dpdk.org
> > > Cc: NBU-Contact-Thomas Monjalon <thomas@monjalon.net>;
> > > ferruh.yigit@intel.com; Matan Azrad <matan@nvidia.com>; Slava
> > > Ovsiienko <viacheslavo@nvidia.com>; Suanming Mou
> > > <suanmingm@nvidia.com>
> > > Subject: [PATCH] common/mlx5: decrease log level for hlist creation
> > >
> > > Initialising mlx5 devices in OVS, I get the following logs:
> > > 2021-11-16T20:08:37Z|00021|dpdk|INFO|EAL: Probe PCI driver:
> mlx5_pci
> > > (15b3:101d) device: 0000:3b:00.0 (socket 0)
> > > 2021-11-16T20:08:37Z|00022|dpdk|INFO|common_mlx5: RTE_MEM is
> > > selected.
> > > 2021-11-16T20:08:38Z|00023|dpdk|WARN|mlx5_pci: Size 0xFFFF is not
> > > power of 2, will be aligned to 0x10000.
> >
> > Can we remove not too meaningful details  from commit message?
> > Date/time in messages: 2021-11-16T20:08:38Z|00023| ?
> 
> I don't mind.
> Logs were coming from OVS unit tests but the same can most likely be
> reproduced with testpmd.
> 
> 
> --
> David Marchand

Re: [PATCH] common/mlx5: decrease log level for hlist creation

[David Marchand]

On Wed, Nov 17, 2021 at 2:28 PM Slava Ovsiienko <viacheslavo@nvidia.com> wrote:
>
> I've re-checked the mlx5_hlist_create() call tree.
>
> And it seems all the calls are done with hardcoded  const values for "size" argument,
> and all these values are powers-of-2.
>
> We had an issue in the past, but then I was not seeing this warning for a long time
> on my setup.

I'll double check with Maxime.
There might be a misunderstanding between us.

Thanks Slava.


-- 
David Marchand

Re: [PATCH] common/mlx5: decrease log level for hlist creation

[David Marchand]

Hi Slava,

On Wed, Nov 17, 2021 at 3:46 PM David Marchand
<david.marchand@redhat.com> wrote:
>
> On Wed, Nov 17, 2021 at 2:28 PM Slava Ovsiienko <viacheslavo@nvidia.com> wrote:
> >
> > I've re-checked the mlx5_hlist_create() call tree.
> >
> > And it seems all the calls are done with hardcoded  const values for "size" argument,
> > and all these values are powers-of-2.
> >
> > We had an issue in the past, but then I was not seeing this warning for a long time
> > on my setup.
>
> I'll double check with Maxime.
> There might be a misunderstanding between us.

Maxime passed me his setup with a CX6.
I confirm there is no warning in main and the problem has been fixed
in v20.11 LTS.
Sorry for the noise, I'll withdraw this patch.

Thanks.


For the record:
- v20.11 and v20.11.1 has logs about:
mlx5_pci: Size 0xFFFF is not power of 2, will be aligned to 0x10000.
mlx5_pci: Failed to init cache list FDB_ingress_0_matcher_cache entry (nil).

- v20.11.2 has only:
mlx5_pci: Failed to init cache list FDB_ingress_0_matcher_cache entry (nil).

- v20.11.3 has no warning


-- 
David Marchand

RE: [PATCH] common/mlx5: decrease log level for hlist creation

[Slava Ovsiienko]

Hi, David

> -----Original Message-----
> From: David Marchand <david.marchand@redhat.com>
> Sent: Thursday, November 18, 2021 16:23
> To: Slava Ovsiienko <viacheslavo@nvidia.com>
> Cc: dev@dpdk.org; NBU-Contact-Thomas Monjalon <thomas@monjalon.net>;
> ferruh.yigit@intel.com; Matan Azrad <matan@nvidia.com>; Suanming Mou
> <suanmingm@nvidia.com>; Maxime Coquelin
> <maxime.coquelin@redhat.com>
> Subject: Re: [PATCH] common/mlx5: decrease log level for hlist creation
> 
> Hi Slava,
> 
> On Wed, Nov 17, 2021 at 3:46 PM David Marchand
> <david.marchand@redhat.com> wrote:
> >
> > On Wed, Nov 17, 2021 at 2:28 PM Slava Ovsiienko
> <viacheslavo@nvidia.com> wrote:
> > >
> > > I've re-checked the mlx5_hlist_create() call tree.
> > >
> > > And it seems all the calls are done with hardcoded  const values for
> > > "size" argument, and all these values are powers-of-2.
> > >
> > > We had an issue in the past, but then I was not seeing this warning
> > > for a long time on my setup.
> >
> > I'll double check with Maxime.
> > There might be a misunderstanding between us.
> 
> Maxime passed me his setup with a CX6.
> I confirm there is no warning in main and the problem has been fixed in
> v20.11 LTS.
> Sorry for the noise, I'll withdraw this patch.
> 
> Thanks.
> 
> 
> For the record:
> - v20.11 and v20.11.1 has logs about:
> mlx5_pci: Size 0xFFFF is not power of 2, will be aligned to 0x10000.
> mlx5_pci: Failed to init cache list FDB_ingress_0_matcher_cache entry (nil).
> 
> - v20.11.2 has only:
> mlx5_pci: Failed to init cache list FDB_ingress_0_matcher_cache entry (nil).
> 
> - v20.11.3 has no warning
Thanks a lot for checking and clear confirmation.

With best regards,
Slava