From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 61F3EA0C47; Wed, 17 Nov 2021 01:22:47 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DEF6D4068C; Wed, 17 Nov 2021 01:22:46 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 341C740040 for ; Wed, 17 Nov 2021 01:22:45 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 1AGMCo9a008418 for ; Tue, 16 Nov 2021 16:22:44 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=GFR7wMO//3EvsdoqKrVkFRipvWQSd/s0t9nqZ1EjWcM=; b=YZg77XLvBdqh4TD3wb0J7YD2S5iRDA+axmBrKk6kIBLuG28um7KrSwdMHMxE7cNJ0KnL 5VDRQi6Qo7t0tLzPhbVnbm9cTnfBGDO8ngZ105Xg8op2oDfHwdmiWmrzuLhDLLiRG2sC b+mvfvlKDHPtk533VHga4ZYzBckSALQiH76xGkMqtJltV+q07l1rHlh29DKglBw6tzpj /pIjSBNJIdT9nAGfRlry0Fp6gjyM9fljx3jJC+ERZ09w8NbbrwZtK0wEdYY2LmdErsuY ftk2rEIEvVK9vkMqwdzLZMWDZMKfSj2Wk46ry2UnF5Ggw5jUommHhLd6gbtVf3XDH8yl mQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3cc85xc9ue-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 16 Nov 2021 16:22:44 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Tue, 16 Nov 2021 16:22:42 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Tue, 16 Nov 2021 16:22:42 -0800 Received: from localhost.localdomain (unknown [10.28.34.39]) by maili.marvell.com (Postfix) with ESMTP id 29F163F705B; Tue, 16 Nov 2021 16:22:40 -0800 (PST) From: Tomasz Duszynski To: CC: , Tomasz Duszynski Subject: [DPDK 22.02 PATCH 00/10] Add cnxk_gpio PMD Date: Wed, 17 Nov 2021 01:21:45 +0100 Message-ID: <20211117002155.293267-1-tduszynski@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: CvS9k9tGlnDkrkkCOAgZFQU9j0Nu0NjK X-Proofpoint-ORIG-GUID: CvS9k9tGlnDkrkkCOAgZFQU9j0Nu0NjK X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-11-16_07,2021-11-16_01,2020-04-07_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This series introduces a new rawdevice PMD which allows to manage userspace GPIOs and install custom GPIO interrupt handlers which bypass kernel. This is especially useful for applications that, besides providing standard dataplane functionality, want to have fast and low latency access to GPIO pin state. It'd be great to have that merged during 22.02 merge window. Tomasz Duszynski (10): raw/cnxk_gpio: add GPIO driver skeleton raw/cnxk_gpio: support reading default queue conf raw/cnxk_gpio: support reading queue count raw/cnxk_gpio: support queue setup raw/cnxk_gpio: support queue release raw/cnxk_gpio: support enqueuing buffers raw/cnxk_gpio: support dequeuing buffers raw/cnxk_gpio: support standard GPIO operations raw/cnxk_gpio: support custom irq handlers raw/cnxk_gpio: support selftest doc/guides/rawdevs/cnxk_gpio.rst | 195 +++++++ doc/guides/rawdevs/index.rst | 1 + drivers/raw/cnxk_gpio/cnxk_gpio.c | 633 +++++++++++++++++++++ drivers/raw/cnxk_gpio/cnxk_gpio.h | 31 + drivers/raw/cnxk_gpio/cnxk_gpio_irq.c | 216 +++++++ drivers/raw/cnxk_gpio/cnxk_gpio_selftest.c | 442 ++++++++++++++ drivers/raw/cnxk_gpio/meson.build | 11 + drivers/raw/cnxk_gpio/rte_pmd_cnxk_gpio.h | 429 ++++++++++++++ drivers/raw/cnxk_gpio/version.map | 3 + drivers/raw/meson.build | 1 + 10 files changed, 1962 insertions(+) create mode 100644 doc/guides/rawdevs/cnxk_gpio.rst create mode 100644 drivers/raw/cnxk_gpio/cnxk_gpio.c create mode 100644 drivers/raw/cnxk_gpio/cnxk_gpio.h create mode 100644 drivers/raw/cnxk_gpio/cnxk_gpio_irq.c create mode 100644 drivers/raw/cnxk_gpio/cnxk_gpio_selftest.c create mode 100644 drivers/raw/cnxk_gpio/meson.build create mode 100644 drivers/raw/cnxk_gpio/rte_pmd_cnxk_gpio.h create mode 100644 drivers/raw/cnxk_gpio/version.map -- 2.25.1