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CAT:NONE; SFS:(4636009)(46966006)(36840700001)(7696005)(7636003)(70586007)(356005)(6286002)(4326008)(26005)(70206006)(83380400001)(8936002)(8676002)(47076005)(5660300002)(54906003)(316002)(36906005)(2906002)(16526019)(36756003)(186003)(6666004)(2616005)(6916009)(36860700001)(55016002)(107886003)(1076003)(82310400003)(426003)(508600001)(336012)(86362001); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Nov 2021 11:14:50.8671 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c2dd8ad9-21c0-4f72-5fd0-08d9a9bb795c X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT017.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH0PR12MB5220 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org If the modify field action requests the field copy/set transaction from other field, the destination field hardware bit offset was assigned incorrectly with non-zero byte offset, causing wrong translations for the fields with sizes larger than 32 bits. Fixes: 40c8fb1fd3b3 ("net/mlx5: update modify field action") Signed-off-by: Viacheslav Ovsiienko --- drivers/net/mlx5/mlx5_flow_dv.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index 7b32c06fc6..2705cadaf1 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -1501,7 +1501,7 @@ mlx5_flow_field_id_to_modify_info (32 - width)) << off); } else { if (data->offset < 16) - info[idx++] = (struct field_modify_info){2, 4, + info[idx++] = (struct field_modify_info){2, 0, MLX5_MODI_OUT_DMAC_15_0}; info[idx] = (struct field_modify_info){4, 0, MLX5_MODI_OUT_DMAC_47_16}; @@ -1531,7 +1531,7 @@ mlx5_flow_field_id_to_modify_info (32 - width)) << off); } else { if (data->offset < 16) - info[idx++] = (struct field_modify_info){2, 4, + info[idx++] = (struct field_modify_info){2, 0, MLX5_MODI_OUT_SMAC_15_0}; info[idx] = (struct field_modify_info){4, 0, MLX5_MODI_OUT_SMAC_47_16}; @@ -1645,13 +1645,13 @@ mlx5_flow_field_id_to_modify_info mask[0] = rte_cpu_to_be_32(0xffffffff >> (32 - width)); } else { if (data->offset < 32) - info[idx++] = (struct field_modify_info){4, 12, + info[idx++] = (struct field_modify_info){4, 0, MLX5_MODI_OUT_SIPV6_31_0}; if (data->offset < 64) - info[idx++] = (struct field_modify_info){4, 8, + info[idx++] = (struct field_modify_info){4, 0, MLX5_MODI_OUT_SIPV6_63_32}; if (data->offset < 96) - info[idx++] = (struct field_modify_info){4, 4, + info[idx++] = (struct field_modify_info){4, 0, MLX5_MODI_OUT_SIPV6_95_64}; if (data->offset < 128) info[idx++] = (struct field_modify_info){4, 0, @@ -1713,13 +1713,13 @@ mlx5_flow_field_id_to_modify_info mask[0] = rte_cpu_to_be_32(0xffffffff >> (32 - width)); } else { if (data->offset < 32) - info[idx++] = (struct field_modify_info){4, 12, + info[idx++] = (struct field_modify_info){4, 0, MLX5_MODI_OUT_DIPV6_31_0}; if (data->offset < 64) - info[idx++] = (struct field_modify_info){4, 8, + info[idx++] = (struct field_modify_info){4, 0, MLX5_MODI_OUT_DIPV6_63_32}; if (data->offset < 96) - info[idx++] = (struct field_modify_info){4, 4, + info[idx++] = (struct field_modify_info){4, 0, MLX5_MODI_OUT_DIPV6_95_64}; if (data->offset < 128) info[idx++] = (struct field_modify_info){4, 0, -- 2.18.1