From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E7909A0C41; Thu, 18 Nov 2021 16:25:33 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C01B340687; Thu, 18 Nov 2021 16:25:33 +0100 (CET) Received: from NAM10-MW2-obe.outbound.protection.outlook.com (mail-mw2nam10on2056.outbound.protection.outlook.com [40.107.94.56]) by mails.dpdk.org (Postfix) with ESMTP id 62DEA40395 for ; Thu, 18 Nov 2021 16:25:31 +0100 (CET) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Rkt8SL3aT/NGUElg9v9fOg45BcXxB7K/CSKdpGWUcHo3V/0tl6+jlujzkvSbVGpoJJ72m/hFRjZ1HQGJDY7nWfPK25uTAmX610n75uH/TGIIftrBUO0DHwWk0y7V65kpL+f9HjS9xaAWKORW1WlTKW9pSAm3spAFA9838haQyQ6cGz/2cz0jlKcu3l3N2Jo/6EX0yl27P5deTs9mV57eQ/BReCtYLQItFAFBIzypf0IE7cqfSJQuxEe7z6gtof02qeRyPAPBRmJvAItu7d5POKyVKcJbhnRnneceMKQV4Tro50iPPjcPodJ4JpfbV0SvxCD9dZzOHcPRHO4Q6/WuXw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=QwN0PV4ux5W933VJma///Xo/b0HqyNQZiGO6uaCtSIM=; b=GIleuX/nEz2POR4s7NosYfCFebP7K+cIIX3+bA6V6pmz7+/ZmZjDivYhNwv5Y0u9+Hh+qMoEv6ZhOjrpntjgWkm1CRtkhcuaWrW+NdCOPFIikcTXlXCLHAm9WGcnADcXulQ8pBzbLyaFGZ6FoIowmPwGljROO4PMvMGa9Ac7BQrVaCg+tJIZb0gtDnwR7tQYAg31NCnV04buTLGWIwem0RGB+c/YtzJhODuZ3hq+YWm/8lHPkC0t4koc6HVJUla9S4A9mOwb0y/Ohq+qQeVPpzL0z4ktE1IMaXQ5Q6cXkrK4FkcXGha+sThGq1Zk0tTThmVBslWFDsJd+S8N747aPQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.112.34) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=QwN0PV4ux5W933VJma///Xo/b0HqyNQZiGO6uaCtSIM=; b=JmdMSm9WdxaNiJ0OPk2+QtGlI2+UdWQ6yBcYzQ+bxdNvoSyzMBqVYj3WQKGv7Dtexq+QQmtp3/YrFRwBg7LwmdzuLzvwojoE9vWpPFJ/vOrEMSPFPVH2oP1uXwVoDWZzz3AemcnGYXygfr5g8zgVFN5EUrMuSKkMwfymObUFlry+2l/R0ZBEm4RORel0qhF9JS6WXLRILIxCIGq20m64DthbGrMFekg7YV5ZMs7rHzYpavQOrH6uKOlbvj6Kk+l5sHukrcXHJ32fVoqsunzgaHyU6mSfi4m04j03lb7iUPWFGU/nR27Fp+1D0UiY127ye3gbopPIDLpSvn2eo4H8ZA== Received: from DM5PR06CA0026.namprd06.prod.outlook.com (2603:10b6:3:5d::12) by DM5PR12MB1260.namprd12.prod.outlook.com (2603:10b6:3:78::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4713.22; Thu, 18 Nov 2021 15:25:28 +0000 Received: from DM6NAM11FT023.eop-nam11.prod.protection.outlook.com (2603:10b6:3:5d:cafe::e) by DM5PR06CA0026.outlook.office365.com (2603:10b6:3:5d::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4713.22 via Frontend Transport; Thu, 18 Nov 2021 15:25:28 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.112.34) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by DM6NAM11FT023.mail.protection.outlook.com (10.13.173.96) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4713.20 via Frontend Transport; Thu, 18 Nov 2021 15:25:28 +0000 Received: from nvidia.com (172.20.187.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 18 Nov 2021 15:25:14 +0000 From: Dmitry Kozlyuk To: CC: Raslan Darawsheh , Michael Baum , Matan Azrad , Viacheslav Ovsiienko Subject: [PATCH v2] common/mlx5: fix mempool registration Date: Thu, 18 Nov 2021 17:25:01 +0200 Message-ID: <20211118152501.2936413-1-dkozlyuk@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211117184936.2581314-1-dkozlyuk@nvidia.com> References: <20211117184936.2581314-1-dkozlyuk@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [172.20.187.6] X-ClientProxiedBy: HQMAIL105.nvidia.com (172.20.187.12) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e527f157-4fcd-4f62-8ebb-08d9aaa7a6d2 X-MS-TrafficTypeDiagnostic: DM5PR12MB1260: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:6430; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 5dAMSxjhL2yM0D9jtiAKz8rGj9Ye+xWKZBF9V/HJRnz8R/Fqx1IDyA8i07o4ldizfhjiKHQLddo3/oz7h8PkHepT+KOmlNx0rk4vPZt5Ppq7c4Lm/lv9NykZuA4kQmyLBIcGgPAvcfKEz+Z0djQx/GFXhGMMEzze6sQd9MRO5iH7i6ghFIfQWNDM3SL5oWNjSEmLubSlitT0OtRMHXiBPXGqk6NnnwqS+/mutRuI58A9cVhZVR+W3u/Ba6pPKCOY9gGpwJ8QO953Zb0uXCgEG92CiAZSnEh+tW2rEaG0TqXb5Nq+En0f9XMbY9c6ilmdmTB3y4UUvvLyzCBWoNSSmiSAu2n+yQ24TiGydi8N2z4FSnsM7+sRmoMmtNrKZB+rCtSPVP+68XcnEU0tsgRchwUP6ygn5rFE38HwTMouMXmHkkZ6nX64T7Kh8GZx3uTrLjaJ2DZrA8kfWLGg/CO54voaFXOUEwZyoWA2+H2hgqplu9XswcfHpBNbj8olQXj6/i0RotEXEr5wl1Z7xNpSmhu2+/bd9BBypdjTjnTKqHFb1UuGG56YIsV0PV8Ou97j2C++nkLJthESvD37fGRc3CrA40inVipzU9bmmoA3LGjs5MzxMdDm3877vmPj1r7Pou2/sxADvPxKKR/GzdjG+LPf8GwiUOzItHI+o6j3yqObDXM7qwdtuO9JUlVVzUq/mC4vg2OCwOKwQ0+qe1ny6A== X-Forefront-Antispam-Report: CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE; SFS:(4636009)(36840700001)(46966006)(70206006)(8676002)(16526019)(6916009)(47076005)(36756003)(36860700001)(186003)(2616005)(30864003)(54906003)(6286002)(83380400001)(316002)(8936002)(36906005)(70586007)(356005)(426003)(7696005)(55016002)(336012)(508600001)(7636003)(2906002)(5660300002)(6666004)(107886003)(86362001)(1076003)(82310400003)(4326008)(26005); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Nov 2021 15:25:28.3383 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e527f157-4fcd-4f62-8ebb-08d9aaa7a6d2 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT023.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB1260 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Mempool registration was not correctly processing mempools with RTE_PKTMBUF_F_PINEND_EXT_BUF flag set ("pinned mempools" for short), because it is not known at registration time whether the mempool is a pktmbuf one, and its elements may not yet be initialized to analyze them. Attempts had been made to recognize such pools, but there was no robust solution, only the owner of a mempool (the application or a device) knows its type. This patch extends common/mlx5 registration code to accept a hint that the mempool is a pinned one and uses this capability from net/mlx5 driver. 1. Remove all code assuming pktmbuf pool type or trying to recognize the type of a pool. 2. Register pinned mempools used for Rx and their external memory on port start. Populate the MR cache with all their MRs. 3. Change Tx slow path logic as follows: 3.1. Search the mempool database for a memory region (MR) by the mbuf pool and its buffer address. 3.2. If not MR for the address is found for the mempool, and the mempool contains only pinned external buffers, perform the mempool registration of the mempool and its external pinned memory. 3.3. Fall back to using page-based MRs in other cases (for example, a buffer with externally attached memory, but not from a pinned mempool). Fixes: 690b2a88c2f7 ("common/mlx5: add mempool registration facilities") Fixes: fec28ca0e3a9 ("net/mlx5: support mempool registration") Signed-off-by: Dmitry Kozlyuk Reviewed-by: Matan Azrad Reviewed-by: Viacheslav Ovsiienko --- v2: 1) rebase on ToT 2) fix MR cache population drivers/common/mlx5/mlx5_common.c | 11 +- drivers/common/mlx5/mlx5_common_mp.c | 4 +- drivers/common/mlx5/mlx5_common_mp.h | 10 +- drivers/common/mlx5/mlx5_common_mr.c | 166 ++++++++++++++++++++------- drivers/common/mlx5/mlx5_common_mr.h | 15 +-- drivers/common/mlx5/version.map | 1 + drivers/net/mlx5/linux/mlx5_mp_os.c | 3 +- drivers/net/mlx5/mlx5_rxq.c | 2 +- drivers/net/mlx5/mlx5_trigger.c | 40 ++----- 9 files changed, 158 insertions(+), 94 deletions(-) diff --git a/drivers/common/mlx5/mlx5_common.c b/drivers/common/mlx5/mlx5_common.c index 66c2c08b7d..f1650f94c6 100644 --- a/drivers/common/mlx5/mlx5_common.c +++ b/drivers/common/mlx5/mlx5_common.c @@ -317,9 +317,9 @@ mlx5_dev_to_pci_str(const struct rte_device *dev, char *addr, size_t size) */ static int mlx5_dev_mempool_register(struct mlx5_common_device *cdev, - struct rte_mempool *mp) + struct rte_mempool *mp, bool is_extmem) { - return mlx5_mr_mempool_register(cdev, mp); + return mlx5_mr_mempool_register(cdev, mp, is_extmem); } /** @@ -353,7 +353,7 @@ mlx5_dev_mempool_register_cb(struct rte_mempool *mp, void *arg) struct mlx5_common_device *cdev = arg; int ret; - ret = mlx5_dev_mempool_register(cdev, mp); + ret = mlx5_dev_mempool_register(cdev, mp, false); if (ret < 0 && rte_errno != EEXIST) DRV_LOG(ERR, "Failed to register existing mempool %s for PD %p: %s", @@ -390,13 +390,10 @@ mlx5_dev_mempool_event_cb(enum rte_mempool_event event, struct rte_mempool *mp, void *arg) { struct mlx5_common_device *cdev = arg; - bool extmem = mlx5_mempool_is_extmem(mp); switch (event) { case RTE_MEMPOOL_EVENT_READY: - if (extmem) - break; - if (mlx5_dev_mempool_register(cdev, mp) < 0) + if (mlx5_dev_mempool_register(cdev, mp, false) < 0) DRV_LOG(ERR, "Failed to register new mempool %s for PD %p: %s", mp->name, cdev->pd, rte_strerror(rte_errno)); diff --git a/drivers/common/mlx5/mlx5_common_mp.c b/drivers/common/mlx5/mlx5_common_mp.c index 536d61f66c..a7a671b7c5 100644 --- a/drivers/common/mlx5/mlx5_common_mp.c +++ b/drivers/common/mlx5/mlx5_common_mp.c @@ -65,7 +65,8 @@ mlx5_mp_req_mr_create(struct mlx5_common_device *cdev, uintptr_t addr) */ int mlx5_mp_req_mempool_reg(struct mlx5_common_device *cdev, - struct rte_mempool *mempool, bool reg) + struct rte_mempool *mempool, bool reg, + bool is_extmem) { struct rte_mp_msg mp_req; struct rte_mp_msg *mp_res; @@ -82,6 +83,7 @@ mlx5_mp_req_mempool_reg(struct mlx5_common_device *cdev, MLX5_MP_REQ_MEMPOOL_UNREGISTER; mp_init_port_agnostic_msg(&mp_req, type); arg->mempool = mempool; + arg->is_extmem = is_extmem; arg->cdev = cdev; ret = rte_mp_request_sync(&mp_req, &mp_rep, &ts); if (ret) { diff --git a/drivers/common/mlx5/mlx5_common_mp.h b/drivers/common/mlx5/mlx5_common_mp.h index b1e3a41a20..4599ba8f92 100644 --- a/drivers/common/mlx5/mlx5_common_mp.h +++ b/drivers/common/mlx5/mlx5_common_mp.h @@ -37,9 +37,12 @@ struct mlx5_mp_arg_queue_id { struct mlx5_mp_arg_mr_manage { struct mlx5_common_device *cdev; + RTE_STD_C11 union { - struct rte_mempool *mempool; - /* MLX5_MP_REQ_MEMPOOL_(UN)REGISTER */ + struct { + struct rte_mempool *mempool; + bool is_extmem; + }; /* MLX5_MP_REQ_MEMPOOL_(UN)REGISTER */ uintptr_t addr; /* MLX5_MP_REQ_CREATE_MR */ }; }; @@ -134,7 +137,8 @@ __rte_internal int mlx5_mp_req_mr_create(struct mlx5_common_device *cdev, uintptr_t addr); __rte_internal int mlx5_mp_req_mempool_reg(struct mlx5_common_device *cdev, - struct rte_mempool *mempool, bool reg); + struct rte_mempool *mempool, bool reg, + bool is_extmem); __rte_internal int mlx5_mp_req_queue_state_modify(struct mlx5_mp_id *mp_id, struct mlx5_mp_arg_queue_state_modify *sm); diff --git a/drivers/common/mlx5/mlx5_common_mr.c b/drivers/common/mlx5/mlx5_common_mr.c index 70365e1466..91feacf94d 100644 --- a/drivers/common/mlx5/mlx5_common_mr.c +++ b/drivers/common/mlx5/mlx5_common_mr.c @@ -47,6 +47,8 @@ struct mlx5_mempool_reg { struct mlx5_mempool_mr *mrs; /** Number of memory regions. */ unsigned int mrs_n; + /** Whether the MR were created for external pinned memory. */ + bool is_extmem; }; void @@ -1403,6 +1405,8 @@ mlx5_mempool_get_extmem(struct rte_mempool *mp, struct mlx5_range **out, * * @param[in] mp * Analyzed mempool. + * @param[in] is_extmem + * Whether the pool is contains only external pinned buffers. * @param[out] out * Receives the ranges, caller must release it with free(). * @param[out] ount_n @@ -1412,17 +1416,16 @@ mlx5_mempool_get_extmem(struct rte_mempool *mp, struct mlx5_range **out, * 0 on success, (-1) on failure. */ static int -mlx5_get_mempool_ranges(struct rte_mempool *mp, struct mlx5_range **out, - unsigned int *out_n) +mlx5_get_mempool_ranges(struct rte_mempool *mp, bool is_extmem, + struct mlx5_range **out, unsigned int *out_n) { struct mlx5_range *chunks; unsigned int chunks_n, contig_n, i; int ret; /* Collect the pool underlying memory. */ - ret = mlx5_mempool_is_extmem(mp) ? - mlx5_mempool_get_extmem(mp, &chunks, &chunks_n) : - mlx5_mempool_get_chunks(mp, &chunks, &chunks_n); + ret = is_extmem ? mlx5_mempool_get_extmem(mp, &chunks, &chunks_n) : + mlx5_mempool_get_chunks(mp, &chunks, &chunks_n); if (ret < 0) return ret; /* Merge adjacent chunks and place them at the beginning. */ @@ -1446,6 +1449,8 @@ mlx5_get_mempool_ranges(struct rte_mempool *mp, struct mlx5_range **out, * * @param[in] mp * Mempool to analyze. + * @param[in] is_extmem + * Whether the pool is contains only external pinned buffers. * @param[out] out * Receives memory ranges to register, aligned to the system page size. * The caller must release them with free(). @@ -1458,14 +1463,15 @@ mlx5_get_mempool_ranges(struct rte_mempool *mp, struct mlx5_range **out, * 0 on success, (-1) on failure. */ static int -mlx5_mempool_reg_analyze(struct rte_mempool *mp, struct mlx5_range **out, - unsigned int *out_n, bool *share_hugepage) +mlx5_mempool_reg_analyze(struct rte_mempool *mp, bool is_extmem, + struct mlx5_range **out, unsigned int *out_n, + bool *share_hugepage) { struct mlx5_range *ranges = NULL; unsigned int i, ranges_n = 0; struct rte_memseg_list *msl; - if (mlx5_get_mempool_ranges(mp, &ranges, &ranges_n) < 0) { + if (mlx5_get_mempool_ranges(mp, is_extmem, &ranges, &ranges_n) < 0) { DRV_LOG(ERR, "Cannot get address ranges for mempool %s", mp->name); return -1; @@ -1507,7 +1513,8 @@ mlx5_mempool_reg_analyze(struct rte_mempool *mp, struct mlx5_range **out, /** Create a registration object for the mempool. */ static struct mlx5_mempool_reg * -mlx5_mempool_reg_create(struct rte_mempool *mp, unsigned int mrs_n) +mlx5_mempool_reg_create(struct rte_mempool *mp, unsigned int mrs_n, + bool is_extmem) { struct mlx5_mempool_reg *mpr = NULL; @@ -1522,6 +1529,7 @@ mlx5_mempool_reg_create(struct rte_mempool *mp, unsigned int mrs_n) mpr->mp = mp; mpr->mrs = (struct mlx5_mempool_mr *)(mpr + 1); mpr->mrs_n = mrs_n; + mpr->is_extmem = is_extmem; return mpr; } @@ -1586,31 +1594,32 @@ mlx5_mempool_reg_detach(struct mlx5_mempool_reg *mpr) static int mlx5_mr_mempool_register_primary(struct mlx5_mr_share_cache *share_cache, - void *pd, struct rte_mempool *mp) + void *pd, struct rte_mempool *mp, + bool is_extmem) { struct mlx5_range *ranges = NULL; - struct mlx5_mempool_reg *mpr, *new_mpr; + struct mlx5_mempool_reg *mpr, *old_mpr, *new_mpr; unsigned int i, ranges_n; - bool share_hugepage; + bool share_hugepage, standalone = false; int ret = -1; /* Early check to avoid unnecessary creation of MRs. */ rte_rwlock_read_lock(&share_cache->rwlock); - mpr = mlx5_mempool_reg_lookup(share_cache, mp); + old_mpr = mlx5_mempool_reg_lookup(share_cache, mp); rte_rwlock_read_unlock(&share_cache->rwlock); - if (mpr != NULL) { + if (old_mpr != NULL && (!is_extmem || old_mpr->is_extmem)) { DRV_LOG(DEBUG, "Mempool %s is already registered for PD %p", mp->name, pd); rte_errno = EEXIST; goto exit; } - if (mlx5_mempool_reg_analyze(mp, &ranges, &ranges_n, + if (mlx5_mempool_reg_analyze(mp, is_extmem, &ranges, &ranges_n, &share_hugepage) < 0) { DRV_LOG(ERR, "Cannot get mempool %s memory ranges", mp->name); rte_errno = ENOMEM; goto exit; } - new_mpr = mlx5_mempool_reg_create(mp, ranges_n); + new_mpr = mlx5_mempool_reg_create(mp, ranges_n, is_extmem); if (new_mpr == NULL) { DRV_LOG(ERR, "Cannot create a registration object for mempool %s in PD %p", @@ -1670,6 +1679,12 @@ mlx5_mr_mempool_register_primary(struct mlx5_mr_share_cache *share_cache, /* Concurrent registration is not supposed to happen. */ rte_rwlock_write_lock(&share_cache->rwlock); mpr = mlx5_mempool_reg_lookup(share_cache, mp); + if (mpr == old_mpr && old_mpr != NULL) { + LIST_REMOVE(old_mpr, next); + standalone = mlx5_mempool_reg_detach(mpr); + /* No need to flush the cache: old MRs cannot be in use. */ + mpr = NULL; + } if (mpr == NULL) { mlx5_mempool_reg_attach(new_mpr); LIST_INSERT_HEAD(&share_cache->mempool_reg_list, new_mpr, next); @@ -1682,6 +1697,10 @@ mlx5_mr_mempool_register_primary(struct mlx5_mr_share_cache *share_cache, mlx5_mempool_reg_destroy(share_cache, new_mpr, true); rte_errno = EEXIST; goto exit; + } else if (old_mpr != NULL) { + DRV_LOG(DEBUG, "Mempool %s registration for PD %p updated for external memory", + mp->name, pd); + mlx5_mempool_reg_destroy(share_cache, old_mpr, standalone); } exit: free(ranges); @@ -1690,9 +1709,9 @@ mlx5_mr_mempool_register_primary(struct mlx5_mr_share_cache *share_cache, static int mlx5_mr_mempool_register_secondary(struct mlx5_common_device *cdev, - struct rte_mempool *mp) + struct rte_mempool *mp, bool is_extmem) { - return mlx5_mp_req_mempool_reg(cdev, mp, true); + return mlx5_mp_req_mempool_reg(cdev, mp, true, is_extmem); } /** @@ -1708,16 +1727,17 @@ mlx5_mr_mempool_register_secondary(struct mlx5_common_device *cdev, */ int mlx5_mr_mempool_register(struct mlx5_common_device *cdev, - struct rte_mempool *mp) + struct rte_mempool *mp, bool is_extmem) { if (mp->flags & RTE_MEMPOOL_F_NON_IO) return 0; switch (rte_eal_process_type()) { case RTE_PROC_PRIMARY: return mlx5_mr_mempool_register_primary(&cdev->mr_scache, - cdev->pd, mp); + cdev->pd, mp, + is_extmem); case RTE_PROC_SECONDARY: - return mlx5_mr_mempool_register_secondary(cdev, mp); + return mlx5_mr_mempool_register_secondary(cdev, mp, is_extmem); default: return -1; } @@ -1756,7 +1776,7 @@ static int mlx5_mr_mempool_unregister_secondary(struct mlx5_common_device *cdev, struct rte_mempool *mp) { - return mlx5_mp_req_mempool_reg(cdev, mp, false); + return mlx5_mp_req_mempool_reg(cdev, mp, false, false /* is_extmem */); } /** @@ -1868,6 +1888,65 @@ mlx5_lookup_mempool_regs(struct mlx5_mr_ctrl *mr_ctrl, return lkey; } +/** + * Populate cache with LKeys of all MRs used by the mempool. + * It is intended to be used to register Rx mempools in advance. + * + * @param mr_ctrl + * Per-queue MR control handle. + * @param mp + * Registered memory pool. + * + * @return + * 0 on success, (-1) on failure and rte_errno is set. + */ +int +mlx5_mr_mempool_populate_cache(struct mlx5_mr_ctrl *mr_ctrl, + struct rte_mempool *mp) +{ + struct mlx5_mr_share_cache *share_cache = + container_of(mr_ctrl->dev_gen_ptr, struct mlx5_mr_share_cache, + dev_gen); + struct mlx5_mr_btree *bt = &mr_ctrl->cache_bh; + struct mlx5_mempool_reg *mpr; + unsigned int i; + + /* + * Registration is valid after the lock is released, + * because the function is called after the mempool is registered. + */ + rte_rwlock_read_lock(&share_cache->rwlock); + mpr = mlx5_mempool_reg_lookup(share_cache, mp); + rte_rwlock_read_unlock(&share_cache->rwlock); + if (mpr == NULL) { + DRV_LOG(ERR, "Mempool %s is not registered", mp->name); + rte_errno = ENOENT; + return -1; + } + for (i = 0; i < mpr->mrs_n; i++) { + struct mlx5_mempool_mr *mr = &mpr->mrs[i]; + struct mr_cache_entry entry; + uint32_t lkey; + uint16_t idx; + + lkey = mr_btree_lookup(bt, &idx, (uintptr_t)mr->pmd_mr.addr); + if (lkey != UINT32_MAX) + continue; + if (bt->len == bt->size) + mr_btree_expand(bt, bt->size << 1); + entry.start = (uintptr_t)mr->pmd_mr.addr; + entry.end = entry.start + mr->pmd_mr.len; + entry.lkey = rte_cpu_to_be_32(mr->pmd_mr.lkey); + if (mr_btree_insert(bt, &entry) < 0) { + DRV_LOG(ERR, "Cannot insert cache entry for mempool %s MR %08x", + mp->name, entry.lkey); + rte_errno = EINVAL; + return -1; + } + } + return 0; +} + /** * Bottom-half lookup for the address from the mempool. * @@ -1909,6 +1988,8 @@ mlx5_mr_mempool2mr_bh(struct mlx5_mr_ctrl *mr_ctrl, uint32_t mlx5_mr_mb2mr_bh(struct mlx5_mr_ctrl *mr_ctrl, struct rte_mbuf *mb) { + struct rte_mempool *mp; + struct mlx5_mprq_buf *buf; uint32_t lkey; uintptr_t addr = (uintptr_t)mb->buf_addr; struct mlx5_mr_share_cache *share_cache = @@ -1917,27 +1998,26 @@ mlx5_mr_mb2mr_bh(struct mlx5_mr_ctrl *mr_ctrl, struct rte_mbuf *mb) struct mlx5_common_device *cdev = container_of(share_cache, struct mlx5_common_device, mr_scache); - if (cdev->config.mr_mempool_reg_en) { - struct rte_mempool *mp = NULL; - struct mlx5_mprq_buf *buf; - - if (!RTE_MBUF_HAS_EXTBUF(mb)) { - mp = mlx5_mb2mp(mb); - } else if (mb->shinfo->free_cb == mlx5_mprq_buf_free_cb) { - /* Recover MPRQ mempool. */ - buf = mb->shinfo->fcb_opaque; - mp = buf->mp; - } - if (mp != NULL) { - lkey = mlx5_mr_mempool2mr_bh(mr_ctrl, mp, addr); - /* - * Lookup can only fail on invalid input, e.g. "addr" - * is not from "mp" or "mp" has MEMPOOL_F_NON_IO set. - */ - if (lkey != UINT32_MAX) - return lkey; - } - /* Fallback for generic mechanism in corner cases. */ + /* Recover MPRQ mempool. */ + if (RTE_MBUF_HAS_EXTBUF(mb) && + mb->shinfo->free_cb == mlx5_mprq_buf_free_cb) { + buf = mb->shinfo->fcb_opaque; + mp = buf->mp; + } else { + mp = mlx5_mb2mp(mb); + } + lkey = mlx5_mr_mempool2mr_bh(mr_ctrl, mp, addr); + if (lkey != UINT32_MAX) + return lkey; + /* Register pinned external memory if the mempool is not used for Rx. */ + if (cdev->config.mr_mempool_reg_en && + (rte_pktmbuf_priv_flags(mp) & RTE_PKTMBUF_POOL_F_PINNED_EXT_BUF)) { + if (mlx5_mr_mempool_register(cdev, mp, true) < 0) + return UINT32_MAX; + lkey = mlx5_mr_mempool2mr_bh(mr_ctrl, mp, addr); + MLX5_ASSERT(lkey != UINT32_MAX); + return lkey; } + /* Fallback to generic mechanism in corner cases. */ return mlx5_mr_addr2mr_bh(mr_ctrl, addr); } diff --git a/drivers/common/mlx5/mlx5_common_mr.h b/drivers/common/mlx5/mlx5_common_mr.h index de0cab29cc..cf384b6748 100644 --- a/drivers/common/mlx5/mlx5_common_mr.h +++ b/drivers/common/mlx5/mlx5_common_mr.h @@ -255,20 +255,15 @@ mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb, mlx5_dereg_mr_t *dereg_mr_cb); __rte_internal int mlx5_mr_mempool_register(struct mlx5_common_device *cdev, - struct rte_mempool *mp); + struct rte_mempool *mp, bool is_extmem); __rte_internal int mlx5_mr_mempool_unregister(struct mlx5_common_device *cdev, struct rte_mempool *mp); -/** Check if @p mp has buffers pinned in external memory. */ -static inline bool -mlx5_mempool_is_extmem(struct rte_mempool *mp) -{ - return (mp->private_data_size == - sizeof(struct rte_pktmbuf_pool_private)) && - (mp->elt_size >= sizeof(struct rte_mbuf)) && - (rte_pktmbuf_priv_flags(mp) & RTE_PKTMBUF_POOL_F_PINNED_EXT_BUF); -} +__rte_internal +int +mlx5_mr_mempool_populate_cache(struct mlx5_mr_ctrl *mr_ctrl, + struct rte_mempool *mp); #endif /* RTE_PMD_MLX5_COMMON_MR_H_ */ diff --git a/drivers/common/mlx5/version.map b/drivers/common/mlx5/version.map index 8a62dc2782..34e86004a0 100644 --- a/drivers/common/mlx5/version.map +++ b/drivers/common/mlx5/version.map @@ -145,4 +145,5 @@ INTERNAL { mlx5_mr_mempool_unregister; mlx5_mp_req_mempool_reg; mlx5_mr_mempool2mr_bh; + mlx5_mr_mempool_populate_cache; }; diff --git a/drivers/net/mlx5/linux/mlx5_mp_os.c b/drivers/net/mlx5/linux/mlx5_mp_os.c index edc5203dd6..c448a3e9eb 100644 --- a/drivers/net/mlx5/linux/mlx5_mp_os.c +++ b/drivers/net/mlx5/linux/mlx5_mp_os.c @@ -48,7 +48,8 @@ mlx5_mp_os_handle_port_agnostic(const struct rte_mp_msg *mp_msg, return rte_mp_reply(&mp_res, peer); case MLX5_MP_REQ_MEMPOOL_REGISTER: mp_init_port_agnostic_msg(&mp_res, param->type); - res->result = mlx5_mr_mempool_register(mng->cdev, mng->mempool); + res->result = mlx5_mr_mempool_register(mng->cdev, mng->mempool, + mng->is_extmem); return rte_mp_reply(&mp_res, peer); case MLX5_MP_REQ_MEMPOOL_UNREGISTER: mp_init_port_agnostic_msg(&mp_res, param->type); diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index 480f4f9f07..e406779faf 100644 --- a/drivers/net/mlx5/mlx5_rxq.c +++ b/drivers/net/mlx5/mlx5_rxq.c @@ -1458,7 +1458,7 @@ mlx5_mprq_alloc_mp(struct rte_eth_dev *dev) rte_errno = ENOMEM; return -rte_errno; } - ret = mlx5_mr_mempool_register(priv->sh->cdev, mp); + ret = mlx5_mr_mempool_register(priv->sh->cdev, mp, false); if (ret < 0 && rte_errno != EEXIST) { ret = rte_errno; DRV_LOG(ERR, "port %u failed to register a mempool for Multi-Packet RQ", diff --git a/drivers/net/mlx5/mlx5_trigger.c b/drivers/net/mlx5/mlx5_trigger.c index e2bfde19c7..dcdd0624a1 100644 --- a/drivers/net/mlx5/mlx5_trigger.c +++ b/drivers/net/mlx5/mlx5_trigger.c @@ -105,21 +105,6 @@ mlx5_txq_start(struct rte_eth_dev *dev) return -rte_errno; } -/** - * Translate the chunk address to MR key in order to put in into the cache. - */ -static void -mlx5_rxq_mempool_register_cb(struct rte_mempool *mp, void *opaque, - struct rte_mempool_memhdr *memhdr, - unsigned int idx) -{ - struct mlx5_rxq_data *rxq = opaque; - - RTE_SET_USED(mp); - RTE_SET_USED(idx); - mlx5_rx_addr2mr(rxq, (uintptr_t)memhdr->addr); -} - /** * Register Rx queue mempools and fill the Rx queue cache. * This function tolerates repeated mempool registration. @@ -139,24 +124,23 @@ mlx5_rxq_mempool_register(struct mlx5_rxq_ctrl *rxq_ctrl) mlx5_mr_flush_local_cache(&rxq_ctrl->rxq.mr_ctrl); /* MPRQ mempool is registered on creation, just fill the cache. */ - if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq)) { - rte_mempool_mem_iter(rxq_ctrl->rxq.mprq_mp, - mlx5_rxq_mempool_register_cb, - &rxq_ctrl->rxq); - return 0; - } + if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq)) + return mlx5_mr_mempool_populate_cache(&rxq_ctrl->rxq.mr_ctrl, + rxq_ctrl->rxq.mprq_mp); for (s = 0; s < rxq_ctrl->rxq.rxseg_n; s++) { - uint32_t flags; + bool is_extmem; mp = rxq_ctrl->rxq.rxseg[s].mp; - flags = mp != rxq_ctrl->rxq.mprq_mp ? - rte_pktmbuf_priv_flags(mp) : 0; - ret = mlx5_mr_mempool_register(rxq_ctrl->sh->cdev, mp); + is_extmem = (rte_pktmbuf_priv_flags(mp) & + RTE_PKTMBUF_POOL_F_PINNED_EXT_BUF) != 0; + ret = mlx5_mr_mempool_register(rxq_ctrl->sh->cdev, mp, + is_extmem); if (ret < 0 && rte_errno != EEXIST) return ret; - if ((flags & RTE_PKTMBUF_POOL_F_PINNED_EXT_BUF) == 0) - rte_mempool_mem_iter(mp, mlx5_rxq_mempool_register_cb, - &rxq_ctrl->rxq); + ret = mlx5_mr_mempool_populate_cache(&rxq_ctrl->rxq.mr_ctrl, + mp); + if (ret < 0) + return ret; } return 0; } -- 2.25.1