From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id EF1BDA00C5; Sat, 11 Dec 2021 10:08:56 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9783241153; Sat, 11 Dec 2021 10:08:51 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 5D6AF4114F for ; Sat, 11 Dec 2021 10:08:50 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 1BB7cS6V005885; Sat, 11 Dec 2021 01:08:49 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=tG05M1ljdEiQByXdGM+r1/AgLbyvX9V7ksc/lHshad4=; b=dD0+MIrDYosTo2I+zO5dppc7sEQBUjR9wPfVAleDaDqAINV+Arft4B6wnFPYP3XzOoy1 KPCXS9Fu1FgknVUGM2IkFmltI2Guz9U2i+DlvBG1ztZWXt+1LqrQ3r+VBa0dBC/ZATH9 sFoL8uoUATtryieoW9mIUEaP2NCFyfda24qAzwCrp7Ha/2BzPh6S67SKrgQywExfZqwh hVAwjfglABlxbxvrjxcFGdOqcIYot6xLbT1y03KXUHObPTe5zVi+l4YMLcYlI6Kq+2FG 4xhyKCPKCXqMgomVd1J1uZBEP0PAqXRGVryPs0FvhwcpWjb8nXg2E7DIawFChuwfSgdO tw== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3cuv5hp4my-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Sat, 11 Dec 2021 01:08:49 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 11 Dec 2021 01:08:47 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 11 Dec 2021 01:08:47 -0800 Received: from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14]) by maili.marvell.com (Postfix) with ESMTP id 775C73F7068; Sat, 11 Dec 2021 01:08:44 -0800 (PST) From: To: , Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , , , Liron Himi , Jerin Jacob Subject: [dpdk-dev] [PATCH v5 2/5] common/cnxk: add REE mbox definitions Date: Sat, 11 Dec 2021 14:34:32 +0530 Message-ID: <20211211090435.2889574-3-jerinj@marvell.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20211211090435.2889574-1-jerinj@marvell.com> References: <20211207183143.27145-1-lironh@marvell.com> <20211211090435.2889574-1-jerinj@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: x79lCHH8fpTWtLmA2DLkTpRkGmNM9vqq X-Proofpoint-ORIG-GUID: x79lCHH8fpTWtLmA2DLkTpRkGmNM9vqq X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2021-12-11_03,2021-12-10_01,2021-12-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Liron Himi add REE mbox definitions Signed-off-by: Liron Himi Acked-by: Jerin Jacob --- drivers/common/cnxk/roc_mbox.h | 100 +++++++++++++++++++++++++++++++++ 1 file changed, 100 insertions(+) diff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h index b63fe108c9..e97d93e261 100644 --- a/drivers/common/cnxk/roc_mbox.h +++ b/drivers/common/cnxk/roc_mbox.h @@ -151,6 +151,16 @@ struct mbox_msghdr { M(CPT_GET_CAPS, 0xBFD, cpt_caps_get, msg_req, cpt_caps_rsp_msg) \ M(CPT_GET_ENG_GRP, 0xBFF, cpt_eng_grp_get, cpt_eng_grp_req, \ cpt_eng_grp_rsp) \ + /* REE mbox IDs (range 0xE00 - 0xFFF) */ \ + M(REE_CONFIG_LF, 0xE01, ree_config_lf, ree_lf_req_msg, msg_rsp) \ + M(REE_RD_WR_REGISTER, 0xE02, ree_rd_wr_register, ree_rd_wr_reg_msg, \ + ree_rd_wr_reg_msg) \ + M(REE_RULE_DB_PROG, 0xE03, ree_rule_db_prog, ree_rule_db_prog_req_msg, \ + msg_rsp) \ + M(REE_RULE_DB_LEN_GET, 0xE04, ree_rule_db_len_get, ree_req_msg, \ + ree_rule_db_len_rsp_msg) \ + M(REE_RULE_DB_GET, 0xE05, ree_rule_db_get, ree_rule_db_get_req_msg, \ + ree_rule_db_get_rsp_msg) \ /* SDP mbox IDs (range 0x1000 - 0x11FF) */ \ M(SET_SDP_CHAN_INFO, 0x1000, set_sdp_chan_info, sdp_chan_info_msg, \ msg_rsp) \ @@ -1452,6 +1462,96 @@ struct cpt_eng_grp_rsp { uint8_t __io eng_grp_num; }; +/* REE mailbox error codes + * Range 1001 - 1100. + */ +enum ree_af_status { + REE_AF_ERR_RULE_UNKNOWN_VALUE = -1001, + REE_AF_ERR_LF_NO_MORE_RESOURCES = -1002, + REE_AF_ERR_LF_INVALID = -1003, + REE_AF_ERR_ACCESS_DENIED = -1004, + REE_AF_ERR_RULE_DB_PARTIAL = -1005, + REE_AF_ERR_RULE_DB_EQ_BAD_VALUE = -1006, + REE_AF_ERR_RULE_DB_BLOCK_ALLOC_FAILED = -1007, + REE_AF_ERR_BLOCK_NOT_IMPLEMENTED = -1008, + REE_AF_ERR_RULE_DB_INC_OFFSET_TOO_BIG = -1009, + REE_AF_ERR_RULE_DB_OFFSET_TOO_BIG = -1010, + REE_AF_ERR_Q_IS_GRACEFUL_DIS = -1011, + REE_AF_ERR_Q_NOT_GRACEFUL_DIS = -1012, + REE_AF_ERR_RULE_DB_ALLOC_FAILED = -1013, + REE_AF_ERR_RULE_DB_TOO_BIG = -1014, + REE_AF_ERR_RULE_DB_GEQ_BAD_VALUE = -1015, + REE_AF_ERR_RULE_DB_LEQ_BAD_VALUE = -1016, + REE_AF_ERR_RULE_DB_WRONG_LENGTH = -1017, + REE_AF_ERR_RULE_DB_WRONG_OFFSET = -1018, + REE_AF_ERR_RULE_DB_BLOCK_TOO_BIG = -1019, + REE_AF_ERR_RULE_DB_SHOULD_FILL_REQUEST = -1020, + REE_AF_ERR_RULE_DBI_ALLOC_FAILED = -1021, + REE_AF_ERR_LF_WRONG_PRIORITY = -1022, + REE_AF_ERR_LF_SIZE_TOO_BIG = -1023, +}; + +/* REE mbox message formats */ + +struct ree_req_msg { + struct mbox_msghdr hdr; + uint32_t __io blkaddr; +}; + +struct ree_lf_req_msg { + struct mbox_msghdr hdr; + uint32_t __io blkaddr; + uint32_t __io size; + uint8_t __io lf; + uint8_t __io pri; +}; + +struct ree_rule_db_prog_req_msg { + struct mbox_msghdr hdr; +#define REE_RULE_DB_REQ_BLOCK_SIZE ((64ULL * 1024ULL) >> 1) + uint8_t __io rule_db[REE_RULE_DB_REQ_BLOCK_SIZE]; + uint32_t __io blkaddr; /* REE0 or REE1 */ + uint32_t __io total_len; /* total len of rule db */ + uint32_t __io offset; /* offset of current rule db block */ + uint16_t __io len; /* length of rule db block */ + uint8_t __io is_last; /* is this the last block */ + uint8_t __io is_incremental; /* is incremental flow */ + uint8_t __io is_dbi; /* is rule db incremental */ +}; + +struct ree_rule_db_get_req_msg { + struct mbox_msghdr hdr; + uint32_t __io blkaddr; + uint32_t __io offset; /* retrieve db from this offset */ + uint8_t __io is_dbi; /* is request for rule db incremental */ +}; + +struct ree_rd_wr_reg_msg { + struct mbox_msghdr hdr; + uint64_t __io reg_offset; + uint64_t __io *ret_val; + uint64_t __io val; + uint32_t __io blkaddr; + uint8_t __io is_write; +}; + +struct ree_rule_db_len_rsp_msg { + struct mbox_msghdr hdr; + uint32_t __io blkaddr; + uint32_t __io len; + uint32_t __io inc_len; +}; + +struct ree_rule_db_get_rsp_msg { + struct mbox_msghdr hdr; +#define REE_RULE_DB_RSP_BLOCK_SIZE (15ULL * 1024ULL) + uint8_t __io rule_db[REE_RULE_DB_RSP_BLOCK_SIZE]; + uint32_t __io total_len; /* total len of rule db */ + uint32_t __io offset; /* offset of current rule db block */ + uint16_t __io len; /* length of rule db block */ + uint8_t __io is_last; /* is this the last block */ +}; + /* NPC mbox message structs */ #define NPC_MCAM_ENTRY_INVALID 0xFFFF -- 2.34.1