From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 044A1A00BE; Mon, 20 Dec 2021 18:06:19 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 500264067C; Mon, 20 Dec 2021 18:06:18 +0100 (CET) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by mails.dpdk.org (Postfix) with ESMTP id 692C24003C; Mon, 20 Dec 2021 18:06:16 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1640019976; x=1671555976; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=kMd5dzK/kEWihnX2k2cIIEJO7MqqV/Ce2FIRA5kZQ78=; b=iCrvU/OJxIi5zDdMYdhEMiP7anUJK/CupFDhGEyQQyk1X2nhkXQJKWdb ph2rUDv9u8AO1eDwMGrkfhtTxIy4yKUG91y0YMcACacWLzEZkkv0+CRtN ibQRYbdvDIk/OLdeYZeNXrTtQQ6tXfFMWuGsj9YrhaWdDFPfsNdJ52ZOe 9W0h1FIuipGEbvpEM13w/HhIv9VgXPy5OPxDayQeIqQ0Q5l9UNpvavPhQ OAmJvuVREal7//Ue6BX9HtKfITy+KNuRIYct0ZFGjeQm7S0Md12Wyn0H1 Jes5/yHJtFmldDI9Or0s/6urWwtNf1hGbzEQv3KBHR6IyZeEMIvUAqxcT w==; X-IronPort-AV: E=McAfee;i="6200,9189,10203"; a="240179066" X-IronPort-AV: E=Sophos;i="5.88,221,1635231600"; d="scan'208";a="240179066" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Dec 2021 09:05:31 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,220,1635231600"; d="scan'208";a="507759126" Received: from silpixa00399126.ir.intel.com ([10.237.223.86]) by orsmga007.jf.intel.com with ESMTP; 20 Dec 2021 09:05:29 -0800 From: Bruce Richardson To: dev@dpdk.org Cc: Bruce Richardson , kevin.laatz@intel.com, stable@dpdk.org Subject: [PATCH] dma/idxd: fix burst capacity calculation Date: Mon, 20 Dec 2021 17:05:14 +0000 Message-Id: <20211220170514.736732-1-bruce.richardson@intel.com> X-Mailer: git-send-email 2.32.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org When the maximum burst size supported by HW is less than the available ring space, incorrect capacity was returned when there was already some jobs queued up for submission. This was because the capacity calculation failed to subtract the number of already-enqueued jobs from the max burst size. After subtraction is done, ensure that any negative values (which should never occur if the user respects the reported limits), are clamped to zero. Fixes: 9459de4edc99 ("dma/idxd: add burst capacity") Cc: kevin.laatz@intel.com Cc: stable@dpdk.org Signed-off-by: Bruce Richardson --- drivers/dma/idxd/idxd_common.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/dma/idxd/idxd_common.c b/drivers/dma/idxd/idxd_common.c index fc11b11337..4442d1cbbd 100644 --- a/drivers/dma/idxd/idxd_common.c +++ b/drivers/dma/idxd/idxd_common.c @@ -485,7 +485,9 @@ idxd_burst_capacity(const void *dev_private, uint16_t vchan __rte_unused) write_idx += idxd->desc_ring_mask + 1; used_space = write_idx - idxd->ids_returned; - return RTE_MIN((idxd->desc_ring_mask - used_space), idxd->max_batch_size); + const int ret = RTE_MIN((idxd->desc_ring_mask - used_space), + (idxd->max_batch_size - idxd->batch_size)); + return ret < 0 ? 0 : (uint16_t)ret; } int -- 2.32.0