From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0B6E3A00C5; Fri, 24 Dec 2021 17:46:41 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 6ECB64114F; Fri, 24 Dec 2021 17:46:31 +0100 (CET) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mails.dpdk.org (Postfix) with ESMTP id 8F4AB4114B for ; Fri, 24 Dec 2021 17:46:29 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1FA07ED1; Fri, 24 Dec 2021 08:46:29 -0800 (PST) Received: from net-x86-dell-8268.shanghai.arm.com (net-x86-dell-8268.shanghai.arm.com [10.169.210.111]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 0CAB73F5A1; Fri, 24 Dec 2021 08:46:26 -0800 (PST) From: Feifei Wang To: Beilei Xing Cc: dev@dpdk.org, nd@arm.com, Feifei Wang , Honnappa Nagarahalli , Ruifeng Wang Subject: [RFC PATCH v1 3/4] net/i40e: add direct re-arm mode internal API Date: Sat, 25 Dec 2021 00:46:11 +0800 Message-Id: <20211224164613.32569-4-feifei.wang2@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211224164613.32569-1-feifei.wang2@arm.com> References: <20211224164613.32569-1-feifei.wang2@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org For direct re-arm mode, add two internal API for i40e. One is to enable direct re-arming mode in Rx queue. The other is to map Tx queue with Rx queue to make Rx queue take buffers from the specific Tx queue. Suggested-by: Honnappa Nagarahalli Signed-off-by: Feifei Wang Reviewed-by: Ruifeng Wang --- drivers/net/i40e/i40e_ethdev.c | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index c0bfff43ee..33f89c5d9a 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -369,6 +369,13 @@ static int i40e_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, static int i40e_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id); +static int i40e_dev_rx_queue_direct_rearm_enable(struct rte_eth_dev *dev, + uint16_t queue_id); +static int i40e_dev_rx_queue_direct_rearm_map(struct rte_eth_dev *dev, + uint16_t rx_queue_id, + uint16_t tx_port_id, + uint16_t tx_queue_id); + static int i40e_get_regs(struct rte_eth_dev *dev, struct rte_dev_reg_info *regs); @@ -476,6 +483,8 @@ static const struct eth_dev_ops i40e_eth_dev_ops = { .rx_queue_setup = i40e_dev_rx_queue_setup, .rx_queue_intr_enable = i40e_dev_rx_queue_intr_enable, .rx_queue_intr_disable = i40e_dev_rx_queue_intr_disable, + .rx_queue_direct_rearm_enable = i40e_dev_rx_queue_direct_rearm_enable, + .rx_queue_direct_rearm_map = i40e_dev_rx_queue_direct_rearm_map, .rx_queue_release = i40e_dev_rx_queue_release, .tx_queue_setup = i40e_dev_tx_queue_setup, .tx_queue_release = i40e_dev_tx_queue_release, @@ -11115,6 +11124,31 @@ i40e_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id) return 0; } +static int i40e_dev_rx_queue_direct_rearm_enable(struct rte_eth_dev *dev, + uint16_t queue_id) +{ + struct i40e_rx_queue *rxq; + + rxq = dev->data->rx_queues[queue_id]; + rxq->direct_rxrearm_enable = 1; + + return 0; +} + +static int i40e_dev_rx_queue_direct_rearm_map(struct rte_eth_dev *dev, + uint16_t rx_queue_id, uint16_t tx_port_id, + uint16_t tx_queue_id) +{ + struct i40e_rx_queue *rxq; + + rxq = dev->data->rx_queues[rx_queue_id]; + + rxq->direct_rxrearm_port = tx_port_id; + rxq->direct_rxrearm_queue = tx_queue_id; + + return 0; +} + /** * This function is used to check if the register is valid. * Below is the valid registers list for X722 only: -- 2.25.1