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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 12.22.5.238 as permitted sender) receiver=protection.outlook.com; client-ip=12.22.5.238; helo=mail.nvidia.com; Received: from mail.nvidia.com (12.22.5.238) by CO1NAM11FT034.mail.protection.outlook.com (10.13.174.248) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4823.18 via Frontend Transport; Tue, 28 Dec 2021 09:20:59 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by DRHQMAIL105.nvidia.com (10.27.9.14) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Tue, 28 Dec 2021 09:20:59 +0000 Received: from nvidia.com (172.20.187.5) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.986.9; Tue, 28 Dec 2021 01:20:57 -0800 From: Dmitry Kozlyuk To: CC: , , Matan Azrad Subject: [PATCH] net/mlx5: relax headroom assertion Date: Tue, 28 Dec 2021 11:20:43 +0200 Message-ID: <20211228092043.3360072-1-dkozlyuk@nvidia.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: fc18fa80-14ac-4cd1-6d85-08d9c9e35c96 X-MS-TrafficTypeDiagnostic: BL0PR12MB2452:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:669; 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SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:mail.nvidia.com; PTR:InfoNoRecords; CAT:NONE; SFS:(4636009)(46966006)(36840700001)(40470700002)(5660300002)(6666004)(8936002)(82310400004)(47076005)(86362001)(26005)(2906002)(16526019)(55016003)(450100002)(70206006)(40460700001)(186003)(70586007)(81166007)(4326008)(508600001)(356005)(316002)(36756003)(6286002)(6916009)(2616005)(83380400001)(1076003)(7696005)(36860700001)(336012)(426003)(107886003)(54906003)(8676002)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Dec 2021 09:20:59.6507 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fc18fa80-14ac-4cd1-6d85-08d9c9e35c96 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.238]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT034.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL0PR12MB2452 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org A debug assertion in Single-Packet Receive Queue (SPRQ) mode required all Rx mbufs to have a 128 byte headroom, based on the assumption that rte_pktmbuf_init() sets it. However, rte_pktmbuf_init() may set a smaller headroom if the dataroom is insufficient, e.g. this is a natural case for split buffer segments. The headroom can also be larger. Only check the headroom size when vectored Rx routines are used because they rely on it. Relax the assertion to require sufficient headroom size, not an exact one. Fixes: a0a45e8af723 ("net/mlx5: configure Rx queue for buffer split") Cc: viacheslavo@nvidia.com Cc: stable@dpdk.org Signed-off-by: Dmitry Kozlyuk Acked-by: Matan Azrad --- drivers/net/mlx5/mlx5_rxq.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index f77d42dedf..baf676d3b4 100644 --- a/drivers/net/mlx5/mlx5_rxq.c +++ b/drivers/net/mlx5/mlx5_rxq.c @@ -139,6 +139,7 @@ rxq_alloc_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl) unsigned int elts_n = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ? (1 << rxq_ctrl->rxq.elts_n) * (1 << rxq_ctrl->rxq.strd_num_n) : (1 << rxq_ctrl->rxq.elts_n); + bool has_vec_support = mlx5_rxq_check_vec_support(&rxq_ctrl->rxq) > 0; unsigned int i; int err; @@ -160,8 +161,9 @@ rxq_alloc_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl) rte_errno = ENOMEM; goto error; } - /* Headroom is reserved by rte_pktmbuf_alloc(). */ - MLX5_ASSERT(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM); + /* Only vectored Rx routines rely on headroom size. */ + MLX5_ASSERT(!has_vec_support || + DATA_OFF(buf) >= RTE_PKTMBUF_HEADROOM); /* Buffer is supposed to be empty. */ MLX5_ASSERT(rte_pktmbuf_data_len(buf) == 0); MLX5_ASSERT(rte_pktmbuf_pkt_len(buf) == 0); @@ -174,7 +176,7 @@ rxq_alloc_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl) (*rxq_ctrl->rxq.elts)[i] = buf; } /* If Rx vector is activated. */ - if (mlx5_rxq_check_vec_support(&rxq_ctrl->rxq) > 0) { + if (has_vec_support) { struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq; struct rte_mbuf *mbuf_init = &rxq->fake_mbuf; struct rte_pktmbuf_pool_private *priv = -- 2.25.1