From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3B8C9A0350; Mon, 3 Jan 2022 11:02:05 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 020FC4116A; Mon, 3 Jan 2022 11:01:40 +0100 (CET) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by mails.dpdk.org (Postfix) with ESMTP id 380A740E0F; Mon, 3 Jan 2022 11:01:35 +0100 (CET) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 11195200CFE; Mon, 3 Jan 2022 11:01:35 +0100 (CET) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id A4094200CB8; Mon, 3 Jan 2022 11:01:34 +0100 (CET) Received: from lsv03274.swis.in-blr01.nxp.com (lsv03274.swis.in-blr01.nxp.com [92.120.147.114]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 01984183AC4C; Mon, 3 Jan 2022 18:01:33 +0800 (+08) From: nipun.gupta@nxp.com To: dev@dpdk.org Cc: thomas@monjalon.net, ferruh.yigit@intel.com, hemant.agrawal@nxp.com, stephen@networkplumber.org, stable@dpdk.org, Vanshika Shukla Subject: [PATCH v3 05/15] net/dpaa2: fix timestamping for IEEE1588 Date: Mon, 3 Jan 2022 15:31:19 +0530 Message-Id: <20220103100129.23965-6-nipun.gupta@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220103100129.23965-1-nipun.gupta@nxp.com> References: <20211206121824.3493-1-nipun.gupta@nxp.com> <20220103100129.23965-1-nipun.gupta@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Vanshika Shukla The current implementation of DPAA2 driver code is such that it records Rx and Tx timestamp for PTP without checking if they are PTP packets or not. Packets for which RTE_MBUF_F_RX_IEEE1588_TMST and RTE_MBUF_F_TX_IEEE1588_TMST is not set, Rx and Tx timestamp should not be recorded. This patch fixes this issue by checking if the required flags are set in the mbuf before recording timestamps. Also this change defines separate values for DPAA2_TX_CONF_ENABLE and DPAA2_NO_PREFETCH_RX Fixes: e806bf878c17 ("net/dpaa2: support timestamp") Cc: stable@dpdk.org Signed-off-by: Vanshika Shukla --- drivers/net/dpaa2/dpaa2_ethdev.h | 2 +- drivers/net/dpaa2/dpaa2_ptp.c | 8 ++++--- drivers/net/dpaa2/dpaa2_rxtx.c | 39 +++++++++++++++++++++++++------- 3 files changed, 37 insertions(+), 12 deletions(-) diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h index c5e9267bf0..c21571e63d 100644 --- a/drivers/net/dpaa2/dpaa2_ethdev.h +++ b/drivers/net/dpaa2/dpaa2_ethdev.h @@ -62,7 +62,7 @@ /* Disable RX tail drop, default is enable */ #define DPAA2_RX_TAILDROP_OFF 0x04 /* Tx confirmation enabled */ -#define DPAA2_TX_CONF_ENABLE 0x08 +#define DPAA2_TX_CONF_ENABLE 0x06 #define DPAA2_RSS_OFFLOAD_ALL ( \ RTE_ETH_RSS_L2_PAYLOAD | \ diff --git a/drivers/net/dpaa2/dpaa2_ptp.c b/drivers/net/dpaa2/dpaa2_ptp.c index 8d79e39244..3a4536dd69 100644 --- a/drivers/net/dpaa2/dpaa2_ptp.c +++ b/drivers/net/dpaa2/dpaa2_ptp.c @@ -111,10 +111,12 @@ int dpaa2_timesync_read_tx_timestamp(struct rte_eth_dev *dev, { struct dpaa2_dev_priv *priv = dev->data->dev_private; - if (priv->next_tx_conf_queue) - dpaa2_dev_tx_conf(priv->next_tx_conf_queue); - else + if (priv->next_tx_conf_queue) { + while (!priv->tx_timestamp) + dpaa2_dev_tx_conf(priv->next_tx_conf_queue); + } else { return -1; + } *timestamp = rte_ns_to_timespec(priv->tx_timestamp); return 0; diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c index c65589a5f3..ee3ed1b152 100644 --- a/drivers/net/dpaa2/dpaa2_rxtx.c +++ b/drivers/net/dpaa2/dpaa2_rxtx.c @@ -140,8 +140,10 @@ dpaa2_dev_rx_parse_slow(struct rte_mbuf *mbuf, annotation->word3, annotation->word4); #if defined(RTE_LIBRTE_IEEE1588) - if (BIT_ISSET_AT_POS(annotation->word1, DPAA2_ETH_FAS_PTP)) + if (BIT_ISSET_AT_POS(annotation->word1, DPAA2_ETH_FAS_PTP)) { mbuf->ol_flags |= RTE_MBUF_F_RX_IEEE1588_PTP; + mbuf->ol_flags |= RTE_MBUF_F_RX_IEEE1588_TMST; + } #endif if (BIT_ISSET_AT_POS(annotation->word3, L2_VLAN_1_PRESENT)) { @@ -769,7 +771,10 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts) else bufs[num_rx] = eth_fd_to_mbuf(fd, eth_data->port_id); #if defined(RTE_LIBRTE_IEEE1588) - priv->rx_timestamp = *dpaa2_timestamp_dynfield(bufs[num_rx]); + if (bufs[num_rx]->ol_flags & PKT_RX_IEEE1588_TMST) { + priv->rx_timestamp = + *dpaa2_timestamp_dynfield(bufs[num_rx]); + } #endif if (eth_data->dev_conf.rxmode.offloads & @@ -986,6 +991,13 @@ dpaa2_dev_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts) bufs[num_rx] = eth_fd_to_mbuf(fd, eth_data->port_id); +#if defined(RTE_LIBRTE_IEEE1588) + if (bufs[num_rx]->ol_flags & PKT_RX_IEEE1588_TMST) { + priv->rx_timestamp = + *dpaa2_timestamp_dynfield(bufs[num_rx]); + } +#endif + if (eth_data->dev_conf.rxmode.offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP) { rte_vlan_strip(bufs[num_rx]); @@ -1021,6 +1033,8 @@ uint16_t dpaa2_dev_tx_conf(void *queue) struct rte_eth_dev_data *eth_data = dpaa2_q->eth_data; struct dpaa2_dev_priv *priv = eth_data->dev_private; struct dpaa2_annot_hdr *annotation; + void *v_addr; + struct rte_mbuf *mbuf; #endif if (unlikely(!DPAA2_PER_LCORE_DPIO)) { @@ -1105,10 +1119,16 @@ uint16_t dpaa2_dev_tx_conf(void *queue) num_tx_conf++; num_pulled++; #if defined(RTE_LIBRTE_IEEE1588) - annotation = (struct dpaa2_annot_hdr *)((size_t) - DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd)) + - DPAA2_FD_PTA_SIZE); - priv->tx_timestamp = annotation->word2; + v_addr = DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd)); + mbuf = DPAA2_INLINE_MBUF_FROM_BUF(v_addr, + rte_dpaa2_bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size); + + if (mbuf->ol_flags & PKT_TX_IEEE1588_TMST) { + annotation = (struct dpaa2_annot_hdr *)((size_t) + DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd)) + + DPAA2_FD_PTA_SIZE); + priv->tx_timestamp = annotation->word2; + } #endif } while (pending); @@ -1184,8 +1204,11 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts) * corresponding to last packet transmitted for reading * the timestamp */ - priv->next_tx_conf_queue = dpaa2_q->tx_conf_queue; - dpaa2_dev_tx_conf(dpaa2_q->tx_conf_queue); + if ((*bufs)->ol_flags & PKT_TX_IEEE1588_TMST) { + priv->next_tx_conf_queue = dpaa2_q->tx_conf_queue; + dpaa2_dev_tx_conf(dpaa2_q->tx_conf_queue); + priv->tx_timestamp = 0; + } #endif /*Prepare enqueue descriptor*/ -- 2.17.1