From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D9594A034C; Tue, 18 Jan 2022 14:24:52 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3B75A4271D; Tue, 18 Jan 2022 14:24:52 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 007E34068E for ; Tue, 18 Jan 2022 14:24:50 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 20IBAuMU018843; Tue, 18 Jan 2022 05:24:48 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=RTyA6kY5YV2x4TdcfAch/2LGRy6Nj6zvB49Sm2TTipM=; b=SpXQSOWN8wMXZhBsXpssEuiHIuQqCq09PTP5+qKdQZ6dKvgrkR+tggeZnpX7koMLkLzM XBDRpppvz9IAOAq4BFF2zqoeiBhmCC0aDrJuctuHWJc8N/gaFqLnBnktL6awM0y4vxVg rfjBagcHRhr3PJqt0EftcfUzTWYTsbC0Q5Qiw9r8phhB68mx+KTPIHcPGtz/fXA4NrvH b3eY2FJcgkESIIjO5zIMS/cH+V6rBgticcR1QIeUu7fvakomqLHfob+XkGliaOXNmdAa jF9y1WeAiQh3x8VdzfBxZdYL9tDLoazKV+KVKZeq8+hTChpe9loNJOWXE3l2HgBGykbq JQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3dnvea0c09-6 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Tue, 18 Jan 2022 05:24:48 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Tue, 18 Jan 2022 05:24:28 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 18 Jan 2022 05:24:28 -0800 Received: from localhost.localdomain (unknown [10.28.34.39]) by maili.marvell.com (Postfix) with ESMTP id CC1AB3F705D; Tue, 18 Jan 2022 05:24:26 -0800 (PST) From: Tomasz Duszynski To: CC: , , Tomasz Duszynski Subject: [PATCH v5 00/11] Add cnxk_gpio Date: Tue, 18 Jan 2022 14:24:13 +0100 Message-ID: <20220118132424.2573372-1-tduszynski@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220105140020.1615256-1-tduszynski@marvell.com> References: <20220105140020.1615256-1-tduszynski@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: IzbEmVx9iXxFgupTC0-kabXe9wfP2iSx X-Proofpoint-GUID: IzbEmVx9iXxFgupTC0-kabXe9wfP2iSx X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-01-18_03,2022-01-18_01,2021-12-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This series introduces a new rawdevice PMD which allows to manage userspace GPIOs and install custom GPIO interrupt handlers which bypass kernel. This is especially useful for applications that, besides providing standard dataplane functionality, want to have fast and low latency access to GPIO pin state. It'd be great to have that merged during 22.03 merge window. v5: - added close callback to make sure PMD resources are freed properly - updated selftest to return early on error - doc fixes v4: - free kvargs after parsing arguments - add support for allowing only subset of available GPIOs v3: - fix meson formatting - fix cnxk_gpio_process_buf() return value v2: - do not trigger irq by writing to /dev/mem, use ioctl() instead Tomasz Duszynski (11): raw/cnxk_gpio: add GPIO driver skeleton raw/cnxk_gpio: support reading default queue conf raw/cnxk_gpio: support reading queue count raw/cnxk_gpio: support queue setup raw/cnxk_gpio: support queue release raw/cnxk_gpio: support enqueuing buffers raw/cnxk_gpio: support dequeuing buffers raw/cnxk_gpio: support standard GPIO operations raw/cnxk_gpio: support custom irq handlers raw/cnxk_gpio: support selftest raw/cnxk_gpio: add option to allow using subset of GPIOs doc/guides/platform/cnxk.rst | 2 + doc/guides/rawdevs/cnxk_gpio.rst | 200 ++++++ doc/guides/rawdevs/index.rst | 1 + doc/guides/rel_notes/release_22_03.rst | 9 + drivers/raw/cnxk_gpio/cnxk_gpio.c | 763 +++++++++++++++++++++ drivers/raw/cnxk_gpio/cnxk_gpio.h | 35 + drivers/raw/cnxk_gpio/cnxk_gpio_irq.c | 216 ++++++ drivers/raw/cnxk_gpio/cnxk_gpio_selftest.c | 393 +++++++++++ drivers/raw/cnxk_gpio/meson.build | 11 + drivers/raw/cnxk_gpio/rte_pmd_cnxk_gpio.h | 437 ++++++++++++ drivers/raw/cnxk_gpio/version.map | 3 + drivers/raw/meson.build | 1 + 12 files changed, 2071 insertions(+) create mode 100644 doc/guides/rawdevs/cnxk_gpio.rst create mode 100644 drivers/raw/cnxk_gpio/cnxk_gpio.c create mode 100644 drivers/raw/cnxk_gpio/cnxk_gpio.h create mode 100644 drivers/raw/cnxk_gpio/cnxk_gpio_irq.c create mode 100644 drivers/raw/cnxk_gpio/cnxk_gpio_selftest.c create mode 100644 drivers/raw/cnxk_gpio/meson.build create mode 100644 drivers/raw/cnxk_gpio/rte_pmd_cnxk_gpio.h create mode 100644 drivers/raw/cnxk_gpio/version.map -- 2.25.1