From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4E978A034C; Tue, 18 Jan 2022 14:25:41 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 48B4B42789; Tue, 18 Jan 2022 14:25:05 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 4CD6842725 for ; Tue, 18 Jan 2022 14:25:02 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 20IB9uC2012185; Tue, 18 Jan 2022 05:25:01 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=I6ED1RK8dhQ6wyTBEtmW6DwsekwPa+Zr0oicem6k43M=; b=d5NS9L7byDvvPI5qB0u6hgcspBeRpR4G4dhjrTI+b2AnyykZPPwTRjH3zo5fhSvYScge kzs4jV6N6lcoajVJrEstvZzP95MtMawOkM+S23gKBM/S1/sB5dQreTHVu7nDhDwFDg+o 0WxZ14eQVB722T7drAjNZicOjarI9l+RrcMNFC+vLtf24iZp3mbFe6ddc5kJQH4CInrq RphjCogrpHoEjh6AXlwqES2oqOEbD+Q1//u/3BtUnhlrVfxcm6FKxck26weg5CV8wsQD gOiTQNcfmjeElKtTPTEHNvcIfgNvUoaSUsKf+q/WI5vVISyMdMJ0mpNi/giaHle2FCxW CA== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3dnvea0c0k-16 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Tue, 18 Jan 2022 05:25:01 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 18 Jan 2022 05:24:39 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Tue, 18 Jan 2022 05:24:39 -0800 Received: from localhost.localdomain (unknown [10.28.34.39]) by maili.marvell.com (Postfix) with ESMTP id C6C513F705F; Tue, 18 Jan 2022 05:24:37 -0800 (PST) From: Tomasz Duszynski To: CC: , , Tomasz Duszynski Subject: [PATCH v5 05/11] raw/cnxk_gpio: support queue release Date: Tue, 18 Jan 2022 14:24:18 +0100 Message-ID: <20220118132424.2573372-6-tduszynski@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220118132424.2573372-1-tduszynski@marvell.com> References: <20220105140020.1615256-1-tduszynski@marvell.com> <20220118132424.2573372-1-tduszynski@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: hpMgkwLR4yyyU0BnRnM5Mh3HspYZqoHh X-Proofpoint-GUID: hpMgkwLR4yyyU0BnRnM5Mh3HspYZqoHh X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-01-18_03,2022-01-18_01,2021-12-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add support for queue release. Signed-off-by: Tomasz Duszynski --- drivers/raw/cnxk_gpio/cnxk_gpio.c | 34 +++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/drivers/raw/cnxk_gpio/cnxk_gpio.c b/drivers/raw/cnxk_gpio/cnxk_gpio.c index 9baa43187e..ec82a55918 100644 --- a/drivers/raw/cnxk_gpio/cnxk_gpio.c +++ b/drivers/raw/cnxk_gpio/cnxk_gpio.c @@ -217,6 +217,29 @@ cnxk_gpio_queue_setup(struct rte_rawdev *dev, uint16_t queue_id, return 0; } +static int +cnxk_gpio_queue_release(struct rte_rawdev *dev, uint16_t queue_id) +{ + struct cnxk_gpiochip *gpiochip = dev->dev_private; + char buf[CNXK_GPIO_BUFSZ]; + struct cnxk_gpio *gpio; + int ret; + + gpio = cnxk_gpio_lookup(gpiochip, queue_id); + if (!gpio) + return -ENODEV; + + snprintf(buf, sizeof(buf), "%s/unexport", CNXK_GPIO_CLASS_PATH); + ret = cnxk_gpio_write_attr_int(buf, gpiochip->base + queue_id); + if (ret) + return ret; + + gpiochip->gpios[queue_id] = NULL; + rte_free(gpio); + + return 0; +} + static int cnxk_gpio_queue_def_conf(struct rte_rawdev *dev, uint16_t queue_id, rte_rawdev_obj_t queue_conf, size_t queue_conf_size) @@ -256,6 +279,7 @@ static const struct rte_rawdev_ops cnxk_gpio_rawdev_ops = { .queue_def_conf = cnxk_gpio_queue_def_conf, .queue_count = cnxk_gpio_queue_count, .queue_setup = cnxk_gpio_queue_setup, + .queue_release = cnxk_gpio_queue_release, }; static int @@ -329,6 +353,8 @@ cnxk_gpio_remove(struct rte_vdev_device *dev) char name[RTE_RAWDEV_NAME_MAX_LEN]; struct cnxk_gpiochip *gpiochip; struct rte_rawdev *rawdev; + struct cnxk_gpio *gpio; + int i; RTE_SET_USED(dev); @@ -341,6 +367,14 @@ cnxk_gpio_remove(struct rte_vdev_device *dev) return -ENODEV; gpiochip = rawdev->dev_private; + for (i = 0; i < gpiochip->num_gpios; i++) { + gpio = gpiochip->gpios[i]; + if (!gpio) + continue; + + cnxk_gpio_queue_release(rawdev, gpio->num); + } + rte_free(gpiochip->gpios); rte_rawdev_pmd_release(rawdev); -- 2.25.1