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From: Rahul Bhansali <rbhansali@marvell.com>
To: <dev@dpdk.org>, Nithin Dabilpuram <ndabilpuram@marvell.com>,
	Kiran Kumar K <kirankumark@marvell.com>,
	Sunil Kumar Kori <skori@marvell.com>,
	Satha Rao <skoteshwar@marvell.com>
Cc: <jerinj@marvell.com>, Rahul Bhansali <rbhansali@marvell.com>
Subject: [PATCH v2 2/2] net/cnxk: ethdev Rx/Tx queue status callbacks
Date: Wed, 19 Jan 2022 15:13:27 +0530	[thread overview]
Message-ID: <20220119094327.1488398-2-rbhansali@marvell.com> (raw)
In-Reply-To: <20220119094327.1488398-1-rbhansali@marvell.com>

Provides ethdev callback support of rx_queue_count,
rx_descriptor_status and tx_descriptor_status.

Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
---
v2 changes:
 - Updated doc/guides/nics/features/cnxk* for
   "Rx descriptor status" and "Tx descriptor status"

 doc/guides/nics/features/cnxk.ini     |  2 +
 doc/guides/nics/features/cnxk_vec.ini |  2 +
 doc/guides/nics/features/cnxk_vf.ini  |  2 +
 drivers/net/cnxk/cnxk_ethdev.c        |  3 ++
 drivers/net/cnxk/cnxk_ethdev.h        |  5 +++
 drivers/net/cnxk/cnxk_ethdev_ops.c    | 60 +++++++++++++++++++++++++++
 6 files changed, 74 insertions(+)

diff --git a/doc/guides/nics/features/cnxk.ini b/doc/guides/nics/features/cnxk.ini
index 1623a1803e..0eba334eb4 100644
--- a/doc/guides/nics/features/cnxk.ini
+++ b/doc/guides/nics/features/cnxk.ini
@@ -37,6 +37,8 @@ Inner L4 checksum    = Y
 Packet type parsing  = Y
 Timesync             = Y
 Timestamp offload    = Y
+Rx descriptor status = Y
+Tx descriptor status = Y
 Basic stats          = Y
 Stats per queue      = Y
 Extended stats       = Y
diff --git a/doc/guides/nics/features/cnxk_vec.ini b/doc/guides/nics/features/cnxk_vec.ini
index 4b7c2bce4d..df5f358a3e 100644
--- a/doc/guides/nics/features/cnxk_vec.ini
+++ b/doc/guides/nics/features/cnxk_vec.ini
@@ -33,6 +33,8 @@ L4 checksum offload  = Y
 Inner L3 checksum    = Y
 Inner L4 checksum    = Y
 Packet type parsing  = Y
+Rx descriptor status = Y
+Tx descriptor status = Y
 Basic stats          = Y
 Stats per queue      = Y
 Extended stats       = Y
diff --git a/doc/guides/nics/features/cnxk_vf.ini b/doc/guides/nics/features/cnxk_vf.ini
index 0523be434d..a78fbcada0 100644
--- a/doc/guides/nics/features/cnxk_vf.ini
+++ b/doc/guides/nics/features/cnxk_vf.ini
@@ -29,6 +29,8 @@ L4 checksum offload  = Y
 Inner L3 checksum    = Y
 Inner L4 checksum    = Y
 Packet type parsing  = Y
+Rx descriptor status = Y
+Tx descriptor status = Y
 Basic stats          = Y
 Stats per queue      = Y
 Extended stats       = Y
diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c
index 74f625553d..183fd241d8 100644
--- a/drivers/net/cnxk/cnxk_ethdev.c
+++ b/drivers/net/cnxk/cnxk_ethdev.c
@@ -1595,6 +1595,9 @@ cnxk_eth_dev_init(struct rte_eth_dev *eth_dev)
 	int rc, max_entries;

 	eth_dev->dev_ops = &cnxk_eth_dev_ops;
+	eth_dev->rx_queue_count = cnxk_nix_rx_queue_count;
+	eth_dev->rx_descriptor_status = cnxk_nix_rx_descriptor_status;
+	eth_dev->tx_descriptor_status = cnxk_nix_tx_descriptor_status;

 	/* Alloc security context */
 	sec_ctx = plt_zmalloc(sizeof(struct rte_security_ctx), 0);
diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h
index 5bfda3d815..43814a81fc 100644
--- a/drivers/net/cnxk/cnxk_ethdev.h
+++ b/drivers/net/cnxk/cnxk_ethdev.h
@@ -559,6 +559,11 @@ void cnxk_nix_rxq_info_get(struct rte_eth_dev *eth_dev, uint16_t qid,
 void cnxk_nix_txq_info_get(struct rte_eth_dev *eth_dev, uint16_t qid,
 			   struct rte_eth_txq_info *qinfo);

+/* Queue status */
+int cnxk_nix_rx_descriptor_status(void *rxq, uint16_t offset);
+int cnxk_nix_tx_descriptor_status(void *txq, uint16_t offset);
+uint32_t cnxk_nix_rx_queue_count(void *rxq);
+
 /* Lookup configuration */
 const uint32_t *cnxk_nix_supported_ptypes_get(struct rte_eth_dev *eth_dev);
 void *cnxk_nix_fastpath_lookup_mem_get(void);
diff --git a/drivers/net/cnxk/cnxk_ethdev_ops.c b/drivers/net/cnxk/cnxk_ethdev_ops.c
index 34e4809650..f20f201db2 100644
--- a/drivers/net/cnxk/cnxk_ethdev_ops.c
+++ b/drivers/net/cnxk/cnxk_ethdev_ops.c
@@ -695,6 +695,66 @@ cnxk_nix_txq_info_get(struct rte_eth_dev *eth_dev, uint16_t qid,
 	memcpy(&qinfo->conf, &txq_sp->qconf.conf.tx, sizeof(qinfo->conf));
 }

+uint32_t
+cnxk_nix_rx_queue_count(void *rxq)
+{
+	struct cnxk_eth_rxq_sp *rxq_sp = cnxk_eth_rxq_to_sp(rxq);
+	struct roc_nix *nix = &rxq_sp->dev->nix;
+	uint32_t head, tail;
+
+	roc_nix_cq_head_tail_get(nix, rxq_sp->qid, &head, &tail);
+	return (tail - head) % (rxq_sp->qconf.nb_desc);
+}
+
+static inline int
+nix_offset_has_packet(uint32_t head, uint32_t tail, uint16_t offset, bool is_rx)
+{
+	/* Check given offset(queue index) has packet filled/xmit by HW
+	 * in case of Rx or Tx.
+	 * Also, checks for wrap around case.
+	 */
+	return ((tail > head && offset <= tail && offset >= head) ||
+		(head > tail && (offset >= head || offset <= tail))) ?
+		       is_rx :
+		       !is_rx;
+}
+
+int
+cnxk_nix_rx_descriptor_status(void *rxq, uint16_t offset)
+{
+	struct cnxk_eth_rxq_sp *rxq_sp = cnxk_eth_rxq_to_sp(rxq);
+	struct roc_nix *nix = &rxq_sp->dev->nix;
+	uint32_t head, tail;
+
+	if (rxq_sp->qconf.nb_desc <= offset)
+		return -EINVAL;
+
+	roc_nix_cq_head_tail_get(nix, rxq_sp->qid, &head, &tail);
+
+	if (nix_offset_has_packet(head, tail, offset, 1))
+		return RTE_ETH_RX_DESC_DONE;
+	else
+		return RTE_ETH_RX_DESC_AVAIL;
+}
+
+int
+cnxk_nix_tx_descriptor_status(void *txq, uint16_t offset)
+{
+	struct cnxk_eth_txq_sp *txq_sp = cnxk_eth_txq_to_sp(txq);
+	struct roc_nix *nix = &txq_sp->dev->nix;
+	uint32_t head = 0, tail = 0;
+
+	if (txq_sp->qconf.nb_desc <= offset)
+		return -EINVAL;
+
+	roc_nix_sq_head_tail_get(nix, txq_sp->qid, &head, &tail);
+
+	if (nix_offset_has_packet(head, tail, offset, 0))
+		return RTE_ETH_TX_DESC_DONE;
+	else
+		return RTE_ETH_TX_DESC_FULL;
+}
+
 /* It is a NOP for cnxk as HW frees the buffer on xmit */
 int
 cnxk_nix_tx_done_cleanup(void *txq, uint32_t free_cnt)
--
2.25.1


  reply	other threads:[~2022-01-19  9:43 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-19  9:43 [PATCH v2 1/2] common/cnxk: get head-tail of Rx and Tx queues Rahul Bhansali
2022-01-19  9:43 ` Rahul Bhansali [this message]
2022-01-19 10:54 ` Ray Kinsella
2022-01-20  6:39 ` Jerin Jacob

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