DPDK patches and discussions
 help / color / mirror / Atom feed
From: Nithin Dabilpuram <ndabilpuram@marvell.com>
To: <jerinj@marvell.com>, Nithin Dabilpuram <ndabilpuram@marvell.com>,
	"Kiran Kumar K" <kirankumark@marvell.com>,
	Sunil Kumar Kori <skori@marvell.com>,
	Satha Rao <skoteshwar@marvell.com>
Cc: <dev@dpdk.org>, <ferruh.yigit@intel.com>, <stable@dpdk.org>
Subject: [PATCH v2 01/10] common/cnxk: fix shift offset for TL3 length disable
Date: Fri, 21 Jan 2022 17:34:15 +0530	[thread overview]
Message-ID: <20220121120424.28166-1-ndabilpuram@marvell.com> (raw)
In-Reply-To: <20211209091342.27017-1-ndabilpuram@marvell.com>

Fix shift offset for length disable flag in NIXX_AF_TL3X_SHAPE
register to be 24 instead of zero similar to other level SHAPE
registers. Also mask unused bits in adjust value.

Fixes: 0885429c3028 ("common/cnxk: add NIX TM hierarchy enable/disable")
Cc: stable@dpdk.org

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Satha Rao <skoteshwar@marvell.com>
---

v2:
- Updated series from Jerin
- Handle comments from Ferruh in patch 3/8.
- Split patch 6/8 to two patches 
- Split patch 7/8 to two patches

 drivers/common/cnxk/roc_nix_tm_utils.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/common/cnxk/roc_nix_tm_utils.c b/drivers/common/cnxk/roc_nix_tm_utils.c
index 543adf9..9e80c2a 100644
--- a/drivers/common/cnxk/roc_nix_tm_utils.c
+++ b/drivers/common/cnxk/roc_nix_tm_utils.c
@@ -642,6 +642,7 @@ nix_tm_shaper_reg_prep(struct nix_tm_node *node,
 	else if (profile)
 		adjust = profile->pkt_len_adj;
 
+	adjust &= 0x1FF;
 	plt_tm_dbg("Shaper config node %s(%u) lvl %u id %u, "
 		   "pir %" PRIu64 "(%" PRIu64 "B),"
 		   " cir %" PRIu64 "(%" PRIu64 "B)"
@@ -708,7 +709,7 @@ nix_tm_shaper_reg_prep(struct nix_tm_node *node,
 		/* Configure RED algo */
 		reg[k] = NIX_AF_TL3X_SHAPE(schq);
 		regval[k] = (adjust | (uint64_t)node->red_algo << 9 |
-			     (uint64_t)node->pkt_mode);
+			     (uint64_t)node->pkt_mode << 24);
 		k++;
 
 		break;
-- 
2.8.4


  parent reply	other threads:[~2022-01-21 12:04 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-09  9:13 [PATCH 1/8] common/cnxk: fix shift offset for tl3 " Nithin Dabilpuram
2021-12-09  9:13 ` [PATCH 2/8] common/cnxk: use for loop in shaper profiles cleanup Nithin Dabilpuram
2022-01-19 16:20   ` Jerin Jacob
2021-12-09  9:13 ` [PATCH 3/8] common/cnxk: change order of frag sizes and infos Nithin Dabilpuram
2022-01-19 16:25   ` Jerin Jacob
2022-01-21 10:03   ` Ferruh Yigit
2021-12-09  9:13 ` [PATCH 4/8] common/cnxk: reset stale values on error debug registers Nithin Dabilpuram
2022-01-19 16:25   ` Jerin Jacob
2021-12-09  9:13 ` [PATCH 5/8] common/cnxk: always use single qint with NIX Nithin Dabilpuram
2022-01-19 16:28   ` Jerin Jacob
2021-12-09  9:13 ` [PATCH 6/8] common/cnxk: handle issues from static analysis Nithin Dabilpuram
2022-01-19 16:44   ` Jerin Jacob
2022-01-21 10:05   ` Ferruh Yigit
2021-12-09  9:13 ` [PATCH 7/8] net/cnxk: improve inbound inline error handling for cn9k Nithin Dabilpuram
2022-01-21 10:06   ` Ferruh Yigit
2021-12-09  9:13 ` [PATCH 8/8] net/cnxk: synchronize inline session create and destroy Nithin Dabilpuram
2022-01-19 16:45   ` Jerin Jacob
2022-01-19 16:15 ` [PATCH 1/8] common/cnxk: fix shift offset for tl3 length disable Jerin Jacob
2022-01-21 10:08   ` Ferruh Yigit
2022-01-21 10:24     ` Nithin Kumar Dabilpuram
2022-01-21 12:04 ` Nithin Dabilpuram [this message]
2022-01-21 12:04   ` [PATCH v2 02/10] common/cnxk: use for loop in shaper profiles cleanup Nithin Dabilpuram
2022-01-21 12:04   ` [PATCH v2 03/10] common/cnxk: fix byte order of frag sizes and infos Nithin Dabilpuram
2022-01-21 12:04   ` [PATCH v2 04/10] common/cnxk: reset stale values on error debug registers Nithin Dabilpuram
2022-01-21 12:04   ` [PATCH v2 05/10] common/cnxk: always use single interrupt ID with NIX Nithin Dabilpuram
2022-01-21 17:16     ` Kevin Traynor
2022-01-23  7:45       ` Jerin Jacob
2022-01-21 12:04   ` [PATCH v2 06/10] common/cnxk: fix null pointer dereferences Nithin Dabilpuram
2022-01-21 12:04   ` [PATCH v2 07/10] common/cnxk: fix uninitialized variable issues Nithin Dabilpuram
2022-01-21 12:04   ` [PATCH v2 08/10] net/cnxk: improve inbound inline error handling for cn9k Nithin Dabilpuram
2022-01-21 12:04   ` [PATCH v2 09/10] common/cnxk: set UDP ports for IPsec UDP encapsulation Nithin Dabilpuram
2022-01-21 12:04   ` [PATCH v2 10/10] net/cnxk: synchronize inline session create and destroy Nithin Dabilpuram

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220121120424.28166-1-ndabilpuram@marvell.com \
    --to=ndabilpuram@marvell.com \
    --cc=dev@dpdk.org \
    --cc=ferruh.yigit@intel.com \
    --cc=jerinj@marvell.com \
    --cc=kirankumark@marvell.com \
    --cc=skori@marvell.com \
    --cc=skoteshwar@marvell.com \
    --cc=stable@dpdk.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).