From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 09B8DA0353; Fri, 21 Jan 2022 13:04:55 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D3A7B42768; Fri, 21 Jan 2022 13:04:50 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 86E1F40042; Fri, 21 Jan 2022 13:04:48 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 20LAUpWM015267; Fri, 21 Jan 2022 04:04:47 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=0L85kDRDMMWoh00NVsZspx9FgJPkI284vWUNVEPPaOA=; b=Ybr5lb/sSFO3h5NvG4s73D7sQ7SC8NDx23xDoxU15qHSD14DkrJHNNPddrkmviQnSV4a wUsycOC6WbZ9PSuJB9R5mKhhE0VXZqnJTHdDGgcidBLr5Ex+bm0oRnDg2GRSMTg4b++Y CMhXsc6JzC45Cxf9F4GMxJkfqsU749ZmjeYXD1bUs5rdIifzt8ir00CauXkA7I09y+07 TVS3N6zluRApIbZXETcjIhK3eVLTQxhPGx54CD3EBSp05hDmrG5fnOJsM5Zpeg+5BjAK R6iIF87y5EmN2ic3iTEFHqY3+pGrgX7xZmsx752WCwFvbc1F2QAjmtI139nMy4d1xDFD fA== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3dqhytsw7a-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Fri, 21 Jan 2022 04:04:47 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 21 Jan 2022 04:04:43 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Fri, 21 Jan 2022 04:04:43 -0800 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id C20F03F7097; Fri, 21 Jan 2022 04:04:40 -0800 (PST) From: Nithin Dabilpuram To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao CC: , , , "Vidya Sagar Velumuri" Subject: [PATCH v2 03/10] common/cnxk: fix byte order of frag sizes and infos Date: Fri, 21 Jan 2022 17:34:17 +0530 Message-ID: <20220121120424.28166-3-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20220121120424.28166-1-ndabilpuram@marvell.com> References: <20211209091342.27017-1-ndabilpuram@marvell.com> <20220121120424.28166-1-ndabilpuram@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-ORIG-GUID: h9P24qGElTlVP_1lRj7QuQMU8cg8Vq7Q X-Proofpoint-GUID: h9P24qGElTlVP_1lRj7QuQMU8cg8Vq7Q X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-01-21_06,2022-01-21_01,2021-12-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Change the byte order of frag sizes and infos to match HW implementation. Fixes: 64a73ebd87bd ("common/cnxk: add CPT hardware definitions") Cc: stable@dpdk.org Signed-off-by: Nithin Dabilpuram Signed-off-by: Vidya Sagar Velumuri --- drivers/common/cnxk/hw/cpt.h | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/common/cnxk/hw/cpt.h b/drivers/common/cnxk/hw/cpt.h index 919f842..3ade4dc 100644 --- a/drivers/common/cnxk/hw/cpt.h +++ b/drivers/common/cnxk/hw/cpt.h @@ -286,10 +286,11 @@ struct cpt_frag_info_s { union { uint64_t u64; struct { - union cpt_frag_info f3; - union cpt_frag_info f2; - union cpt_frag_info f1; + /* CPT HW swaps each 8B word implicitly */ union cpt_frag_info f0; + union cpt_frag_info f1; + union cpt_frag_info f2; + union cpt_frag_info f3; }; } w0; @@ -297,10 +298,11 @@ struct cpt_frag_info_s { union { uint64_t u64; struct { - uint16_t frag_size3; - uint16_t frag_size2; - uint16_t frag_size1; + /* CPT HW swaps each 8B word implicitly */ uint16_t frag_size0; + uint16_t frag_size1; + uint16_t frag_size2; + uint16_t frag_size3; }; } w1; }; -- 2.8.4