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From: Jiawen Wu <jiawenwu@trustnetic.com>
To: dev@dpdk.org
Cc: Jiawen Wu <jiawenwu@trustnetic.com>
Subject: [PATCH 5/9] net/ngbe: optimize the PHY initialization process
Date: Tue,  8 Feb 2022 18:11:25 +0800	[thread overview]
Message-ID: <20220208101129.69173-6-jiawenwu@trustnetic.com> (raw)
In-Reply-To: <20220208101129.69173-1-jiawenwu@trustnetic.com>

Reduce the probability of PHY init failure, And add its error return.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
 drivers/net/ngbe/base/ngbe_hw.c      |  7 ++---
 drivers/net/ngbe/base/ngbe_phy_rtl.c | 40 +++++++++++++---------------
 drivers/net/ngbe/ngbe_ethdev.c       |  6 ++++-
 3 files changed, 28 insertions(+), 25 deletions(-)

diff --git a/drivers/net/ngbe/base/ngbe_hw.c b/drivers/net/ngbe/base/ngbe_hw.c
index 782fd71d29..72d475ccf9 100644
--- a/drivers/net/ngbe/base/ngbe_hw.c
+++ b/drivers/net/ngbe/base/ngbe_hw.c
@@ -1145,6 +1145,7 @@ s32 ngbe_set_pcie_master(struct ngbe_hw *hw, bool enable)
 s32 ngbe_acquire_swfw_sync(struct ngbe_hw *hw, u32 mask)
 {
 	u32 mngsem = 0;
+	u32 fwsm = 0;
 	u32 swmask = NGBE_MNGSEM_SW(mask);
 	u32 fwmask = NGBE_MNGSEM_FW(mask);
 	u32 timeout = 200;
@@ -1173,9 +1174,9 @@ s32 ngbe_acquire_swfw_sync(struct ngbe_hw *hw, u32 mask)
 		}
 	}
 
-	/* If time expired clear the bits holding the lock and retry */
-	if (mngsem & (fwmask | swmask))
-		ngbe_release_swfw_sync(hw, mngsem & (fwmask | swmask));
+	fwsm = rd32(hw, NGBE_MNGFWSYNC);
+	DEBUGOUT("SWFW semaphore not granted: MNG_SWFW_SYNC = 0x%x, MNG_FW_SM = 0x%x\n",
+			mngsem, fwsm);
 
 	msec_delay(5);
 	return NGBE_ERR_SWFW_SYNC;
diff --git a/drivers/net/ngbe/base/ngbe_phy_rtl.c b/drivers/net/ngbe/base/ngbe_phy_rtl.c
index 7b08b7a46c..c59efe3153 100644
--- a/drivers/net/ngbe/base/ngbe_phy_rtl.c
+++ b/drivers/net/ngbe/base/ngbe_phy_rtl.c
@@ -4,8 +4,6 @@
 
 #include "ngbe_phy_rtl.h"
 
-#define RTL_PHY_RST_WAIT_PERIOD               5
-
 s32 ngbe_read_phy_reg_rtl(struct ngbe_hw *hw,
 		u32 reg_addr, u32 device_type, u16 *phy_data)
 {
@@ -61,34 +59,44 @@ s32 ngbe_init_phy_rtl(struct ngbe_hw *hw)
 		return NGBE_ERR_PHY_TIMEOUT;
 	}
 
-	for (i = 0; i < 1000; i++) {
-		hw->phy.read_reg(hw, RTL_INSR, 0xa43, &value);
-		if (value & RTL_INSR_ACCESS)
-			break;
+	hw->phy.write_reg(hw, RTL_SCR, 0xa46, RTL_SCR_EFUSE);
+	hw->phy.read_reg(hw, RTL_SCR, 0xa46, &value);
+	if (!(value & RTL_SCR_EFUSE)) {
+		DEBUGOUT("Write EFUSE failed.\n");
+		return NGBE_ERR_PHY_TIMEOUT;
 	}
 
-	hw->phy.write_reg(hw, RTL_SCR, 0xa46, RTL_SCR_EFUSE);
 	for (i = 0; i < 1000; i++) {
 		hw->phy.read_reg(hw, RTL_INSR, 0xa43, &value);
 		if (value & RTL_INSR_ACCESS)
 			break;
+		msec_delay(1);
 	}
 	if (i == 1000)
-		return NGBE_ERR_PHY_TIMEOUT;
+		DEBUGOUT("PHY wait mdio 1 access timeout.\n");
+
 
 	hw->phy.write_reg(hw, RTL_SCR, 0xa46, RTL_SCR_EXTINI);
+	hw->phy.read_reg(hw, RTL_SCR, 0xa46, &value);
+	if (!(value & RTL_SCR_EXTINI)) {
+		DEBUGOUT("Write EXIINI failed.\n");
+		return NGBE_ERR_PHY_TIMEOUT;
+	}
+
 	for (i = 0; i < 1000; i++) {
 		hw->phy.read_reg(hw, RTL_INSR, 0xa43, &value);
 		if (value & RTL_INSR_ACCESS)
 			break;
+		msec_delay(1);
 	}
 	if (i == 1000)
-		return NGBE_ERR_PHY_TIMEOUT;
+		DEBUGOUT("PHY wait mdio 2 access timeout.\n");
 
 	for (i = 0; i < 1000; i++) {
 		hw->phy.read_reg(hw, RTL_GSR, 0xa42, &value);
 		if ((value & RTL_GSR_ST) == RTL_GSR_ST_LANON)
 			break;
+		msec_delay(1);
 	}
 	if (i == 1000)
 		return NGBE_ERR_PHY_TIMEOUT;
@@ -226,7 +234,7 @@ s32 ngbe_setup_phy_link_rtl(struct ngbe_hw *hw,
 
 s32 ngbe_reset_phy_rtl(struct ngbe_hw *hw)
 {
-	u16 value = 0, i;
+	u16 value = 0;
 	s32 status = 0;
 
 	DEBUGFUNC("ngbe_reset_phy_rtl");
@@ -234,17 +242,7 @@ s32 ngbe_reset_phy_rtl(struct ngbe_hw *hw)
 	value |= RTL_BMCR_RESET;
 	status = hw->phy.write_reg(hw, RTL_BMCR, RTL_DEV_ZERO, value);
 
-	for (i = 0; i < RTL_PHY_RST_WAIT_PERIOD; i++) {
-		status = hw->phy.read_reg(hw, RTL_BMCR, RTL_DEV_ZERO, &value);
-		if (!(value & RTL_BMCR_RESET))
-			break;
-		msleep(1);
-	}
-
-	if (i == RTL_PHY_RST_WAIT_PERIOD) {
-		DEBUGOUT("PHY reset polling failed to complete.\n");
-		return NGBE_ERR_RESET_FAILED;
-	}
+	msec_delay(5);
 
 	return status;
 }
diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c
index 30c9e68579..cc530fdced 100644
--- a/drivers/net/ngbe/ngbe_ethdev.c
+++ b/drivers/net/ngbe/ngbe_ethdev.c
@@ -1058,7 +1058,11 @@ ngbe_dev_start(struct rte_eth_dev *dev)
 			speed |= NGBE_LINK_SPEED_10M_FULL;
 	}
 
-	hw->phy.init_hw(hw);
+	err = hw->phy.init_hw(hw);
+	if (err != 0) {
+		PMD_INIT_LOG(ERR, "PHY init failed");
+		goto error;
+	}
 	err = hw->mac.setup_link(hw, speed, link_up);
 	if (err != 0)
 		goto error;
-- 
2.21.0.windows.1




  parent reply	other threads:[~2022-02-08 10:05 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-08 10:11 [PATCH 0/9] Wangxun fixes and supports Jiawen Wu
2022-02-08 10:11 ` [PATCH 1/9] net/ngbe: fix failed to receive packets Jiawen Wu
2022-02-08 10:11 ` [PATCH 2/9] net/ngbe: fix link interrupt sometimes lost Jiawen Wu
2022-02-08 10:11 ` [PATCH 3/9] net/ngbe: fix Tx pending Jiawen Wu
2022-02-08 17:38   ` Ferruh Yigit
2022-02-08 10:11 ` [PATCH 4/9] net/ngbe: fix RxTx packet statistics Jiawen Wu
2022-02-08 17:38   ` Ferruh Yigit
2022-02-08 10:11 ` Jiawen Wu [this message]
2022-02-08 17:39   ` [PATCH 5/9] net/ngbe: optimize the PHY initialization process Ferruh Yigit
2022-02-09  2:38     ` Jiawen Wu
2022-02-08 10:11 ` [PATCH 6/9] net/ngbe: add support to custom PHY interfaces Jiawen Wu
2022-02-08 17:41   ` Ferruh Yigit
2022-02-09  6:17     ` Jiawen Wu
2022-02-08 10:11 ` [PATCH 7/9] net: add LED OEM support for wangxun devices Jiawen Wu
2022-02-08 17:41   ` Ferruh Yigit
2022-02-08 10:11 ` [PATCH 8/9] net/txgbe: fix to set link up and down Jiawen Wu
2022-02-08 10:11 ` [PATCH 9/9] net/txgbe: fix KR auto-negotiation Jiawen Wu

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