From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6F970A00C5; Fri, 11 Feb 2022 16:11:20 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0BAA941144; Fri, 11 Feb 2022 16:11:20 +0100 (CET) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mails.dpdk.org (Postfix) with ESMTP id B874F410E5 for ; Fri, 11 Feb 2022 16:11:17 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1644592277; x=1676128277; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=d8Q/9Mio7SJO+7YfrVFSpn2CN+bbCIWityx62lJVALU=; b=foDkvUeyIeA0/3TduNHmjQ3CxiKLtmGNzN+MQ1+7bkshFaas4BxpUEqi dZ2C5+Ywug60cSIrSidp0aOg6qzbNkV/c8524nu4sPsk7I/wQhKYFUlJb yWvszNb82sEmVmUNcze1KF3aMzoliqtVDi9JcpbRrob60aj8C5ONMiMmF j0XdORUfaY281QvOLxwSLQBIW0eqKE30HrCl0AEh5Dtq+Wvab5JKIINRy sCiA4BAkyA29kJ2zATTIXgGrheYvWu9sj1jobxvSF80CPxt5vFTnN3G1Q yLgMgU1pMbRMR4pT1pepQYytgV5rS77iJg+ecjqLVD8jIOjH7q9FXdRa+ Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10254"; a="249954378" X-IronPort-AV: E=Sophos;i="5.88,361,1635231600"; d="scan'208";a="249954378" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Feb 2022 07:11:16 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,361,1635231600"; d="scan'208";a="537667589" Received: from silpixa00400573.ir.intel.com (HELO silpixa00400573.ger.corp.intel.com) ([10.237.223.107]) by fmsmga007.fm.intel.com with ESMTP; 11 Feb 2022 07:11:15 -0800 From: Cristian Dumitrescu To: dev@dpdk.org Cc: Yogesh Jangra , Harshad Suresh Narayane Subject: [PATCH V3] pipeline: support checksum for variable size headers Date: Fri, 11 Feb 2022 15:11:14 +0000 Message-Id: <20220211151114.17364-1-cristian.dumitrescu@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220208215205.33730-1-cristian.dumitrescu@intel.com> References: <20220208215205.33730-1-cristian.dumitrescu@intel.com> X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Added checksum support for variable size headers such as IPv4 headers with options. Signed-off-by: Cristian Dumitrescu Signed-off-by: Yogesh Jangra Signed-off-by: Harshad Suresh Narayane --- Change log: V2: Fix the checksum accumulation over initial destination value. V3: Fix strange git am issue. lib/pipeline/rte_swx_pipeline.c | 13 +++--- lib/pipeline/rte_swx_pipeline_internal.h | 59 ++++++++++++++++-------- 2 files changed, 47 insertions(+), 25 deletions(-) diff --git a/lib/pipeline/rte_swx_pipeline.c b/lib/pipeline/rte_swx_pipeline.c index 1a50c4bb72..eb54ccaeda 100644 --- a/lib/pipeline/rte_swx_pipeline.c +++ b/lib/pipeline/rte_swx_pipeline.c @@ -2887,8 +2887,8 @@ instr_alu_ckadd_translate(struct rte_swx_pipeline *p, CHECK(n_tokens == 3, EINVAL); fdst = header_field_parse(p, dst, &hdst); - CHECK(fdst && (fdst->n_bits == 16), EINVAL); - CHECK(!fdst->var_size, EINVAL); + CHECK(fdst, EINVAL); + CHECK(!fdst->var_size && (fdst->n_bits == 16), EINVAL); /* CKADD_FIELD. */ fsrc = header_field_parse(p, src, &hsrc); @@ -2908,17 +2908,16 @@ instr_alu_ckadd_translate(struct rte_swx_pipeline *p, /* CKADD_STRUCT, CKADD_STRUCT20. */ hsrc = header_parse(p, src); CHECK(hsrc, EINVAL); - CHECK(!hsrc->st->var_size, EINVAL); instr->type = INSTR_ALU_CKADD_STRUCT; - if ((hsrc->st->n_bits / 8) == 20) + if (!hsrc->st->var_size && ((hsrc->st->n_bits / 8) == 20)) instr->type = INSTR_ALU_CKADD_STRUCT20; instr->alu.dst.struct_id = (uint8_t)hdst->struct_id; instr->alu.dst.n_bits = fdst->n_bits; instr->alu.dst.offset = fdst->offset / 8; instr->alu.src.struct_id = (uint8_t)hsrc->struct_id; - instr->alu.src.n_bits = hsrc->st->n_bits; + instr->alu.src.n_bits = (uint8_t)hsrc->id; /* The src header ID is stored here. */ instr->alu.src.offset = 0; /* Unused. */ return 0; } @@ -2938,8 +2937,8 @@ instr_alu_cksub_translate(struct rte_swx_pipeline *p, CHECK(n_tokens == 3, EINVAL); fdst = header_field_parse(p, dst, &hdst); - CHECK(fdst && (fdst->n_bits == 16), EINVAL); - CHECK(!fdst->var_size, EINVAL); + CHECK(fdst, EINVAL); + CHECK(!fdst->var_size && (fdst->n_bits == 16), EINVAL); fsrc = header_field_parse(p, src, &hsrc); CHECK(fsrc, EINVAL); diff --git a/lib/pipeline/rte_swx_pipeline_internal.h b/lib/pipeline/rte_swx_pipeline_internal.h index 8f0b024666..da3e88bfa8 100644 --- a/lib/pipeline/rte_swx_pipeline_internal.h +++ b/lib/pipeline/rte_swx_pipeline_internal.h @@ -305,16 +305,16 @@ enum instruction_type { INSTR_ALU_SUB_HI, /* dst = H, src = I */ /* ckadd dst src - * dst = dst '+ src[0:1] '+ src[2:3] + ... - * dst = H, src = {H, h.header} + * dst = dst '+ src[0:1] '+ src[2:3] '+ ... + * dst = H, src = {H, h.header}, '+ = 1's complement addition operator */ INSTR_ALU_CKADD_FIELD, /* src = H */ - INSTR_ALU_CKADD_STRUCT20, /* src = h.header, with sizeof(header) = 20 */ - INSTR_ALU_CKADD_STRUCT, /* src = h.header, with any sizeof(header) */ + INSTR_ALU_CKADD_STRUCT20, /* src = h.header, with sizeof(header) = 20 bytes. */ + INSTR_ALU_CKADD_STRUCT, /* src = h.header, with sizeof(header) any 4-byte multiple. */ /* cksub dst src * dst = dst '- src - * dst = H, src = H + * dst = H, src = H, '- = 1's complement subtraction operator */ INSTR_ALU_CKSUB_FIELD, @@ -2700,6 +2700,7 @@ __instr_alu_ckadd_field_exec(struct rte_swx_pipeline *p __rte_unused, src64_mask = UINT64_MAX >> (64 - ip->alu.src.n_bits); src = src64 & src64_mask; + /* Initialize the result with destination 1's complement. */ r = dst; r = ~r & 0xFFFF; @@ -2727,6 +2728,7 @@ __instr_alu_ckadd_field_exec(struct rte_swx_pipeline *p __rte_unused, */ r = (r & 0xFFFF) + (r >> 16); + /* Apply 1's complement to the result. */ r = ~r & 0xFFFF; r = r ? r : 0xFFFF; @@ -2756,6 +2758,7 @@ __instr_alu_cksub_field_exec(struct rte_swx_pipeline *p __rte_unused, src64_mask = UINT64_MAX >> (64 - ip->alu.src.n_bits); src = src64 & src64_mask; + /* Initialize the result with destination 1's complement. */ r = dst; r = ~r & 0xFFFF; @@ -2795,6 +2798,7 @@ __instr_alu_cksub_field_exec(struct rte_swx_pipeline *p __rte_unused, */ r = (r & 0xFFFF) + (r >> 16); + /* Apply 1's complement to the result. */ r = ~r & 0xFFFF; r = r ? r : 0xFFFF; @@ -2807,7 +2811,7 @@ __instr_alu_ckadd_struct20_exec(struct rte_swx_pipeline *p __rte_unused, const struct instruction *ip) { uint8_t *dst_struct, *src_struct; - uint16_t *dst16_ptr; + uint16_t *dst16_ptr, dst; uint32_t *src32_ptr; uint64_t r0, r1; @@ -2816,13 +2820,18 @@ __instr_alu_ckadd_struct20_exec(struct rte_swx_pipeline *p __rte_unused, /* Structs. */ dst_struct = t->structs[ip->alu.dst.struct_id]; dst16_ptr = (uint16_t *)&dst_struct[ip->alu.dst.offset]; + dst = *dst16_ptr; src_struct = t->structs[ip->alu.src.struct_id]; src32_ptr = (uint32_t *)&src_struct[0]; - r0 = src32_ptr[0]; /* r0 is a 32-bit number. */ + /* Initialize the result with destination 1's complement. */ + r0 = dst; + r0 = ~r0 & 0xFFFF; + + r0 += src32_ptr[0]; /* The output r0 is a 33-bit number. */ r1 = src32_ptr[1]; /* r1 is a 32-bit number. */ - r0 += src32_ptr[2]; /* The output r0 is a 33-bit number. */ + r0 += src32_ptr[2]; /* The output r0 is a 34-bit number. */ r1 += src32_ptr[3]; /* The output r1 is a 33-bit number. */ r0 += r1 + src32_ptr[4]; /* The output r0 is a 35-bit number. */ @@ -2843,6 +2852,7 @@ __instr_alu_ckadd_struct20_exec(struct rte_swx_pipeline *p __rte_unused, */ r0 = (r0 & 0xFFFF) + (r0 >> 16); + /* Apply 1's complement to the result. */ r0 = ~r0 & 0xFFFF; r0 = r0 ? r0 : 0xFFFF; @@ -2854,45 +2864,58 @@ __instr_alu_ckadd_struct_exec(struct rte_swx_pipeline *p __rte_unused, struct thread *t, const struct instruction *ip) { + uint32_t src_header_id = ip->alu.src.n_bits; /* The src header ID is stored here. */ + uint32_t n_src_header_bytes = t->headers[src_header_id].n_bytes; uint8_t *dst_struct, *src_struct; - uint16_t *dst16_ptr; + uint16_t *dst16_ptr, dst; uint32_t *src32_ptr; - uint64_t r = 0; + uint64_t r; uint32_t i; + if (n_src_header_bytes == 20) { + __instr_alu_ckadd_struct20_exec(p, t, ip); + return; + } + TRACE("[Thread %2u] ckadd (struct)\n", p->thread_id); /* Structs. */ dst_struct = t->structs[ip->alu.dst.struct_id]; dst16_ptr = (uint16_t *)&dst_struct[ip->alu.dst.offset]; + dst = *dst16_ptr; src_struct = t->structs[ip->alu.src.struct_id]; src32_ptr = (uint32_t *)&src_struct[0]; - /* The max number of 32-bit words in a 256-byte header is 8 = 2^3. - * Therefore, in the worst case scenario, a 35-bit number is added to a - * 16-bit number (the input r), so the output r is 36-bit number. + /* Initialize the result with destination 1's complement. */ + r = dst; + r = ~r & 0xFFFF; + + /* The max number of 32-bit words in a 32K-byte header is 2^13. + * Therefore, in the worst case scenario, a 45-bit number is added to a + * 16-bit number (the input r), so the output r is 46-bit number. */ - for (i = 0; i < ip->alu.src.n_bits / 32; i++, src32_ptr++) + for (i = 0; i < n_src_header_bytes / 4; i++, src32_ptr++) r += *src32_ptr; - /* The first input is a 16-bit number. The second input is a 20-bit - * number. Their sum is a 21-bit number. + /* The first input is a 16-bit number. The second input is a 30-bit + * number. Their sum is a 31-bit number. */ r = (r & 0xFFFF) + (r >> 16); /* The first input is a 16-bit number (0 .. 0xFFFF). The second input is - * a 5-bit number (0 .. 31). The sum is a 17-bit number (0 .. 0x1000E). + * a 15-bit number (0 .. 0x7FFF). The sum is a 17-bit number (0 .. 0x17FFE). */ r = (r & 0xFFFF) + (r >> 16); /* When the input r is (0 .. 0xFFFF), the output r is equal to the input * r, so the output is (0 .. 0xFFFF). When the input r is (0x10000 .. - * 0x1001E), the output r is (0 .. 31). So no carry bit can be + * 0x17FFE), the output r is (0 .. 0x7FFF). So no carry bit can be * generated, therefore the output r is always a 16-bit number. */ r = (r & 0xFFFF) + (r >> 16); + /* Apply 1's complement to the result. */ r = ~r & 0xFFFF; r = r ? r : 0xFFFF; -- 2.17.1