From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5190FA00BE; Thu, 17 Feb 2022 04:04:59 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4284241163; Thu, 17 Feb 2022 04:04:35 +0100 (CET) Received: from szxga08-in.huawei.com (szxga08-in.huawei.com [45.249.212.255]) by mails.dpdk.org (Postfix) with ESMTP id EBF5E410FF for ; Thu, 17 Feb 2022 04:04:29 +0100 (CET) Received: from dggpeml500024.china.huawei.com (unknown [172.30.72.56]) by szxga08-in.huawei.com (SkyGuard) with ESMTP id 4Jzfh50cvMz1FDHb; Thu, 17 Feb 2022 11:00:05 +0800 (CST) Received: from localhost.localdomain (10.67.165.24) by dggpeml500024.china.huawei.com (7.185.36.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2308.21; Thu, 17 Feb 2022 11:04:27 +0800 From: Chengwen Feng To: CC: Subject: [PATCH 3/5] dma/hisilicon: support dump Kunpeng930 DMA registers Date: Thu, 17 Feb 2022 10:59:09 +0800 Message-ID: <20220217025911.35822-4-fengchengwen@huawei.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220217025911.35822-1-fengchengwen@huawei.com> References: <20220217025911.35822-1-fengchengwen@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.67.165.24] X-ClientProxiedBy: dggems701-chm.china.huawei.com (10.3.19.178) To dggpeml500024.china.huawei.com (7.185.36.10) X-CFilter-Loop: Reflected X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patch supports dump Kunpeng930 DMA registers. Signed-off-by: Chengwen Feng --- drivers/dma/hisilicon/hisi_dmadev.c | 54 +++++++++++++++++++---------- drivers/dma/hisilicon/hisi_dmadev.h | 8 +++++ 2 files changed, 44 insertions(+), 18 deletions(-) diff --git a/drivers/dma/hisilicon/hisi_dmadev.c b/drivers/dma/hisilicon/hisi_dmadev.c index b99a9bce6c..3917db38b7 100644 --- a/drivers/dma/hisilicon/hisi_dmadev.c +++ b/drivers/dma/hisilicon/hisi_dmadev.c @@ -460,29 +460,13 @@ hisi_dma_stats_reset(struct rte_dma_dev *dev, uint16_t vchan) } static void -hisi_dma_get_dump_range(struct hisi_dma_dev *hw, uint32_t *start, uint32_t *end) -{ - if (hw->reg_layout == HISI_DMA_REG_LAYOUT_HIP08) { - *start = HISI_DMA_HIP08_DUMP_START_REG; - *end = HISI_DMA_HIP08_DUMP_END_REG; - } else { - *start = 0; - *end = 0; - } -} - -static void -hisi_dma_dump_common(struct hisi_dma_dev *hw, FILE *f) +hisi_dma_dump_range(struct hisi_dma_dev *hw, FILE *f, uint32_t start, + uint32_t end) { #define DUMP_REGNUM_PER_LINE 4 - uint32_t start, end; uint32_t cnt, i; - hisi_dma_get_dump_range(hw, &start, &end); - - (void)fprintf(f, " common-register:\n"); - cnt = 0; for (i = start; i <= end; i += sizeof(uint32_t)) { if (cnt % DUMP_REGNUM_PER_LINE == 0) @@ -496,6 +480,40 @@ hisi_dma_dump_common(struct hisi_dma_dev *hw, FILE *f) (void)fprintf(f, "\n"); } +static void +hisi_dma_dump_common(struct hisi_dma_dev *hw, FILE *f) +{ + struct { + uint8_t reg_layout; + uint32_t start; + uint32_t end; + } reg_info[] = { + { HISI_DMA_REG_LAYOUT_HIP08, + HISI_DMA_HIP08_DUMP_START_REG, + HISI_DMA_HIP08_DUMP_END_REG }, + { HISI_DMA_REG_LAYOUT_HIP09, + HISI_DMA_HIP09_DUMP_REGION_A_START_REG, + HISI_DMA_HIP09_DUMP_REGION_A_END_REG }, + { HISI_DMA_REG_LAYOUT_HIP09, + HISI_DMA_HIP09_DUMP_REGION_B_START_REG, + HISI_DMA_HIP09_DUMP_REGION_B_END_REG }, + { HISI_DMA_REG_LAYOUT_HIP09, + HISI_DMA_HIP09_DUMP_REGION_C_START_REG, + HISI_DMA_HIP09_DUMP_REGION_C_END_REG }, + { HISI_DMA_REG_LAYOUT_HIP09, + HISI_DMA_HIP09_DUMP_REGION_D_START_REG, + HISI_DMA_HIP09_DUMP_REGION_D_END_REG }, + }; + uint32_t i; + + (void)fprintf(f, " common-register:\n"); + for (i = 0; i < RTE_DIM(reg_info); i++) { + if (hw->reg_layout != reg_info[i].reg_layout) + continue; + hisi_dma_dump_range(hw, f, reg_info[i].start, reg_info[i].end); + } +} + static void hisi_dma_dump_read_queue(struct hisi_dma_dev *hw, uint32_t qoff, char *buffer, int max_sz) diff --git a/drivers/dma/hisilicon/hisi_dmadev.h b/drivers/dma/hisilicon/hisi_dmadev.h index 591aec0b32..1eaa822db1 100644 --- a/drivers/dma/hisilicon/hisi_dmadev.h +++ b/drivers/dma/hisilicon/hisi_dmadev.h @@ -121,6 +121,14 @@ enum { #define HISI_DMA_HIP09_QUEUE_CFG_REG(queue_id) (0x800 + \ (queue_id) * 0x20) #define HISI_DMA_HIP09_QUEUE_CFG_LINK_DOWN_MASK_B 16 +#define HISI_DMA_HIP09_DUMP_REGION_A_START_REG 0x0 +#define HISI_DMA_HIP09_DUMP_REGION_A_END_REG 0x368 +#define HISI_DMA_HIP09_DUMP_REGION_B_START_REG 0x800 +#define HISI_DMA_HIP09_DUMP_REGION_B_END_REG 0xA08 +#define HISI_DMA_HIP09_DUMP_REGION_C_START_REG 0x1800 +#define HISI_DMA_HIP09_DUMP_REGION_C_END_REG 0x1A4C +#define HISI_DMA_HIP09_DUMP_REGION_D_START_REG 0x1C00 +#define HISI_DMA_HIP09_DUMP_REGION_D_END_REG 0x1CC4 /** * In fact, there are multiple states, but it need to pay attention to -- 2.33.0