From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C640BA034E; Mon, 21 Feb 2022 11:48:57 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B113541150; Mon, 21 Feb 2022 11:48:47 +0100 (CET) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mails.dpdk.org (Postfix) with ESMTP id AC1D741150 for ; Mon, 21 Feb 2022 11:48:45 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1645440525; x=1676976525; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=Y+tTYHhgs7YJ332AZEIgcNm/nXHxfNowf4Lced+kGPo=; b=IHhgve3muP6WIFq3TfOc4pTg1CTXCMZvWas9jukDlN1g8GknuO9zDq0c EnRj/UHX00ls6bUbId62EgG2iKSduZX3OEll+lgh8heWzK1oIc8eUnWaG BKqJu3PTeV9hlvqSPHSQUkDNmiBtjeD6SM4F+zFiA2BkHF6SrDWtoHNPd MGueim4sLKFq70iyRMrWNHpZiNjW6pTk3Y9M6ZurRXrbwyj0aZMzcDVlS giOKiH6fn2MGoOPgJEb2B5edEilFtUMp5E21s5vwNfR2Ep3V+RnO1nxt1 aE/J+m468V/Jdxc4F7gWj8hl6sJ5J1W79f0M1NQlK0HRjtrPi8pxgWKOW A==; X-IronPort-AV: E=McAfee;i="6200,9189,10264"; a="251668111" X-IronPort-AV: E=Sophos;i="5.88,385,1635231600"; d="scan'208";a="251668111" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Feb 2022 02:48:45 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,385,1635231600"; d="scan'208";a="638517144" Received: from silpixa00400308.ir.intel.com ([10.237.214.95]) by orsmga004.jf.intel.com with ESMTP; 21 Feb 2022 02:48:43 -0800 From: Arek Kusztal To: dev@dpdk.org Cc: gakhil@marvell.com, roy.fan.zhang@intel.com, Arek Kusztal Subject: [PATCH v3 3/5] crypto/qat: add ecdsa algorithm Date: Mon, 21 Feb 2022 10:48:29 +0000 Message-Id: <20220221104831.30149-4-arkadiuszx.kusztal@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220221104831.30149-1-arkadiuszx.kusztal@intel.com> References: <20220221104831.30149-1-arkadiuszx.kusztal@intel.com> X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patch adds ECDSA algorithm to Intel QuickAssist Technology PMD. Signed-off-by: Arek Kusztal --- doc/guides/cryptodevs/qat.rst | 1 + doc/guides/rel_notes/release_22_03.rst | 5 ++ drivers/common/qat/qat_adf/qat_pke.h | 40 +++++++++ drivers/crypto/qat/qat_asym.c | 148 +++++++++++++++++++++++++++++++++ drivers/crypto/qat/qat_asym.h | 4 + 5 files changed, 198 insertions(+) diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst index 452bc843c2..593c2471ed 100644 --- a/doc/guides/cryptodevs/qat.rst +++ b/doc/guides/cryptodevs/qat.rst @@ -175,6 +175,7 @@ The QAT ASYM PMD has support for: * ``RTE_CRYPTO_ASYM_XFORM_MODEX`` * ``RTE_CRYPTO_ASYM_XFORM_MODINV`` * ``RTE_CRYPTO_ASYM_XFORM_RSA`` +* ``RTE_CRYPTO_ASYM_XFORM_ECDSA`` Limitations ~~~~~~~~~~~ diff --git a/doc/guides/rel_notes/release_22_03.rst b/doc/guides/rel_notes/release_22_03.rst index ff3095d742..c060cb562a 100644 --- a/doc/guides/rel_notes/release_22_03.rst +++ b/doc/guides/rel_notes/release_22_03.rst @@ -149,6 +149,11 @@ New Features * Called ``rte_ipv4/6_udptcp_cksum_mbuf()`` functions in testpmd csum mode to support software UDP/TCP checksum over multiple segments. +* **Updated Intel QuickAssist Technology asymmetric crypto PMD.** + + * ECDSA algorithm is now supported by Intel QuickAssist + Technology asymmetric crypto PMD. + Removed Items ------------- diff --git a/drivers/common/qat/qat_adf/qat_pke.h b/drivers/common/qat/qat_adf/qat_pke.h index 82bb1ee55e..1fe5f6bd8e 100644 --- a/drivers/common/qat/qat_adf/qat_pke.h +++ b/drivers/common/qat/qat_adf/qat_pke.h @@ -212,4 +212,44 @@ get_rsa_crt_function(struct rte_crypto_asym_xform *xform) return qat_function; } +static struct qat_asym_function +get_ecdsa_verify_function(struct rte_crypto_asym_xform *xform) +{ + struct qat_asym_function qat_function; + + switch (xform->ec.curve_id) { + case RTE_CRYPTO_EC_GROUP_SECP256R1: + qat_function.func_id = PKE_ECDSA_VERIFY_GFP_L256; + qat_function.bytesize = 32; + break; + case RTE_CRYPTO_EC_GROUP_SECP521R1: + qat_function.func_id = PKE_ECDSA_VERIFY_GFP_521; + qat_function.bytesize = 66; + break; + default: + qat_function.func_id = 0; + } + return qat_function; +} + +static struct qat_asym_function +get_ecdsa_function(struct rte_crypto_asym_xform *xform) +{ + struct qat_asym_function qat_function; + + switch (xform->ec.curve_id) { + case RTE_CRYPTO_EC_GROUP_SECP256R1: + qat_function.func_id = PKE_ECDSA_SIGN_RS_GFP_L256; + qat_function.bytesize = 32; + break; + case RTE_CRYPTO_EC_GROUP_SECP521R1: + qat_function.func_id = PKE_ECDSA_SIGN_RS_GFP_521; + qat_function.bytesize = 66; + break; + default: + qat_function.func_id = 0; + } + return qat_function; +} + #endif diff --git a/drivers/crypto/qat/qat_asym.c b/drivers/crypto/qat/qat_asym.c index 0a5831f531..24dd3ee57f 100644 --- a/drivers/crypto/qat/qat_asym.c +++ b/drivers/crypto/qat/qat_asym.c @@ -31,14 +31,24 @@ static const struct rte_driver cryptodev_qat_asym_driver = { .alias = qat_asym_drv_name }; +/* + * Macros with suffix _F are used with some of predefinded identifiers: + * - cookie->input_buffer + * - qat_alg_bytesize + */ #if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG #define HEXDUMP(name, where, size) QAT_DP_HEXDUMP_LOG(DEBUG, name, \ where, size) #define HEXDUMP_OFF(name, where, size, idx) QAT_DP_HEXDUMP_LOG(DEBUG, name, \ &where[idx * size], size) + +#define HEXDUMP_OFF_F(name, idx) QAT_DP_HEXDUMP_LOG(DEBUG, name, \ + &cookie->input_buffer[idx * qat_alg_bytesize], \ + qat_alg_bytesize) #else #define HEXDUMP(name, where, size) #define HEXDUMP_OFF(name, where, size, idx) +#define HEXDUMP_OFF_F(name, idx) #endif #define CHECK_IF_NOT_EMPTY(param, name, pname, status) \ @@ -79,6 +89,17 @@ static const struct rte_driver cryptodev_qat_asym_driver = { what.data, \ how) +#define SET_PKE_LN_9A_F(what, idx) \ + rte_memcpy(&cookie->input_buffer[idx * qat_alg_bytesize] + \ + qat_alg_bytesize - what.length, \ + what.data, what.length) + +#define SET_PKE_LN_EC_F(what, how, idx) \ + rte_memcpy(&cookie->input_buffer[idx * \ + RTE_ALIGN_CEIL(how, 8)] + \ + RTE_ALIGN_CEIL(how, 8) - how, \ + what.data, how) + static void request_init(struct icp_qat_fw_pke_request *qat_req) { @@ -544,6 +565,128 @@ rsa_collect(struct rte_crypto_asym_op *asym_op, return RTE_CRYPTO_OP_STATUS_SUCCESS; } +static int +ecdsa_set_input(struct rte_crypto_asym_op *asym_op, + struct icp_qat_fw_pke_request *qat_req, + struct qat_asym_op_cookie *cookie, + struct rte_crypto_asym_xform *xform) +{ + struct qat_asym_function qat_function; + uint32_t alg_bytesize, qat_alg_bytesize, func_id; + int curve_id; + + curve_id = pick_curve(xform); + if (curve_id < 0) { + QAT_LOG(ERR, "Incorrect elliptic curve"); + return -EINVAL; + } + + switch (asym_op->ecdsa.op_type) { + case RTE_CRYPTO_ASYM_OP_SIGN: + qat_function = get_ecdsa_function(xform); + func_id = qat_function.func_id; + if (func_id == 0) { + QAT_LOG(ERR, "Cannot obtain functionality id"); + return -EINVAL; + } + alg_bytesize = qat_function.bytesize; + qat_alg_bytesize = RTE_ALIGN_CEIL(alg_bytesize, 8); + + SET_PKE_LN_9A_F(asym_op->ecdsa.pkey, 0); + SET_PKE_LN_9A_F(asym_op->ecdsa.message, 1); + SET_PKE_LN_9A_F(asym_op->ecdsa.k, 2); + SET_PKE_LN_EC_F(curve[curve_id].b, alg_bytesize, 3); + SET_PKE_LN_EC_F(curve[curve_id].a, alg_bytesize, 4); + SET_PKE_LN_EC_F(curve[curve_id].p, alg_bytesize, 5); + SET_PKE_LN_EC_F(curve[curve_id].n, alg_bytesize, 6); + SET_PKE_LN_EC_F(curve[curve_id].y, alg_bytesize, 7); + SET_PKE_LN_EC_F(curve[curve_id].x, alg_bytesize, 8); + + cookie->alg_bytesize = alg_bytesize; + qat_req->pke_hdr.cd_pars.func_id = func_id; + qat_req->input_param_count = + QAT_ASYM_ECDSA_RS_SIGN_IN_PARAMS; + qat_req->output_param_count = + QAT_ASYM_ECDSA_RS_SIGN_OUT_PARAMS; + + HEXDUMP_OFF_F("ECDSA d", 0); + HEXDUMP_OFF_F("ECDSA e", 1); + HEXDUMP_OFF_F("ECDSA k", 2); + HEXDUMP_OFF_F("ECDSA b", 3); + HEXDUMP_OFF_F("ECDSA a", 4); + HEXDUMP_OFF_F("ECDSA n", 5); + HEXDUMP_OFF_F("ECDSA y", 6); + HEXDUMP_OFF_F("ECDSA x", 7); + break; + case RTE_CRYPTO_ASYM_OP_VERIFY: + qat_function = get_ecdsa_verify_function(xform); + func_id = qat_function.func_id; + if (func_id == 0) { + QAT_LOG(ERR, "Cannot obtain functionality id"); + return -EINVAL; + } + alg_bytesize = qat_function.bytesize; + qat_alg_bytesize = RTE_ALIGN_CEIL(alg_bytesize, 8); + + SET_PKE_LN_9A_F(asym_op->ecdsa.message, 10); + SET_PKE_LN_9A_F(asym_op->ecdsa.s, 9); + SET_PKE_LN_9A_F(asym_op->ecdsa.r, 8); + SET_PKE_LN_EC_F(curve[curve_id].n, alg_bytesize, 7); + SET_PKE_LN_EC_F(curve[curve_id].x, alg_bytesize, 6); + SET_PKE_LN_EC_F(curve[curve_id].y, alg_bytesize, 5); + SET_PKE_LN_9A_F(asym_op->ecdsa.q.x, 4); + SET_PKE_LN_9A_F(asym_op->ecdsa.q.y, 3); + SET_PKE_LN_EC_F(curve[curve_id].a, alg_bytesize, 2); + SET_PKE_LN_EC_F(curve[curve_id].b, alg_bytesize, 1); + SET_PKE_LN_EC_F(curve[curve_id].p, alg_bytesize, 0); + + cookie->alg_bytesize = alg_bytesize; + qat_req->pke_hdr.cd_pars.func_id = func_id; + qat_req->input_param_count = + QAT_ASYM_ECDSA_RS_VERIFY_IN_PARAMS; + qat_req->output_param_count = + QAT_ASYM_ECDSA_RS_VERIFY_OUT_PARAMS; + + HEXDUMP_OFF_F("e", 0); + HEXDUMP_OFF_F("s", 1); + HEXDUMP_OFF_F("r", 2); + HEXDUMP_OFF_F("n", 3); + HEXDUMP_OFF_F("xG", 4); + HEXDUMP_OFF_F("yG", 5); + HEXDUMP_OFF_F("xQ", 6); + HEXDUMP_OFF_F("yQ", 7); + HEXDUMP_OFF_F("a", 8); + HEXDUMP_OFF_F("b", 9); + HEXDUMP_OFF_F("q", 10); + break; + default: + return -1; + } + + return 0; +} + +static uint8_t +ecdsa_collect(struct rte_crypto_asym_op *asym_op, + struct qat_asym_op_cookie *cookie) +{ + uint32_t alg_bytesize = RTE_ALIGN_CEIL(cookie->alg_bytesize, 8); + + if (asym_op->rsa.op_type == RTE_CRYPTO_ASYM_OP_SIGN) { + uint8_t *r = asym_op->ecdsa.r.data; + uint8_t *s = asym_op->ecdsa.s.data; + + asym_op->ecdsa.r.length = alg_bytesize; + asym_op->ecdsa.s.length = alg_bytesize; + rte_memcpy(r, cookie->output_array[0], alg_bytesize); + rte_memcpy(s, cookie->output_array[1], alg_bytesize); + HEXDUMP("R", cookie->output_array[0], + alg_bytesize); + HEXDUMP("S", cookie->output_array[1], + alg_bytesize); + } + return RTE_CRYPTO_OP_STATUS_SUCCESS; +} static int asym_set_input(struct rte_crypto_asym_op *asym_op, @@ -561,6 +704,9 @@ asym_set_input(struct rte_crypto_asym_op *asym_op, case RTE_CRYPTO_ASYM_XFORM_RSA: return rsa_set_input(asym_op, qat_req, cookie, xform); + case RTE_CRYPTO_ASYM_XFORM_ECDSA: + return ecdsa_set_input(asym_op, qat_req, + cookie, xform); default: QAT_LOG(ERR, "Invalid/unsupported asymmetric crypto xform"); return -EINVAL; @@ -635,6 +781,8 @@ qat_asym_collect_response(struct rte_crypto_op *rx_op, return modinv_collect(asym_op, cookie, xform); case RTE_CRYPTO_ASYM_XFORM_RSA: return rsa_collect(asym_op, cookie); + case RTE_CRYPTO_ASYM_XFORM_ECDSA: + return ecdsa_collect(asym_op, cookie); default: QAT_LOG(ERR, "Not supported xform type"); return RTE_CRYPTO_OP_STATUS_ERROR; diff --git a/drivers/crypto/qat/qat_asym.h b/drivers/crypto/qat/qat_asym.h index cb7102aa3b..5e926125f2 100644 --- a/drivers/crypto/qat/qat_asym.h +++ b/drivers/crypto/qat/qat_asym.h @@ -28,6 +28,10 @@ typedef uint64_t large_int_ptr; #define QAT_ASYM_RSA_NUM_IN_PARAMS 3 #define QAT_ASYM_RSA_NUM_OUT_PARAMS 1 #define QAT_ASYM_RSA_QT_NUM_IN_PARAMS 6 +#define QAT_ASYM_ECDSA_RS_SIGN_IN_PARAMS 1 +#define QAT_ASYM_ECDSA_RS_SIGN_OUT_PARAMS 2 +#define QAT_ASYM_ECDSA_RS_VERIFY_IN_PARAMS 1 +#define QAT_ASYM_ECDSA_RS_VERIFY_OUT_PARAMS 0 /** * helper function to add an asym capability -- 2.13.6