From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A79FAA0350; Tue, 22 Feb 2022 13:58:02 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5E70B4114B; Tue, 22 Feb 2022 13:57:57 +0100 (CET) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by mails.dpdk.org (Postfix) with ESMTP id 202F041142 for ; Tue, 22 Feb 2022 13:57:53 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1645534674; x=1677070674; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=dGDOCTGRZbKWjw9BeMGdumpkTCxv2SgZebrauDbkC+c=; b=OPF0xXZoINZFKZjWNZGh7rDCMYBvkZvA6qKarSdrmqPwetrSWoXmgwiH rOKlNWxc01SzrOsdf24IKCckagVWC7f9kth883Yuc56KPVbdJ5waVketM b07cd5Jl95Hvx9vN24xdROiVghvUM08UkIy0Q9ZsWb1IIXLL9L+t0uNSy F73WLxGmYZEVmDvGkj2Kjjg78b7DXSubCeBpoUknXCMsxFYKhawh3U7k4 pfsrASZHzod2/Mm8Lwhftyflk0GxTVfb2Az8zUyJYRqgeTjrEpk+WSkpP H/esWy65qOfLgn5VeAo7j72avAMXZ3FFDNBL2ERFHkcM5Vuizgbp22g5W g==; X-IronPort-AV: E=McAfee;i="6200,9189,10265"; a="251627057" X-IronPort-AV: E=Sophos;i="5.88,387,1635231600"; d="scan'208";a="251627057" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Feb 2022 04:57:53 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,387,1635231600"; d="scan'208";a="542926656" Received: from silpixa00397515.ir.intel.com (HELO silpixa00397515.ger.corp.intel.com) ([10.237.222.51]) by fmsmga007.fm.intel.com with ESMTP; 22 Feb 2022 04:57:52 -0800 From: Megha Ajmera To: dev@dpdk.org, jasvinder.singh@intel.com, cristian.dumitrescu@intel.com, thomas@monjalon.net, david.marchand@redhat.com, sham.singh.thakur@intel.com Subject: [PATCH v3 2/4] sched: move grinder configuration flag Date: Tue, 22 Feb 2022 12:57:43 +0000 Message-Id: <20220222125745.2944462-3-megha.ajmera@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220222125745.2944462-1-megha.ajmera@intel.com> References: <20220218093650.2549927-1-megha.ajmera@intel.com> <20220222125745.2944462-1-megha.ajmera@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Grinder configuration is now moved to sched library. Number of grinders can also modified by specifying RTE_SCHED_PORT_N_GRINDERS=N in CFLAGS, where N is number of grinders. Signed-off-by: Megha Ajmera --- config/rte_config.h | 1 - doc/guides/sample_app_ug/qos_scheduler.rst | 5 +++++ lib/sched/rte_sched.c | 4 ++++ 3 files changed, 9 insertions(+), 1 deletion(-) diff --git a/config/rte_config.h b/config/rte_config.h index 7a7da2f4e5..d449af4810 100644 --- a/config/rte_config.h +++ b/config/rte_config.h @@ -92,7 +92,6 @@ #undef RTE_SCHED_CMAN #undef RTE_SCHED_COLLECT_STATS #undef RTE_SCHED_SUBPORT_TC_OV -#define RTE_SCHED_PORT_N_GRINDERS 8 /* rte_graph defines */ #define RTE_GRAPH_BURST_SIZE 256 diff --git a/doc/guides/sample_app_ug/qos_scheduler.rst b/doc/guides/sample_app_ug/qos_scheduler.rst index 49c14a00da..0782e41ee7 100644 --- a/doc/guides/sample_app_ug/qos_scheduler.rst +++ b/doc/guides/sample_app_ug/qos_scheduler.rst @@ -45,6 +45,11 @@ The application is located in the ``qos_sched`` sub-directory. DPDK must be compiled defining *RTE_SCHED_COLLECT_STATS*, which can be done by changing the relevant entry in the ``config/rte_config.h`` file. +.. note:: + + Number of grinders is currently set to 8. This can be modified by specifying RTE_SCHED_PORT_N_GRINDERS=N in + CFLAGS, where N is number of grinders. + Running the Application ----------------------- diff --git a/lib/sched/rte_sched.c b/lib/sched/rte_sched.c index 1d3051cc0f..9c85edb4cc 100644 --- a/lib/sched/rte_sched.c +++ b/lib/sched/rte_sched.c @@ -24,6 +24,10 @@ #pragma warning(disable:2259) /* conversion may lose significant bits */ #endif +#ifndef RTE_SCHED_PORT_N_GRINDERS +#define RTE_SCHED_PORT_N_GRINDERS 8 +#endif + #define RTE_SCHED_TB_RATE_CONFIG_ERR (1e-7) #define RTE_SCHED_WRR_SHIFT 3 #define RTE_SCHED_MAX_QUEUES_PER_TC RTE_SCHED_BE_QUEUES_PER_PIPE -- 2.25.1