From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A0A91A034C; Tue, 22 Feb 2022 20:36:16 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 64B5F41180; Tue, 22 Feb 2022 20:35:48 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id C307241159 for ; Tue, 22 Feb 2022 20:35:44 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 21MIlBmt020298 for ; Tue, 22 Feb 2022 11:35:44 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=21Unmi9t+GK5YH7b1zcwx+zsyP6rgi9WMDjfe4d3qF0=; b=edZ+GV16RRGtLd8l9owka9BHHAuAME7hQftkn0SAMlBGX1r4YUOw53kHPJ6C+oCSWkAC eg0Dm0wKKrc+4tdIfp4dkEWDXHObacWmV+3aMBV8memJs4/Elqei5IbroCPNNNWVfT0L jOb0hUTSKWHm2ctLxpeexw9vcXMdoo7Zm0If+E8F3AL7yyXyLPnWWmGYqoKtQC4mPKbh K2uXcKo5us3WiETmp3JFBhNW/Sw18p5mgWDrjNLDFnRcn8jjx3ZQ6/ir+v4wWUs0wBjG stHczJZCVQ+2zO2WmQbM639+bYK9xBMCoHwhtGR7hcQPIkrxbjRuMC4PePBhamnHcc2k Dg== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3ecwaxar2k-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 22 Feb 2022 11:35:43 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Tue, 22 Feb 2022 11:35:42 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 22 Feb 2022 11:35:42 -0800 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 5C8D33F707E; Tue, 22 Feb 2022 11:35:40 -0800 (PST) From: Nithin Dabilpuram To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao CC: Subject: [PATCH v2 09/21] common/cnxk: allow force use of SSO pffunc for outb inline Date: Wed, 23 Feb 2022 01:05:00 +0530 Message-ID: <20220222193512.19292-9-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20220222193512.19292-1-ndabilpuram@marvell.com> References: <20220207072932.22409-1-ndabilpuram@marvell.com> <20220222193512.19292-1-ndabilpuram@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-GUID: dB3vInAc8cYSTRy-8DCqy4s4SwGwXEeY X-Proofpoint-ORIG-GUID: dB3vInAc8cYSTRy-8DCqy4s4SwGwXEeY X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-02-22_06,2022-02-21_02,2021-12-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Allow force use of SSO pffunc even when inline dev is available so that in case driver needs events directly delivered to event device. Signed-off-by: Nithin Dabilpuram --- drivers/common/cnxk/roc_nix.h | 1 + drivers/common/cnxk/roc_nix_inl.c | 7 ++++++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h index 0122b98..57a595f 100644 --- a/drivers/common/cnxk/roc_nix.h +++ b/drivers/common/cnxk/roc_nix.h @@ -386,6 +386,7 @@ struct roc_nix { uint16_t outb_nb_crypto_qs; uint16_t ipsec_in_max_spi; uint16_t ipsec_out_max_sa; + bool ipsec_out_sso_pffunc; /* End of input parameters */ /* LMT line base for "Per Core Tx LMT line" mode*/ uintptr_t lmt_base; diff --git a/drivers/common/cnxk/roc_nix_inl.c b/drivers/common/cnxk/roc_nix_inl.c index ac17e95..003f972 100644 --- a/drivers/common/cnxk/roc_nix_inl.c +++ b/drivers/common/cnxk/roc_nix_inl.c @@ -311,6 +311,10 @@ roc_nix_inl_outb_init(struct roc_nix *roc_nix) /* Retrieve inline device if present */ inl_dev = idev->nix_inl_dev; sso_pffunc = inl_dev ? inl_dev->dev.pf_func : idev_sso_pffunc_get(); + /* Use sso_pffunc if explicitly requested */ + if (roc_nix->ipsec_out_sso_pffunc) + sso_pffunc = idev_sso_pffunc_get(); + if (!sso_pffunc) { plt_err("Failed to setup inline outb, need either " "inline device or sso device"); @@ -328,7 +332,8 @@ roc_nix_inl_outb_init(struct roc_nix *roc_nix) eng_grpmask = (1ULL << ROC_CPT_DFLT_ENG_GRP_SE | 1ULL << ROC_CPT_DFLT_ENG_GRP_SE_IE | 1ULL << ROC_CPT_DFLT_ENG_GRP_AE); - rc = cpt_lfs_alloc(dev, eng_grpmask, blkaddr, true); + rc = cpt_lfs_alloc(dev, eng_grpmask, blkaddr, + !roc_nix->ipsec_out_sso_pffunc); if (rc) { plt_err("Failed to alloc CPT LF resources, rc=%d", rc); goto lf_detach; -- 2.8.4