From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1F550A0350; Mon, 28 Feb 2022 04:22:06 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id BD13A410FB; Mon, 28 Feb 2022 04:22:00 +0100 (CET) Received: from szxga01-in.huawei.com (szxga01-in.huawei.com [45.249.212.187]) by mails.dpdk.org (Postfix) with ESMTP id 242314068C for ; Mon, 28 Feb 2022 04:21:57 +0100 (CET) Received: from dggeme756-chm.china.huawei.com (unknown [172.30.72.57]) by szxga01-in.huawei.com (SkyGuard) with ESMTP id 4K6Qcm3j7yzdZfb; Mon, 28 Feb 2022 11:20:40 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by dggeme756-chm.china.huawei.com (10.3.19.102) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.21; Mon, 28 Feb 2022 11:21:55 +0800 From: "Min Hu (Connor)" To: CC: , Subject: [PATCH 4/6] net/hns3: fix the time waiting for PF reset completion Date: Mon, 28 Feb 2022 11:21:44 +0800 Message-ID: <20220228032146.37407-5-humin29@huawei.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220228032146.37407-1-humin29@huawei.com> References: <20220228032146.37407-1-humin29@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.69.192.56] X-ClientProxiedBy: dggems706-chm.china.huawei.com (10.3.19.183) To dggeme756-chm.china.huawei.com (10.3.19.102) X-CFilter-Loop: Reflected X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Huisong Li On the case that PF and VF need to be reset, after the hardware reset is complete, VF needs wait for 1 second to restore the configuration so that VF does not fail to recover because PF reset isn't complete. But the estimated time is not sufficient. This patch fixes it to 5 seconds. Fixes: 2790c6464725 ("net/hns3: support device reset") Cc: stable@dpdk.org Signed-off-by: Huisong Li --- drivers/net/hns3/hns3_ethdev_vf.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c index 8f18e7dd54..7d414b1af8 100644 --- a/drivers/net/hns3/hns3_ethdev_vf.c +++ b/drivers/net/hns3/hns3_ethdev_vf.c @@ -1875,6 +1875,7 @@ hns3vf_is_reset_pending(struct hns3_adapter *hns) static int hns3vf_wait_hardware_ready(struct hns3_adapter *hns) { +#define HNS3_WAIT_PF_RESET_READY_TIME 5 struct hns3_hw *hw = &hns->hw; struct hns3_wait_data *wait_data = hw->reset.wait_data; struct timeval tv; @@ -1895,12 +1896,14 @@ hns3vf_wait_hardware_ready(struct hns3_adapter *hns) return 0; wait_data->check_completion = NULL; - wait_data->interval = 1 * MSEC_PER_SEC * USEC_PER_MSEC; + wait_data->interval = + HNS3_WAIT_PF_RESET_READY_TIME * MSEC_PER_SEC * USEC_PER_MSEC; wait_data->count = 1; wait_data->result = HNS3_WAIT_REQUEST; rte_eal_alarm_set(wait_data->interval, hns3_wait_callback, wait_data); - hns3_warn(hw, "hardware is ready, delay 1 sec for PF reset complete"); + hns3_warn(hw, "hardware is ready, delay %d sec for PF reset complete", + HNS3_WAIT_PF_RESET_READY_TIME); return -EAGAIN; } else if (wait_data->result == HNS3_WAIT_TIMEOUT) { hns3_clock_gettime(&tv); -- 2.33.0