From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C741BA04A4; Wed, 2 Mar 2022 18:08:17 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B26E342715; Wed, 2 Mar 2022 18:08:17 +0100 (CET) Received: from NAM12-MW2-obe.outbound.protection.outlook.com (mail-mw2nam12on2049.outbound.protection.outlook.com [40.107.244.49]) by mails.dpdk.org (Postfix) with ESMTP id D116540141; Wed, 2 Mar 2022 18:08:16 +0100 (CET) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=JcQooTC95aTKySiuHtQPoJ+AwnfPCRApo3BkYfzrqwhRwxVnsheFdO9lsQOqMt9lHzJF3OVpxqDFajdWwzqeVI0luwsmM7FTBh+DoPtECvGWEMwdtNl+aBB/N08bE0Wx88JwUU/+dH06NGnoQJF+mXP33vH/9HoySLj4/Vsk9BnjxwQE4nurblnOvQyj16/CwG38rkq7simEfIxdT+QWJUHWzCQuc+VpmUM11XiDl+1RwQWhrNPaVASONvwJpceJOGs+TddoDEFZ/Cdb6mGRYv8uCkJFHMvicqvbpycB6yIraYdBJGrnsM6pDXVFafz/QlMsFlvSbKkyviKEX2ebbA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=8WTxefYMGY8XvKvHX0leP7Hvfqeps4NOerLIDz9F/GM=; b=Xx/2KaF9A/1NO0ol1bE0hUujxj0lyl/FUE9Sn4OX/BTELJ8OXvrk9/h9LxjbKSLEnhZOvq/UJVuGbmpNGcv/Bn5nr+35A1127YQntQUMeV8UnVrXDzQHHn8D88mhIur9gs0ZXqewRTXI2Qd/O6u5zn4U2Z1d4xdnw5YH+wQl/XnTYbJfm4dkH67fKLaaLhDGuk/uE+FjkCpRGtI3mMsfkDZbMLoZss80CqQlWbreSQKFxEWR2DlTqopRwJhnxHDI2ccT8ytZTgOoL8aWJzyY6dRI9+HCsrhltbSNDZmW+JV21WES8Vo1VZJXpPzmiz7LlEG5ZA56bHjjH6iLqtMqmQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 12.22.5.238) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=8WTxefYMGY8XvKvHX0leP7Hvfqeps4NOerLIDz9F/GM=; b=V2W6t1XfwwRgcb8/Sbrix2eI/VIMTf6jSvyeRMyYeBq9F7kdY4OU/iGwrN90N0OMxTpOYF4Culf4rzNkgLowhXqJsyqUz/cU/C7oq5DS4Qqa8/YR1V34J3ck9WZnANwJsBMtt/NhO53tIU0isvEDalKHUdC6zM+QnmV8DanwB8Ng/MagrLRE+gzdO3iG0GV1VcwEn55MHkh4qkgPQQiPYWZFE1CTlyMCZgGYaoVU0gs1y7ivny2wr34un7/qH5JNrzSQjC66KU6xKpmFNDuvOJggk+hHZD3evQsnlIFM70y3OS/ZMkyeGAYrDN605kzpD6fkYUkQ+9xgShJyByfJ+A== Received: from MWHPR11CA0001.namprd11.prod.outlook.com (2603:10b6:301:1::11) by MN2PR12MB4335.namprd12.prod.outlook.com (2603:10b6:208:1d4::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5017.25; Wed, 2 Mar 2022 17:08:14 +0000 Received: from CO1NAM11FT036.eop-nam11.prod.protection.outlook.com (2603:10b6:301:1:cafe::88) by MWHPR11CA0001.outlook.office365.com (2603:10b6:301:1::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5038.14 via Frontend Transport; Wed, 2 Mar 2022 17:08:14 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 12.22.5.238) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 12.22.5.238 as permitted sender) receiver=protection.outlook.com; client-ip=12.22.5.238; helo=mail.nvidia.com; Received: from mail.nvidia.com (12.22.5.238) by CO1NAM11FT036.mail.protection.outlook.com (10.13.174.124) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.5038.14 via Frontend Transport; Wed, 2 Mar 2022 17:08:14 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by DRHQMAIL105.nvidia.com (10.27.9.14) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Wed, 2 Mar 2022 17:08:12 +0000 Received: from nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.9; Wed, 2 Mar 2022 09:08:09 -0800 From: Dariusz Sosnowski To: Matan Azrad , Viacheslav Ovsiienko , Gregory Etelson CC: , Raslan Darawsheh , Subject: [PATCH v2] net/mlx5: fix MPLS/GRE Verbs spec ordering Date: Wed, 2 Mar 2022 17:06:59 +0000 Message-ID: <20220302170659.433481-1-dsosnowski@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220301102617.273824-1-dsosnowski@nvidia.com> References: <20220301102617.273824-1-dsosnowski@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.230.35] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 0a40a0fd-7077-4b16-41dd-08d9fc6f3cd1 X-MS-TrafficTypeDiagnostic: MN2PR12MB4335:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: E52neHQDDSzrBzcoTshJpdNbHTntIpN0ph5riDvtet49uD3iRS6ZCbcC2G/AJNZ/V/Nes7F+YJrkznNLnzhVZlixFh/jKzOCO2hFK8Rz7Vt4j/VN9uoDwVnLcCefhwy/SN4m3MaQHFEDxLbJemVQOfqFXaTNzUzs+lonI0vhzOWDP3soTuOuNOyNcouDe8615UHtKH2buFPhA1iX9mxQCskULJ6nRy8vrmfTpZTuObKo2IOWCU44S3mKMqCCk9ZMfuLtRC5pl/gaEPxdLt+t0cj7N+nYRNExQaBUetTH89KinKPO+uu1VxuYaqJC7Gvn26eW5/mmL5MF2VV0GDbQ+hFUrS8Q9qfYejHn/PVl8nXI7KieWEtb8RwanFthC1Qva7SpJdq6gfbQGJn9Q5fUpvu9h/d44JgFgiC0033G2GUWdIUC1fqLw7qIlPr/Ya2qWblQuKYT8BbA/wybkN26fvJqoME2hapAqRaKruu2/7GiUQ1FlvVNp80F1/S2uRVARtXmpf9UZskyC195xojeq7QWVSBlnsp+t9gRoTR5tjII9JNtuTAlaxZZEIYjBH/V1OHpUaN8r7hMQywpIKR+jvJB0/48I05VMKpV+5Lb38DfPbUy0Pt1t3LdjcJ7DJsPKfjqaATEou1y7mLwBz8SSDm6PEH3ZFLrfHdqwTt/UlTdC01cwf/CzVTZFJN1tliuY6gXokAXXyO+YBP2N4Xe0A== X-Forefront-Antispam-Report: CIP:12.22.5.238; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:mail.nvidia.com; PTR:InfoNoRecords; CAT:NONE; SFS:(13230001)(4636009)(46966006)(40470700004)(36840700001)(336012)(426003)(82310400004)(55016003)(356005)(83380400001)(70206006)(70586007)(81166007)(508600001)(110136005)(6636002)(36756003)(8936002)(316002)(47076005)(36860700001)(54906003)(8676002)(2906002)(7696005)(4326008)(26005)(86362001)(6666004)(40460700003)(1076003)(450100002)(16526019)(6286002)(186003)(5660300002)(2616005)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Mar 2022 17:08:14.0302 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0a40a0fd-7077-4b16-41dd-08d9fc6f3cd1 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.238]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT036.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4335 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org When using Verbs flow engine to create flows, GRE Verbs spec was put at the end of specs list. This created problems for flows matching MPLSoGRE packets. In generated specs list MPLS spec was put before GRE spec, but Verbs API requires that MPLS spec must be put in its exact location in protocol stack. This patch fixes this behavior. Space for GRE Verbs spec is reserved at its exact location. MPLS Verbs is inserted at its exact location as well. GRE spec is filled after all flow items are parsed. Fixes: 985b479267aa ("net/mlx5: fix GRE protocol type translation for Verbs") Cc: getelson@nvidia.com Cc: stable@dpdk.org Signed-off-by: Dariusz Sosnowski Acked-by: Viacheslav Ovsiienko --- v2: * Rebased. drivers/net/mlx5/mlx5_flow_verbs.c | 49 +++++++++++++++++++++++++++--- 1 file changed, 44 insertions(+), 5 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow_verbs.c b/drivers/net/mlx5/mlx5_flow_verbs.c index 85f0788222..fd902078f8 100644 --- a/drivers/net/mlx5/mlx5_flow_verbs.c +++ b/drivers/net/mlx5/mlx5_flow_verbs.c @@ -882,13 +882,48 @@ flow_verbs_item_gre_ip_protocol_update(struct ibv_flow_attr *attr, } } +/** + * Reserve space for GRE spec in spec buffer. + * + * @param[in,out] dev_flow + * Pointer to dev_flow structure. + * + * @return + * Pointer to reserved space in spec buffer. + */ +static uint8_t * +flow_verbs_reserve_gre(struct mlx5_flow *dev_flow) +{ + uint8_t *buffer; + struct mlx5_flow_verbs_workspace *verbs = &dev_flow->verbs; +#ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT + unsigned int size = sizeof(struct ibv_flow_spec_tunnel); + struct ibv_flow_spec_tunnel tunnel = { + .type = IBV_FLOW_SPEC_VXLAN_TUNNEL, + .size = size, + }; +#else + unsigned int size = sizeof(struct ibv_flow_spec_gre); + struct ibv_flow_spec_gre tunnel = { + .type = IBV_FLOW_SPEC_GRE, + .size = size, + }; +#endif + + buffer = verbs->specs + verbs->size; + flow_verbs_spec_add(verbs, &tunnel, size); + return buffer; +} + /** * Convert the @p item into a Verbs specification. This function assumes that - * the input is valid and that there is space to insert the requested item - * into the flow. + * the input is valid and that Verbs specification will be placed in + * the pre-reserved space. * * @param[in, out] dev_flow * Pointer to dev_flow structure. + * @param[in, out] gre_spec + * Pointer to space reserved for GRE spec. * @param[in] item * Item specification. * @param[in] item_flags @@ -896,6 +931,7 @@ flow_verbs_item_gre_ip_protocol_update(struct ibv_flow_attr *attr, */ static void flow_verbs_translate_item_gre(struct mlx5_flow *dev_flow, + uint8_t *gre_spec, const struct rte_flow_item *item __rte_unused, uint64_t item_flags) { @@ -949,7 +985,8 @@ flow_verbs_translate_item_gre(struct mlx5_flow *dev_flow, flow_verbs_item_gre_ip_protocol_update(&verbs->attr, IBV_FLOW_SPEC_IPV6, IPPROTO_GRE); - flow_verbs_spec_add(verbs, &tunnel, size); + MLX5_ASSERT(gre_spec); + memcpy(gre_spec, &tunnel, size); } /** @@ -1680,6 +1717,7 @@ flow_verbs_translate(struct rte_eth_dev *dev, struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace(); struct mlx5_flow_rss_desc *rss_desc; const struct rte_flow_item *tunnel_item = NULL; + uint8_t *gre_spec = NULL; MLX5_ASSERT(wks); rss_desc = &wks->rss_desc; @@ -1817,6 +1855,7 @@ flow_verbs_translate(struct rte_eth_dev *dev, item_flags |= MLX5_FLOW_LAYER_VXLAN_GPE; break; case RTE_FLOW_ITEM_TYPE_GRE: + gre_spec = flow_verbs_reserve_gre(dev_flow); subpriority = MLX5_TUNNEL_PRIO_GET(rss_desc); item_flags |= MLX5_FLOW_LAYER_GRE; tunnel_item = items; @@ -1834,8 +1873,8 @@ flow_verbs_translate(struct rte_eth_dev *dev, } } if (item_flags & MLX5_FLOW_LAYER_GRE) - flow_verbs_translate_item_gre(dev_flow, tunnel_item, - item_flags); + flow_verbs_translate_item_gre(dev_flow, gre_spec, + tunnel_item, item_flags); dev_flow->handle->layers = item_flags; /* Other members of attr will be ignored. */ dev_flow->verbs.attr.priority = -- 2.25.1